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    Substrate holder
    1.
    发明申请
    Substrate holder 审中-公开
    基板支架

    公开(公告)号：US20080276869A1

    公开(公告)日：2008-11-13

    申请号：US12154897

    申请日：2008-05-28

    申请人： Stefan Bader ,  Matthias Peter ,  Alexander Walter ,  Volker Haerle

    发明人： Stefan Bader ,  Matthias Peter ,  Alexander Walter ,  Volker Haerle

    IPC分类号： C23C16/00

    CPC分类号： C23C16/4581 ,  C23C16/4583 ,  C30B25/12

    摘要： In order to achieve an as uniform as possible temperature over the entire surface of the substrate (2) during a temperature step and, in particular, during an epitaxy method, temperature equalization structures are incorporated in a substrate holder (1), on which the substrate (2) is located. A uniform temperature distribution on the substrate surface during the deposition of a semiconductor material reduces the emission wavelength gradient of the deposited semiconductor material. The temperature equalization structures produce specific temperature inhomogenelties in the substrate holder (1), and these smooth out the temperature profile of the substrate (2). For example, a groove (4) with a cooling effect and a support step (5) which produces a gap (8) between the substrate (2) and the substrate holder (1) are integrated in the edge area of the substrate holder (1).

    摘要翻译： 为了在温度步骤期间，特别是在外延方法中，在衬底（2）的整个表面上实现尽可能均匀的温度，在衬底保持器（1）中并入温度均衡结构，其中 衬底（2）位于。 在沉积半导体材料期间在衬底表面上均匀的温度分布降低了沉积的半导体材料的发射波长梯度。 温度均衡结构在衬底保持器（1）中产生特定的温度不均匀性，并且这些平滑了衬底（2）的温度分布。 例如，具有冷却效果的槽（4）和在基板（2）和基板保持件（1）之间产生间隙（8）的支撑台阶（5）被集成在基板支架的边缘区域 1）。

    Optoelectronic Semiconductor Chip Having a Multiple Quantum Well Structure
    3.
    发明申请
    Optoelectronic Semiconductor Chip Having a Multiple Quantum Well Structure 有权
    具有多量子阱结构的光电半导体芯片

    公开(公告)号：US20110042643A1

    公开(公告)日：2011-02-24

    申请号：US12680463

    申请日：2008-09-12

    申请人： Peter Stauss ,  Matthias Peter ,  Alexander Walter

    发明人： Peter Stauss ,  Matthias Peter ,  Alexander Walter

    IPC分类号： H01L33/04

    CPC分类号： H01L33/06 ,  B82Y20/00 ,  H01L33/04 ,  H01L33/32 ,  H01L2924/0002 ,  H01S5/3086 ,  H01S5/34 ,  H01L2924/00

    摘要： An optoelectronic semiconductor chip is specified, which has an active zone (20) containing a multi quantum well structure provided for generating electromagnetic radiation, which comprises a plurality of successive quantum well layers (210, 220, 230). The multi quantum well structure comprises at least one first quantum well layer (210), which is n-conductively doped and which is arranged between two n-conductively doped barrier layers (250) adjoining the first quantum well layer. It comprises a second quantum well layer (220), which is undoped and is arranged between two barrier layers (250, 260) adjoining the second quantum well layer, of which one is n-conductively doped and the other is undoped. In addition, the multi quantum well structure comprises at least one third quantum well layer (230), which is undoped and which is arranged between two undoped barrier layers (260) adjoining the third quantum well layer.

    摘要翻译： 规定了一种光电子半导体芯片，其具有包含多个量子阱结构的活动区域（20），所述有源区域包括多个连续量子阱层（210,220,230），所述有源区域包括用于产生电磁辐射的多量子阱结构。 多量子阱结构包括至少一个第一量子阱层（210），其被n导电掺杂并且布置在邻接第一量子阱层的两个n导电掺杂阻挡层（250）之间。 它包括未掺杂的第二量子阱层（220），并且被布置在邻接第二量子阱层的两个势垒层（250,260）之间，其中一个是n导电掺杂的，另一个是未掺杂的。 另外，多量子阱结构包括至少一个未掺杂的第三量子阱层（230），其布置在与第三量子阱层相邻的两个未掺杂的势垒层（260）之间。

    Optoelectronic semiconductor chip having a multiple quantum well structure
    6.
    发明授权
    Optoelectronic semiconductor chip having a multiple quantum well structure 有权
    具有多量子阱结构的光电半导体芯片

    公开(公告)号：US08173991B2

    公开(公告)日：2012-05-08

    申请号：US12680463

    申请日：2008-09-12

    申请人： Peter Stauss ,  Matthias Peter ,  Alexander Walter

    发明人： Peter Stauss ,  Matthias Peter ,  Alexander Walter

    IPC分类号： H01L21/20 ,  H01L21/02 ,  H01L33/00

    CPC分类号： H01L33/06 ,  B82Y20/00 ,  H01L33/04 ,  H01L33/32 ,  H01L2924/0002 ,  H01S5/3086 ,  H01S5/34 ,  H01L2924/00

    摘要： An optoelectronic semiconductor chip is specified, which has an active zone (20) containing a multi quantum well structure provided for generating electromagnetic radiation, which comprises a plurality of successive quantum well layers (210, 220, 230). The multi quantum well structure comprises at least one first quantum well layer (210), which is n-conductively doped and which is arranged between two n-conductively doped barrier layers (250) adjoining the first quantum well layer. It comprises a second quantum well layer (220), which is undoped and is arranged between two barrier layers (250, 260) adjoining the second quantum well layer, of which one is n-conductively doped and the other is undoped. In addition, the multi quantum well structure comprises at least one third quantum well layer (230), which is undoped and which is arranged between two undoped barrier layers (260) adjoining the third quantum well layer.

    摘要翻译： 规定了一种光电子半导体芯片，其具有包含多个量子阱结构的活动区域（20），所述有源区域包括多个连续量子阱层（210,220,230），所述有源区域包括用于产生电磁辐射的多量子阱结构。 多量子阱结构包括至少一个第一量子阱层（210），其被n导电掺杂并且布置在邻接第一量子阱层的两个n导电掺杂阻挡层（250）之间。 它包括未掺杂的第二量子阱层（220），并且被布置在邻接第二量子阱层的两个势垒层（250,260）之间，其中一个是n导电掺杂的，另一个是未掺杂的。 另外，多量子阱结构包括至少一个未掺杂的第三量子阱层（230），其布置在与第三量子阱层相邻的两个未掺杂的势垒层（260）之间。

    Optoelectronic Semiconductor Body with a Quantum Well Structure
    10.
    发明申请
    Optoelectronic Semiconductor Body with a Quantum Well Structure 审中-公开
    具有量子阱结构的光电子体

    公开(公告)号：US20120298951A1

    公开(公告)日：2012-11-29

    申请号：US13386861

    申请日：2010-07-22

    申请人： Tobias Meyer ,  Matthias Peter ,  Rainer Butendeich ,  Tetsuya Taki ,  Juergen Off ,  Alexander Walter

    发明人： Tobias Meyer ,  Matthias Peter ,  Rainer Butendeich ,  Tetsuya Taki ,  Juergen Off ,  Alexander Walter

    IPC分类号： H01L33/04

    CPC分类号： H01S5/34333 ,  B82Y20/00 ,  H01L33/06 ,  H01L33/32 ,  H01S5/305 ,  H01S5/3063 ,  H01S5/3213 ,  H01S5/3215 ,  H01S5/34 ,  H01S5/347

    摘要： An optoelectronic semiconductor body is provided, which contains a semiconductor material which is composed of a first component and a second component different from the first component. The semiconductor body comprises a quantum well structure, which is arranged between an n-conducting layer (1) and a p-conducting layer (5). The quantum well structure consists of following elements: one single quantum well layer 31 or a layer stack (3), which consists of a plurality of quantum well layers (31) and at least one barrier layer (32), one barrier layer (32) being arranged between each pair of successive quantum wall layers (31), which barrier layer adjoins both quantum wall layers (31); an n-side terminating layer (2), which adjoins the n-conducting layer (1) and the single quantum well layer (31) or the layer stack (3); and a p-side terminating layer (4), which is arranged between the p-conducting layer (5) and the single quantum well layer (31) or the layer stack (3) and adjoins the layer stack (3) or the single quantum well layer (31).

    摘要翻译： 提供了一种光电半导体体，其包含由第一组分和与第一组分不同的第二组分组成的半导体材料。 半导体本体包括量子阱结构，其布置在n导电层（1）和p导电层（5）之间。 量子阱结构由以下元件组成：由多个量子阱层（31）和至少一个阻挡层（32），一个势垒层（32）和一个势垒层（32）构成的单个量子阱层31或层堆叠 ）布置在每对连续的量子壁层（31）之间，该阻挡层邻接量子壁层（31）; 邻接n导电层（1）和单量子阱层（31）或层叠体（3）的n侧端接层（2）; 和p侧端接层（4），其布置在导电层（5）和单量子阱层（31）或层堆叠（3）之间并且邻接层堆叠（3）或单层 量子阱层（31）。