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公开(公告)号:US20230112936A1
公开(公告)日:2023-04-13
申请号:US18081513
申请日:2022-12-14
发明人: Garming LIANG , Simon CHAI , Tzu-Jin YEH , En-Hsiang YEH , Wen-Sheng CHEN
IPC分类号: H03F3/21 , H01L27/06 , H01L27/092 , H03F1/02
摘要: Disclosed is an amplifying circuit and method. In one embodiment, an amplifying circuit, includes: a common-gate (CG) amplifier, wherein the CG amplifier comprises a first transistor, wherein source terminal and body terminal of the first transistor is coupled together through a first resistor.
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公开(公告)号:US20240088842A1
公开(公告)日:2024-03-14
申请号:US18513103
申请日:2023-11-17
发明人: Garming LIANG , Simon CHAI , Tzu-Jin YEH , En-Hsiang YEH , Wen-Sheng CHEN
IPC分类号: H03F3/21 , H01L27/06 , H01L27/092 , H03F1/02
CPC分类号: H03F3/211 , H01L27/0629 , H01L27/0928 , H03F1/0205 , H03F1/223
摘要: Disclosed is an amplifying circuit and method. In one embodiment, an amplifying circuit, includes: a common-gate (CG) amplifier, wherein the CG amplifier comprises a first transistor, wherein source terminal and body terminal of the first transistor is coupled together through a first resistor.
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公开(公告)号:US20180108477A1
公开(公告)日:2018-04-19
申请号:US15707793
申请日:2017-09-18
发明人: Monsen LIU , Chung-Hao TSAI , En-Hsiang YEH , Chuei-Tang WANG , Chen-Hua YU
IPC分类号: H01F41/04 , H01R43/26 , H01R24/56 , H01F17/00 , H01F27/28 , H01R24/48 , H01R24/40 , H01L49/02 , H01L23/00 , H01L23/64 , H01L23/522 , H01L23/50
CPC分类号: H01F41/04 , H01F17/0006 , H01F27/2804 , H01F41/042 , H01F41/043 , H01F41/045 , H01F41/046 , H01F2027/2814 , H01L23/50 , H01L23/5227 , H01L23/645 , H01L24/29 , H01L28/10 , H01R24/40 , H01R24/48 , H01R24/56 , H01R43/26 , Y10T29/4902 , Y10T29/49073 , Y10T29/49158 , Y10T29/49165 , Y10T29/49169
摘要: A tunable three-dimensional (3D) inductor comprises a plurality of vias arranged with spacing among them, a plurality of interconnects in a metal layer, wherein the plurality of interconnects connect the plurality of vias on one end, and a plurality of tunable wires that connects to the plurality of vias on the other end to form the 3D inductor. The physical configuration and inductance value of the 3D inductor are adjustable by tuning the plurality of tunable wires during manufacturing process.
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公开(公告)号:US20180115198A1
公开(公告)日:2018-04-26
申请号:US15299053
申请日:2016-10-20
发明人: Wen-Sheng CHEN , An-Hsun LO , En-Hsiang YEH , Tzu-Jin YEH
CPC分类号: H02J50/23 , H02J50/20 , H04B5/0031 , H04B5/0037
摘要: A wireless transmitter includes a an amplifier; and a switchable transformer, coupled to the amplifier, wherein the amplifier is configured to be coupled to the switchable transformer in first and second configurations, wherein the first configuration causes the amplifier to provide a first output impedance to the switchable transformer, and wherein the second configuration causes the amplifier to provide a second output impedance to the switchable transformer, the first and second output impedances being different from each other.
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公开(公告)号:US20170194910A1
公开(公告)日:2017-07-06
申请号:US14983870
申请日:2015-12-30
发明人: En-Hsiang YEH , An-Hsun LO , Tzu-Jin YEH
CPC分类号: H03F1/0205 , H03F3/19 , H03F3/45139 , H03F3/45183 , H03F2200/294 , H03F2200/451
摘要: A device is disclosed that includes a first gain stage and a first amplifier. The first gain stage is configured to generate a first signal according to a first input signal, and to multiply the first signal and the first input signal, to generate a second signal at a first output terminal, in which the first signal is associated with the even order signal components of the first input signal. The first amplifier is configured to amplify the first input signal to generate a third signal at the first output terminal, in order to output a first output signal with the first gain stage, in which the first output signal is the sum of the second signal and the third signal.
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公开(公告)号:US20180131332A1
公开(公告)日:2018-05-10
申请号:US15344133
申请日:2016-11-04
发明人: An-Hsun LO , Wen-Sheng CHEN , En-Hsiang YEH , Tzu-Jin YEH
CPC分类号: H03F1/342 , H03F1/565 , H03F3/193 , H03F3/45179 , H03F3/45475 , H03F2200/294 , H03F2200/451 , H03F2203/45018 , H03F2203/45306
摘要: A low noise amplifier (LNA) includes a pair of n-type transistors, each configured to provide a first trans conductance; a pair of p-type transistors, each configured to provide a second transconductance; a first pair of coupling capacitors, cross-coupled between the pair of n-type transistors, and configured to provide a first boosting coefficient to the first transconductance; and a second pair of coupling capacitors, cross-coupled between the pair of p-type transistors, and configured to provide a second boosting coefficient to the second transconductance, wherein the LNA is configured to use a boosted effective transconductance based on the first and second boosting coefficients, and the first and second transconductances to amplify an input signal.
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公开(公告)号:US20220385251A1
公开(公告)日:2022-12-01
申请号:US17883580
申请日:2022-08-08
发明人: An-Hsun LO , Wen-Sheng CHEN , En-Hsiang YEH , Tzu-Jin YEH
IPC分类号: H03F3/45
摘要: A low noise amplifier (LNA) includes a pair of n-type transistors, each configured to provide a first transconductance; a pair of p-type transistors, each configured to provide a second transconductance; a first pair of coupling capacitors, cross-coupled between the pair of n-type transistors, and configured to provide a first boosting coefficient to the first transconductance; and a second pair of coupling capacitors, cross-coupled between the pair of p-type transistors, and configured to provide a second boosting coefficient to the second transconductance, wherein the LNA is configured to use a boosted effective transconductance based on the first and second boosting coefficients, and the first and second transconductances to amplify an input signal.
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公开(公告)号:US20200162041A1
公开(公告)日:2020-05-21
申请号:US16673765
申请日:2019-11-04
发明人: Garming LIANG , Simon CHAI , Tzu-Jin YEH , En-Hsiang YEH , Wen-Sheng CHEN
IPC分类号: H03F3/21 , H01L27/06 , H01L27/092 , H03F1/02
摘要: Disclosed is an amplifying circuit and method. In one embodiment, an amplifying circuit, includes: a common-gate (CG) amplifier, wherein the CG amplifier comprises a first transistor, wherein source terminal and body terminal of the first transistor is coupled together through a first resistor.
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