公开(公告)号：US20240145554A1

公开(公告)日：2024-05-02

申请号：US18409991

申请日：2024-01-11

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Yao-Chung Chang ,  Chun Lin Tsai ,  Ru-Yi Su ,  Wei Wang ,  Wei-Chen Yang

IPC分类号： H01L29/417 ,  H01L29/66

CPC分类号： H01L29/417 ,  H01L29/41741 ,  H01L29/6609 ,  H01L29/2003

摘要： Various embodiments of the present disclosure are directed towards a method for forming a semiconductor structure, the method includes forming a buffer layer over a substrate. An active layer is formed on the buffer layer. A top electrode is formed on the active layer. An etch process is performed on the buffer layer and the substrate to define a plurality of pillar structures. The plurality of pillar structures include a first pillar structure laterally offset from a second pillar structure. At least portions of the first and second pillar structures are spaced laterally between sidewalls of the top electrode.

公开(公告)号：US20230120292A1

公开(公告)日：2023-04-20

申请号：US17672325

申请日：2022-02-15

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Shih-Pang Chang ,  Haw-Yun Wu ,  Yao-Chung Chang ,  Chun-Lin Tsai

IPC分类号： H01L23/528 ,  H01L29/417 ,  H01L29/423 ,  H01L29/40 ,  H01L23/522

摘要： The present disclosure relates an integrated chip. The integrated chip includes an isolation region disposed within a substrate and surrounding an active area. A gate structure is disposed over the substrate and has a base region and a gate extension finger protruding outward from a sidewall of the base region along a first direction to past opposing sides of the active area. A source contact is disposed within the active area and a drain contact is disposed within the active area and is separated from the source contact by the gate extension finger. A first plurality of conductive contacts are arranged on the gate structure and separated along the first direction. The first plurality of conductive contacts are separated by distances overlying the gate extension finger.

公开(公告)号：US12107156B2

公开(公告)日：2024-10-01

申请号：US18067733

申请日：2022-12-19

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.

发明人： Yao-Chung Chang ,  Po-Chih Chen ,  Jiun-Lei Jerry Yu ,  Chun Lin Tsai

IPC分类号： H01L29/778 ,  H01L21/324 ,  H01L29/20 ,  H01L29/201 ,  H01L29/51 ,  H01L29/66

CPC分类号： H01L29/7786 ,  H01L21/3245 ,  H01L29/2003 ,  H01L29/201 ,  H01L29/66431 ,  H01L29/66439 ,  H01L29/66462 ,  H01L29/66469 ,  H01L29/66522 ,  H01L29/778 ,  H01L29/7781 ,  H01L29/7782 ,  H01L29/7783 ,  H01L29/7787 ,  H01L29/51 ,  H01L29/517 ,  H01L29/518

摘要： A semiconductor structure includes: a channel layer; an active layer over the channel layer, wherein the active layer is configured to form a two-dimensional electron gas (2DEG) to be formed in the channel layer along an interface between the channel layer and the active layer; a gate electrode over a top surface of the active layer; and a source/drain electrode over the top surface of the active layer; wherein the active layer includes a first layer and a second layer sequentially disposed therein from the top surface to a bottom surface of the active layer, and the first layer possesses a higher aluminum (Al) atom concentration compared to the second layer. An HEMT structure and an associated method are also disclosed.

公开(公告)号：US10269948B2

公开(公告)日：2019-04-23

申请号：US15944345

申请日：2018-04-03

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.

发明人： Han-Chin Chiu ,  Sheng-De Liu ,  Yu-Syuan Lin ,  Yao-Chung Chang ,  Cheng-Yuan Tsai

IPC分类号： H01L29/205 ,  H01L29/778 ,  H01L29/66 ,  H01L29/20

摘要： A semiconductor structure includes a semiconductive substrate having a top surface, a III-V compound layer covering the top surface, and a passivation layer having a lower portion and an upper portion, both comprising at least one of oxide and nitride over the III-V compound layer. The semiconductor structure also includes an etch stop layer between the lower portion and the upper portion of the passivation layer, and a gate stack penetrating through the etch stop layer and landing on the lower portion of the passivation layer. The gate stack is surrounded by the etch stop layer.

公开(公告)号：US10062776B2

公开(公告)日：2018-08-28

申请号：US15017234

申请日：2016-02-05

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.

发明人： Po-Chih Chen ,  Jiun-Lei Yu ,  Yao-Chung Chang ,  Chun-Lin Tsai

IPC分类号： H01L29/15 ,  H01L29/778 ,  H01L21/02 ,  H01L29/10 ,  H01L29/66 ,  H01L29/205 ,  H01L29/20 ,  H01L29/423

CPC分类号： H01L29/7787 ,  H01L21/02617 ,  H01L29/1054 ,  H01L29/2003 ,  H01L29/205 ,  H01L29/4236 ,  H01L29/66462

摘要： The present disclosure provides a semiconductor device and a method for manufacturing the same. The semiconductor device comprises a substrate, a first III-V compound layer over the substrate, a second III-V compound layer on the first III-V compound layer, a third III-V compound layer on the second III-V compound layer, a source region on the third III-V compound layer, and a drain region on the third III-V compound layer. A percentage of aluminum of the third III-V compound layer is greater than that of the second III-V compound layer.

公开(公告)号：US20240321736A1

公开(公告)日：2024-09-26

申请号：US18731477

申请日：2024-06-03

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Shih-Pang Chang ,  Haw-Yun Wu ,  Yao-Chung Chang ,  Chun-Lin Tsai

IPC分类号： H01L23/528 ,  H01L23/522 ,  H01L29/40 ,  H01L29/417 ,  H01L29/423

CPC分类号： H01L23/528 ,  H01L23/5226 ,  H01L29/401 ,  H01L29/41758 ,  H01L29/4238

摘要： The present disclosure relates an integrated chip. The integrated chip includes an isolation region disposed within a substrate and surrounding an active area. A gate structure is disposed over the substrate and has a base region and a gate extension finger protruding outward from a sidewall of the base region along a first direction to past opposing sides of the active area. A source contact and a drain contact are disposed within the active area. The drain contact is separated from the source contact by the gate extension finger. A first plurality of conductive contacts are arranged on the gate structure. The first plurality of conductive contacts are separated along the first direction by distances overlying the gate extension finger.

公开(公告)号：US11908905B2

公开(公告)日：2024-02-20

申请号：US17867012

申请日：2022-07-18

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Yao-Chung Chang ,  Chun Lin Tsai ,  Ru-Yi Su ,  Wei Wang ,  Wei-Chen Yang

IPC分类号： H01L29/417 ,  H01L29/66 ,  H01L29/20 ,  H01L29/205 ,  H01L29/778 ,  H01L29/868

CPC分类号： H01L29/417 ,  H01L29/41741 ,  H01L29/6609 ,  H01L29/2003 ,  H01L29/205 ,  H01L29/7788 ,  H01L29/868

摘要： Various embodiments of the present disclosure are directed towards a method for forming a semiconductor structure, the method includes forming a buffer layer over a substrate. An active layer is formed on the buffer layer. A top electrode is formed on the active layer. An etch process is performed on the buffer layer and the substrate to define a plurality of pillar structures. The plurality of pillar structures include a first pillar structure laterally offset from a second pillar structure. At least portions of the first and second pillar structures are spaced laterally between sidewalls of the top electrode.

公开(公告)号：US11222968B2

公开(公告)日：2022-01-11

申请号：US16730428

申请日：2019-12-30

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.

发明人： Po-Chih Chen ,  Jiun-Lei Yu ,  Yao-Chung Chang ,  Chun-Lin Tsai

IPC分类号： H01L29/778 ,  H01L29/205 ,  H01L21/02 ,  H01L29/10 ,  H01L29/66 ,  H01L29/423 ,  H01L29/20

摘要： The present disclosure provides a semiconductor device comprising a substrate; a first III-V compound layer over the substrate; a second III-V compound layer on the first III-V compound layer; a third III-V compound layer on the second III-V compound layer; a source region on the third III-V compound layer; a drain region on the third III-V compound layer; a first dielectric layer arranged on the second III-V compound layer through the third III-V compound layer; and a gate region on the first dielectric layer, wherein a bottom of the gate region is higher than a top surface of the first dielectric layer; the second lateral distance is larger than the first lateral distance.

公开(公告)号：US10964804B2

公开(公告)日：2021-03-30

申请号：US16390543

申请日：2019-04-22

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.

发明人： Yao-Chung Chang ,  Po-Chih Chen ,  Jiun-Lei Jerry Yu ,  Chun Lin Tsai

IPC分类号： H01L29/778 ,  H01L29/20 ,  H01L21/324 ,  H01L29/66 ,  H01L29/201 ,  H01L29/51

摘要： A semiconductor structure includes: a channel layer; an active layer over the channel layer, wherein the active layer is configured to form a two-dimensional electron gas (2DEG) to be formed in the channel layer along an interface between the channel layer and the active layer; a gate electrode over a top surface of the active layer; and a source/drain electrode over the top surface of the active layer; wherein the active layer includes a first layer and a second layer sequentially disposed therein from the top surface to a bottom surface of the active layer, and the first layer possesses a higher aluminum (Al) atom concentration compared to the second layer. An HEMT structure and an associated method are also disclosed.

公开(公告)号：US10937900B2

公开(公告)日：2021-03-02

申请号：US15136309

申请日：2016-04-22

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.

发明人： Po-Chun Liu ,  Chi-Ming Chen ,  Yao-Chung Chang ,  Jiun-Lei Jerry Yu ,  Chen-Hao Chiang ,  Chung-Yi Yu

IPC分类号： H01L29/20 ,  H01L29/66 ,  H01L29/778 ,  H01L29/49

摘要： The present disclosure provides a semiconductor structure, including a substrate, a first III-V layer over the substrate, having a first band gap, and a second III-V layer over the first III-V layer, having a second band gap. The second III-V layer includes a first surface in contact with the first III-V layer and a second surface opposite to the first surface. The second band gap at the second surface is greater than the second band gap at the first surface. The present disclosure also provides a manufacturing method of the aforesaid semiconductor structure.