公开(公告)号：US20180374861A1

公开(公告)日：2018-12-27

申请号：US16056827

申请日：2018-08-07

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Huang-Chun Wen ,  Richard Allen Bailey ,  Antonio Guillemo Acosta ,  John A. Rodriguez ,  Scott Robert Summerfelt ,  Kemal Tamer San

IPC: H01L27/11507 ,  H01L21/02 ,  H01L21/56 ,  H01L23/31 ,  H01L23/00

Abstract: Curing of a passivation layer applied to the surface of a ferroelectric integrated circuit so as to enhance the polarization characteristics of the ferroelectric structures. A passivation layer, such as a polyimide, is applied to the surface of the ferroelectric integrated circuit after fabrication of the active devices. The passivation layer is cured by exposure to a high temperature, below the Curie temperature of the ferroelectric material, for a short duration such as on the order of ten minutes. Variable frequency microwave energy may be used to effect such curing. The cured passivation layer attains a tensile stress state, and as a result imparts a compressive stress upon the underlying ferroelectric material. Polarization may be further enhanced by polarizing the ferroelectric material prior to the cure process.

公开(公告)号：US20160086960A1

公开(公告)日：2016-03-24

申请号：US14728683

申请日：2015-06-02

Applicant: Texas Instruments Incorporated

Inventor： Huang-Chun Wen ,  Richard Allen Bailey ,  Antonio Guillermo Acosta ,  John A. Rodriguez ,  Scott Robert Summerfelt ,  Kemal Tamer San

IPC: H01L27/115 ,  H01L21/02 ,  H01L29/78 ,  H01L23/31 ,  H01L23/29 ,  H01L21/326 ,  H01L23/00

CPC classification number: H01L27/11507 ,  H01L21/02118 ,  H01L21/0217 ,  H01L21/02197 ,  H01L21/02318 ,  H01L21/56 ,  H01L23/3114 ,  H01L23/3192 ,  H01L23/562 ,  H01L24/02 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L2224/024 ,  H01L2224/0401 ,  H01L2224/05569 ,  H01L2224/13024 ,  H01L2224/131 ,  H01L2924/07025 ,  H01L2924/014

Abstract: Curing of a passivation layer applied to the surface of a ferroelectric integrated circuit so as to enhance the polarization characteristics of the ferroelectric structures. A passivation layer, such as a polyimide, is applied to the surface of the ferroelectric integrated circuit after fabrication of the active devices. The passivation layer is cured by exposure to a high temperature, below the Curie temperature of the ferroelectric material, for a short duration such as on the order of ten minutes. Variable frequency microwave energy may be used to effect such curing. The cured passivation layer attains a tensile stress state, and as a result imparts a compressive stress upon the underlying ferroelectric material. Polarization may be further enhanced by polarizing the ferroelectric material prior to the cure process.

Abstract translation: 固化施加到铁电集成电路的表面的钝化层，以增强铁电结构的极化特性。 在制造有源器件之后，将钝化层（例如聚酰亚胺）施加到铁电集成电路的表面。 钝化层通过暴露于低于铁电材料的居里温度的高温固化，持续时间短，例如十分钟左右。 可以使用变频微波能量来实现这种固化。 固化的钝化层达到拉伸应力状态，结果赋予了下伏的铁电材料的压应力。 在固化过程之前极化铁电材料可以进一步提高极化。

公开(公告)号：US20230170256A1

公开(公告)日：2023-06-01

申请号：US17538726

申请日：2021-11-30

Applicant: Texas Instruments Incorporated

Inventor： Xiangzheng Bo ,  Huang-Chun Wen

IPC: H01L21/77 ,  B23K26/32 ,  B23K26/082 ,  B23K101/40

CPC classification number: H01L21/77 ,  B23K26/32 ,  B23K26/082 ,  B23K2101/40

Abstract: A method of forming an integrated circuit is described. The method first positions a semiconductor wafer in a processing chamber, and second, laser anneals at least a portion of the semiconductor wafer. The laser annealing includes tracing a first laser beam, in a first path having a first direction, across the at least a portion of the semiconductor wafer, tracing a second laser beam, in a second path having a second direction, opposite to and colinear with the first direction, across the at least a portion of the semiconductor wafer.

公开(公告)号：US11495607B2

公开(公告)日：2022-11-08

申请号：US16056827

申请日：2018-08-07

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Huang-Chun Wen ,  Richard Allen Bailey ,  Antonio Guillermo Acosta ,  John A. Rodriguez ,  Scott Robert Summerfelt ,  Kemal Tamer San

IPC: H01L27/11507 ,  H01L21/02 ,  H01L23/31 ,  H01L21/56 ,  H01L23/00

Abstract: Curing of a passivation layer applied to the surface of a ferroelectric integrated circuit so as to enhance the polarization characteristics of the ferroelectric structures. A passivation layer, such as a polyimide, is applied to the surface of the ferroelectric integrated circuit after fabrication of the active devices. The passivation layer is cured by exposure to a high temperature, below the Curie temperature of the ferroelectric material, for a short duration such as on the order of ten minutes. Variable frequency microwave energy may be used to effect such curing. The cured passivation layer attains a tensile stress state, and as a result imparts a compressive stress upon the underlying ferroelectric material. Polarization may be further enhanced by polarizing the ferroelectric material prior to the cure process.

公开(公告)号：US09070575B2

公开(公告)日：2015-06-30

申请号：US13953476

申请日：2013-07-29

Applicant: Texas Instruments Incorporated

Inventor： Scott Robert Summerfelt ,  John A. Rodriguez ,  Huang-Chun Wen ,  Steven Craig Bartling

IPC: H01L21/02 ,  H01L27/08 ,  H01L27/115 ,  H01L29/92 ,  H01L49/02 ,  H01L27/06 ,  H01L27/02

CPC classification number: H01L27/0805 ,  H01L27/0207 ,  H01L27/06 ,  H01L27/11507 ,  H01L27/11509 ,  H01L28/55 ,  H01L29/92

Abstract: Ferroelectric capacitor structures for integrated decoupling capacitors and the like. The ferroelectric capacitor structure includes two or more ferroelectric capacitors connected in series with one another between voltage nodes. The series connection of the ferroelectric capacitors reduces the applied voltage across each, enabling the use of rough ferroelectric dielectric material, such as PZT deposited by MOCVD. Matched construction of the series-connected capacitors, as well as uniform polarity of the applied voltage across each, is beneficial in reducing the maximum voltage across any one of the capacitors, reducing the vulnerability to dielectric breakdown.

Abstract translation: 用于集成去耦电容器的铁电电容器结构等。 铁电电容器结构包括在电压节点之间彼此串联连接的两个或更多个铁电电容器。 铁电电容器的串联连接减少了施加的电压，使得能够使用由MOCVD沉积的诸如PZT的粗铁电介质材料。 串联电容器的匹配结构以及每个电容器的施加电压的均匀极性有利于降低跨任何一个电容器的最大电压，从而降低了介质击穿的难度。

公开(公告)号：US20130313679A1

公开(公告)日：2013-11-28

申请号：US13953476

申请日：2013-07-29

Applicant: Texas Instruments Incorporated

Inventor： Scott Robert Summerfelt ,  John A. Rodriguez ,  Huang-Chun Wen ,  Steven Craig Bartling

IPC: H01L27/08 ,  H01L27/06

CPC classification number: H01L27/0805 ,  H01L27/0207 ,  H01L27/06 ,  H01L27/11507 ,  H01L27/11509 ,  H01L28/55 ,  H01L29/92

Abstract: Ferroelectric capacitor structures for integrated decoupling capacitors and the like. The ferroelectric capacitor structure includes two or more ferroelectric capacitors connected in series with one another between voltage nodes. The series connection of the ferroelectric capacitors reduces the applied voltage across each, enabling the use of rough ferroelectric dielectric material, such as PZT deposited by MOCVD. Matched construction of the series-connected capacitors, as well as uniform polarity of the applied voltage across each, is beneficial in reducing the maximum voltage across any one of the capacitors, reducing the vulnerability to dielectric breakdown.

Abstract translation: 用于集成去耦电容器的铁电电容器结构等。 铁电电容器结构包括在电压节点之间彼此串联连接的两个或更多个铁电电容器。 铁电电容器的串联连接减少了施加的电压，使得能够使用由MOCVD沉积的诸如PZT的粗铁电介质材料。 串联电容器的匹配结构以及每个电容器的施加电压的均匀极性有利于降低跨任何一个电容器的最大电压，从而降低了介质击穿的难度。