公开(公告)号：US09607946B2

公开(公告)日：2017-03-28

申请号：US13967409

申请日：2013-08-15

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： You-Hua Chou ,  Min Hao Hong ,  Jian-Shin Tsai ,  Miao-Cheng Liao ,  Hsiang Hsiang Ko

IPC: H01L23/532 ,  H01L21/768

CPC classification number: H01L23/53238 ,  H01L21/768 ,  H01L21/76841 ,  H01L21/76852 ,  H01L21/76885 ,  H01L23/5329 ,  H01L2924/0002 ,  H01L2924/00

Abstract: The present disclosure relates to a method of forming a back-end-of-the-line metallization layer. The method is performed by forming a plurality of freestanding metal layer structures (i.e., metal layer structures not surrounded by a dielectric material) on a semiconductor substrate within an area defined by a patterned photoresist layer. A diffusion barrier layer is deposited onto the metal layer structure in a manner such that the diffusion barrier layer conforms to the top and sides of the metal layer structure. A dielectric material is formed on the surface of the substrate to fill areas between metal layer structures. The substrate is planarized to remove excess metal and dielectric material and to expose the top of the metal layer structure.

公开(公告)号：US20170250211A1

公开(公告)日：2017-08-31

申请号：US15054094

申请日：2016-02-25

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chao-Ching Chang ,  Sheng-Chan Li ,  Chih-Hui Huang ,  Jian-Shin Tsai ,  Cheng-Yi Wu ,  Chia-Hsing Chou ,  Yi-Ming Lin ,  Min-Hui Lin ,  Chin-Szu Lee

IPC: H01L27/146 ,  H01L21/02 ,  H01L21/762

CPC classification number: H01L27/1463 ,  H01L21/02211 ,  H01L21/02274 ,  H01L21/0228 ,  H01L21/76224 ,  H01L27/1464 ,  H01L27/14643 ,  H01L27/14683

Abstract: Semiconductor image sensor devices and manufacturing method of the same are disclosed. The semiconductor image sensor device includes a substrate, a first pixel and a second pixel, and an isolation structure. The first pixel and second pixel are disposed in the substrate, wherein the first and second pixels are neighboring pixels. The isolation structure is disposed in the substrate and between the first and second pixels, wherein the isolation structure includes a dielectric layer, and the dielectric layer includes silicon oxycarbonitride (SiOCN).

公开(公告)号：US10062656B2

公开(公告)日：2018-08-28

申请号：US15236526

申请日：2016-08-15

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Chao-Ching Chang ,  Sheng-Chan Li ,  Wen-Jen Tsai ,  Chih-Hui Huang ,  Jian-Shin Tsai ,  Cheng-Yi Wu ,  Yi-Ming Lin ,  Min-Hui Lin

IPC: H01L23/00

CPC classification number: H01L24/02 ,  H01L23/291 ,  H01L23/3192 ,  H01L24/03 ,  H01L24/05 ,  H01L24/08 ,  H01L24/80 ,  H01L2224/02251 ,  H01L2224/0226 ,  H01L2224/02331 ,  H01L2224/0237 ,  H01L2224/0239 ,  H01L2224/024 ,  H01L2224/03011 ,  H01L2224/0345 ,  H01L2224/03462 ,  H01L2224/03616 ,  H01L2224/05008 ,  H01L2224/05022 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05547 ,  H01L2224/05571 ,  H01L2224/05572 ,  H01L2224/05583 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/08145 ,  H01L2224/08147 ,  H01L2224/08148 ,  H01L2224/80001 ,  H01L2224/80895 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/0504 ,  H01L2924/0544 ,  H01L2924/05442 ,  H01L2924/059 ,  H01L2924/00012 ,  H01L2924/00014

Abstract: A semiconductor device includes a substrate, a dielectric structure, a top metal layer and a bonding structure. The dielectric structure is disposed on the substrate. The top metal layer is disposed in the dielectric structure. The bonding structure is disposed on the dielectric structure and the top metal layer. The bonding structure includes a silicon oxide layer, a silicon oxy-nitride layer, a conductive bonding layer and a barrier layer. The silicon oxide layer is disposed on the dielectric structure. The silicon oxy-nitride layer covers the silicon oxide layer. The conductive bonding layer is disposed in the silicon oxide layer and the silicon oxy-nitride layer. The barrier layer covers a sidewall and a bottom of the conductive bonding layer.

公开(公告)号：US20170207298A1

公开(公告)日：2017-07-20

申请号：US14996235

申请日：2016-01-15

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chao-Ching Chang ,  Cheng-Yi Wu ,  Jian-Shin Tsai ,  Min-Hui Lin ,  Yi-Ming Lin ,  Chin-Szu Lee ,  Wen-Shan Chang ,  Yi-Hui Chen

IPC: H01L49/02

CPC classification number: H01L28/60

Abstract: Semiconductor devices and manufacturing method thereof are disclosed. The semiconductor device includes a substrate, a device layer, first and second conductive layers, first and second vias, and a MIM capacitor structure. The substrate includes active and passive regions. The device layer is in the active region. The first conductive layer is over the device layer. The second conductive layer is over the first conductive layer, wherein the first conductive layer is disposed between the device layer and the second conductive layer. The first via electrically connects the first and the second conductive layers. The MIM capacitor structure is between the first and the second conductive layers and in the passive region, and includes first and second electrodes and a capacitor dielectric layer therebetween. The capacitor dielectric layer includes Group IIIA-metal oxide or nitride. The second via electrically connects the second conductive layer and one of the first and second electrodes.

公开(公告)号：US20130328198A1

公开(公告)日：2013-12-12

申请号：US13967409

申请日：2013-08-15

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： You-Hua Chou ,  Min Hao Hong ,  Jian-Shin Tsai ,  Miao-Cheng Liao ,  Hsiang Hsiang Ko

IPC: H01L23/532

CPC classification number: H01L23/53238 ,  H01L21/768 ,  H01L21/76841 ,  H01L21/76852 ,  H01L21/76885 ,  H01L23/5329 ,  H01L2924/0002 ,  H01L2924/00

Abstract: The present disclosure relates to a method of forming a back-end-of-the-line metallization layer. The method is performed by forming a plurality of freestanding metal layer structures (i.e., metal layer structures not surrounded by a dielectric material) on a semiconductor substrate within an area defined by a patterned photoresist layer. A diffusion barrier layer is deposited onto the metal layer structure in a manner such that the diffusion barrier layer conforms to the top and sides of the metal layer structure. A dielectric material is formed on the surface of the substrate to fill areas between metal layer structures. The substrate is planarized to remove excess metal and dielectric material and to expose the top of the metal layer structure.

Abstract translation: 本公开涉及一种形成后端金属化层的方法。 通过在由图案化的光致抗蚀剂层限定的区域内的半导体衬底上形成多个独立金属层结构（即，不被电介质材料包围的金属层结构）来执行该方法。 扩散阻挡层以使得扩散阻挡层符合金属层结构的顶部和侧面的方式沉积到金属层结构上。 在基板的表面上形成电介质材料以填充金属层结构之间的区域。 将衬底平坦化以除去多余的金属和电介质材料并露出金属层结构的顶部。

公开(公告)号：US11189654B2

公开(公告)日：2021-11-30

申请号：US16900985

申请日：2020-06-14

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chao-Ching Chang ,  Sheng-Chan Li ,  Chih-Hui Huang ,  Jian-Shin Tsai ,  Cheng-Yi Wu ,  Chia-Hsing Chou ,  Yi-Ming Lin ,  Min-Hui Lin ,  Chin-Szu Lee

IPC: H01L21/02 ,  H01L27/146 ,  H01L21/762

Abstract: A plurality of radiation-sensing doped regions are formed in a substrate. A trench is formed in the substrate between the radiation-sensing doped regions. A SiOCN layer is filled in the trench by reacting Bis(tertiary-butylamino)silane (BTBAS) and a gas mixture comprising N2O, N2 and O2 through a plasma enhanced atomic layer deposition (PEALD) method, to form an isolation structure between the radiation-sensing doped regions.

公开(公告)号：US10186454B2

公开(公告)日：2019-01-22

申请号：US15623481

申请日：2017-06-15

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Cheng-Han Lin ,  Han-Sheng Weng ,  Chao-Ching Chang ,  Jian-Shin Tsai ,  Yi-Ming Lin ,  Min-Hui Lin

IPC: H01L21/20 ,  H01L21/469 ,  H01L23/12 ,  H01L21/768 ,  H01L23/535 ,  H01L23/48 ,  H01L23/532 ,  H01L21/02

Abstract: A semiconductor structure includes a first dielectric layer, a first conductive via, a second conductive via and an etch stop layer. The first conductive via and the second conductive via are respectively disposed in the first dielectric layer. The etch stop layer is disposed on the first dielectric layer and contacts the first and second conductive vias. The etch stop layer includes nitrogen-and-oxygen-doped silicon carbide (NODC).

公开(公告)号：US20180047682A1

公开(公告)日：2018-02-15

申请号：US15236526

申请日：2016-08-15

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Chao-Ching Chang ,  Sheng-Chan Li ,  Wen-Jen Tsai ,  Chih-Hui Huang ,  Jian-Shin Tsai ,  Cheng-Yi Wu ,  Yi-Ming Lin ,  Min-Hui Lin

IPC: H01L23/00

CPC classification number: H01L24/02 ,  H01L21/02107 ,  H01L23/291 ,  H01L23/3192 ,  H01L24/03 ,  H01L24/05 ,  H01L24/08 ,  H01L24/80 ,  H01L2224/02251 ,  H01L2224/0226 ,  H01L2224/02331 ,  H01L2224/0237 ,  H01L2224/0239 ,  H01L2224/024 ,  H01L2224/03011 ,  H01L2224/0345 ,  H01L2224/03462 ,  H01L2224/03616 ,  H01L2224/05008 ,  H01L2224/05022 ,  H01L2224/05547 ,  H01L2224/05571 ,  H01L2224/05572 ,  H01L2224/05583 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/08145 ,  H01L2224/08147 ,  H01L2224/08148 ,  H01L2224/80001 ,  H01L2224/80895 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/0504 ,  H01L2924/0544 ,  H01L2924/05442 ,  H01L2924/059 ,  H01L2924/00012 ,  H01L2924/00014

Abstract: A semiconductor device includes a substrate, a dielectric structure, a top metal layer and a bonding structure. The dielectric structure is disposed on the substrate. The top metal layer is disposed in the dielectric structure. The bonding structure is disposed on the dielectric structure and the top metal layer. The bonding structure includes a silicon oxide layer, a silicon oxy-nitride layer, a conductive bonding layer and a barrier layer. The silicon oxide layer is disposed on the dielectric structure. The silicon oxy-nitride layer covers the silicon oxide layer. The conductive bonding layer is disposed in the silicon oxide layer and the silicon oxy-nitride layer. The barrier layer covers a sidewall and a bottom of the conductive bonding layer.

公开(公告)号：US20200312894A1

公开(公告)日：2020-10-01

申请号：US16900985

申请日：2020-06-14

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chao-Ching Chang ,  Sheng-Chan Li ,  Chih-Hui Huang ,  Jian-Shin Tsai ,  Cheng-Yi Wu ,  Chia-Hsing Chou ,  Yi-Ming Lin ,  Min-Hui Lin ,  Chin-Szu Lee

IPC: H01L27/146 ,  H01L21/762 ,  H01L21/02

Abstract: A plurality of radiation-sensing doped regions are formed in a substrate. A trench is formed in the substrate between the radiation-sensing doped regions. A SiOCN layer is filled in the trench by reacting Bis(tertiary-butylamino)silane (BTBAS) and a gas mixture comprising N2O, N2 and O2 through a plasma enhanced atomic layer deposition (PEALD) method, to form an isolation structure between the radiation-sensing doped regions.

公开(公告)号：US10050102B2

公开(公告)日：2018-08-14

申请号：US14996235

申请日：2016-01-15

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chao-Ching Chang ,  Cheng-Yi Wu ,  Jian-Shin Tsai ,  Min-Hui Lin ,  Yi-Ming Lin ,  Chin-Szu Lee ,  Wen-Shan Chang ,  Yi-Hui Chen

IPC: H01L21/02 ,  H01L49/02

Abstract: Semiconductor devices and manufacturing method thereof are disclosed. The semiconductor device includes a substrate, a device layer, first and second conductive layers, first and second vias, and a MIM capacitor structure. The substrate includes active and passive regions. The device layer is in the active region. The first conductive layer is over the device layer. The second conductive layer is over the first conductive layer, wherein the first conductive layer is disposed between the device layer and the second conductive layer. The first via electrically connects the first and the second conductive layers. The MIM capacitor structure is between the first and the second conductive layers and in the passive region, and includes first and second electrodes and a capacitor dielectric layer therebetween. The capacitor dielectric layer includes Group IIIA-metal oxide or nitride. The second via electrically connects the second conductive layer and one of the first and second electrodes.