公开(公告)号：US20220356571A1

公开(公告)日：2022-11-10

申请号：US17871810

申请日：2022-07-22

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Peng-Cheng HONG ,  Jun-Liang Pu ,  W.L. Hsu ,  Chung-Hao Kao ,  Chia-Chun Hung ,  Cheng-Yi Wu ,  Chin-Szu Lee

IPC分类号： C23C16/44 ,  C23C14/02 ,  C23C18/18 ,  B29D99/00 ,  C23C14/34 ,  C25D7/04 ,  H01J37/32 ,  C23C14/20

摘要： A method of making a sealing article that includes a body and a coating layer disposed on at least one surface of the body. The body comprises a polymeric elastomer such as perfluoroelastomer or fluoroelastomer. The coating layer comprises at least one metal. The sealing article may be a seal, a gasket, an O-ring, a T-ring or any other suitable product. The sealing article is resistant to ultra-violet (UV) light and plasma, and may be used for sealing a semiconductor processing chamber.

公开(公告)号：US10957540B2

公开(公告)日：2021-03-23

申请号：US16719311

申请日：2019-12-18

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Wen-Chin Chen ,  Cheng-Yi Wu ,  Yu-Hung Cheng ,  Ren-Hua Guo ,  Hsiang Liu ,  Chin-Szu Lee

IPC分类号： H01L31/102 ,  H01L21/00 ,  H01L21/20 ,  H01L29/66 ,  H01L29/04 ,  H01L21/02 ,  H01L29/08 ,  H01L29/78 ,  H01L29/165 ,  H01L21/306

摘要： A method includes providing a semiconductor structure having an active region and an isolation structure adjacent to the active region, the active region having source and drain regions sandwiching a channel region for a transistor, the semiconductor structure further having a gate structure over the channel region. The method further includes etching a trench in one of the source and drain regions, wherein the trench exposes a portion of a sidewall of the isolation structure, epitaxially growing a first semiconductor layer in the trench, epitaxially growing a second semiconductor layer over the first semiconductor layer, changing a crystalline facet orientation of a portion of a top surface of the second semiconductor layer by an etching process, and epitaxially growing a third semiconductor layer over the second semiconductor layer after the changing of the crystalline facet orientation.

公开(公告)号：US10658296B2

公开(公告)日：2020-05-19

申请号：US15282258

申请日：2016-09-30

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Cheng-Yi Wu ,  Li-Hsuan Chu ,  Ching-Wen Wen ,  Chia-Chun Hung ,  Chen Liang Chang ,  Chin-Szu Lee ,  Hsiang Liu

IPC分类号： H01L21/00 ,  H01L23/532 ,  H01L27/146 ,  H01L21/02 ,  H01L21/768 ,  H01L21/762 ,  H01L23/48 ,  H01L23/528 ,  H01L23/485

摘要： A method for semiconductor manufacturing is disclosed. The method includes receiving a device having a first surface through which a first metal or an oxide of the first metal is exposed. The method further includes depositing a dielectric film having Si, N, C, and O over the first surface such that the dielectric film has a higher concentration of N and C in a first portion of the dielectric film near the first surface than in a second portion of the dielectric film further away from the first surface than the first portion. The method further includes forming a conductive feature over the dielectric film. The dielectric film electrically insulates the conductive feature from the first metal or the oxide of the first metal.

公开(公告)号：US20170250211A1

公开(公告)日：2017-08-31

申请号：US15054094

申请日：2016-02-25

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Chao-Ching Chang ,  Sheng-Chan Li ,  Chih-Hui Huang ,  Jian-Shin Tsai ,  Cheng-Yi Wu ,  Chia-Hsing Chou ,  Yi-Ming Lin ,  Min-Hui Lin ,  Chin-Szu Lee

IPC分类号： H01L27/146 ,  H01L21/02 ,  H01L21/762

CPC分类号： H01L27/1463 ,  H01L21/02211 ,  H01L21/02274 ,  H01L21/0228 ,  H01L21/76224 ,  H01L27/1464 ,  H01L27/14643 ,  H01L27/14683

摘要： Semiconductor image sensor devices and manufacturing method of the same are disclosed. The semiconductor image sensor device includes a substrate, a first pixel and a second pixel, and an isolation structure. The first pixel and second pixel are disposed in the substrate, wherein the first and second pixels are neighboring pixels. The isolation structure is disposed in the substrate and between the first and second pixels, wherein the isolation structure includes a dielectric layer, and the dielectric layer includes silicon oxycarbonitride (SiOCN).

公开(公告)号：US20190131134A1

公开(公告)日：2019-05-02

申请号：US15797869

申请日：2017-10-30

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Hong-Ying LIN ,  Cheng-Yi Wu ,  Alan Tu ,  Chung-Liang Cheng ,  Li-Hsuan Chu ,  Ethan Hsiao ,  Hui-Lin Sung ,  Sz-Yuan Hung ,  Sean Lo ,  C.W. Chiu ,  Chih-Wei Hsieh ,  Chin-Szu Lee

IPC分类号： H01L21/285 ,  H01L23/532 ,  H01L23/535 ,  H01L29/08 ,  H01L29/78 ,  H01L29/66 ,  H01L21/768

摘要： A semiconductor device includes: a fin structure disposed on a substrate; a gate feature that traverses the fin structure to overlay a central portion of the fin structure; a pair of source/drain features, along the fin structure, that are disposed at respective sides of the gate feature; and a plurality of contact structures that are formed of tungsten, wherein a gate electrode of the gate feature and the pair of source/drain features are each directly coupled to a respective one of the plurality of contact structures.

公开(公告)号：US10147609B2

公开(公告)日：2018-12-04

申请号：US15475826

申请日：2017-03-31

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Wen-Chin Chen ,  Cheng-Yi Wu ,  Yu-Hung Cheng ,  Ren-Hua Guo ,  Hsiang Liu ,  Chin-Szu Lee

IPC分类号： H01L21/336 ,  H01L29/78 ,  H01L21/20 ,  H01L29/66 ,  H01L29/04

摘要： A method includes providing a semiconductor structure having an active region and an isolation structure adjacent to the active region, the active region having source and drain regions sandwiching a channel region for a transistor, the semiconductor structure further having a gate structure over the channel region. The method further includes etching a trench in one of the source and drain regions, wherein the trench exposes a portion of a sidewall of the isolation structure, epitaxially growing a first semiconductor layer in the trench, epitaxially growing a second semiconductor layer over the first semiconductor layer, changing a crystalline facet orientation of a portion of a top surface of the second semiconductor layer by an etching process, and epitaxially growing a third semiconductor layer over the second semiconductor layer after the changing of the crystalline facet orientation.

公开(公告)号：US20180337128A1

公开(公告)日：2018-11-22

申请号：US16050058

申请日：2018-07-31

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Cheng-Yi Wu ,  Li-Hsuan Chu ,  Ching-Wen Wen ,  Chia-Chun Hung ,  Chen Liang Chang ,  Chin-Szu Lee ,  Hsiang Liu

IPC分类号： H01L23/532 ,  H01L27/146 ,  H01L21/02 ,  H01L23/528 ,  H01L21/768

CPC分类号： H01L23/5329 ,  H01L21/0214 ,  H01L21/02211 ,  H01L21/02271 ,  H01L21/0228 ,  H01L21/76843 ,  H01L21/76877 ,  H01L23/5283 ,  H01L23/53223 ,  H01L23/53238 ,  H01L27/14614 ,  H01L27/1463 ,  H01L27/14634 ,  H01L27/14636 ,  H01L27/14643 ,  H01L27/14687

摘要： A method for semiconductor manufacturing is disclosed. The method includes receiving a device having a first surface through which a first metal or an oxide of the first metal is exposed. The method further includes depositing a dielectric film having Si, N, C, and O over the first surface such that the dielectric film has a higher concentration of N and C in a first portion of the dielectric film near the first surface than in a second portion of the dielectric film further away from the first surface than the first portion. The method further includes forming a conductive feature over the dielectric film. The dielectric film electrically insulates the conductive feature from the first metal or the oxide of the first metal.

公开(公告)号：US20180175196A1

公开(公告)日：2018-06-21

申请号：US15475826

申请日：2017-03-31

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Wen-Chin Chen ,  Cheng-Yi Wu ,  Yu-Hung Cheng ,  Ren-Hua Guo ,  Hsiang Liu ,  Chin-Szu Lee

IPC分类号： H01L29/78 ,  H01L29/04 ,  H01L29/06 ,  H01L29/161 ,  H01L29/66 ,  H01L21/768

CPC分类号： H01L21/2022 ,  H01L21/02381 ,  H01L21/0243 ,  H01L21/0245 ,  H01L21/02502 ,  H01L21/02516 ,  H01L21/02532 ,  H01L21/02579 ,  H01L21/0262 ,  H01L21/02636 ,  H01L21/02639 ,  H01L21/30608 ,  H01L29/045 ,  H01L29/0847 ,  H01L29/165 ,  H01L29/66287 ,  H01L29/66628 ,  H01L29/66636 ,  H01L29/7848

摘要： A method includes providing a semiconductor structure having an active region and an isolation structure adjacent to the active region, the active region having source and drain regions sandwiching a channel region for a transistor, the semiconductor structure further having a gate structure over the channel region. The method further includes etching a trench in one of the source and drain regions, wherein the trench exposes a portion of a sidewall of the isolation structure, epitaxially growing a first semiconductor layer in the trench, epitaxially growing a second semiconductor layer over the first semiconductor layer, changing a crystalline facet orientation of a portion of a top surface of the second semiconductor layer by an etching process, and epitaxially growing a third semiconductor layer over the second semiconductor layer after the changing of the crystalline facet orientation.

公开(公告)号：US20220223528A1

公开(公告)日：2022-07-14

申请号：US17712306

申请日：2022-04-04

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Cheng-Yi Wu ,  Li-Hsuan Chu ,  Ching-Wen Wen ,  Chia-Chun Hung ,  Chen Liang Chang ,  Chin-Szu Lee ,  Hsiang Liu

IPC分类号： H01L23/532 ,  H01L27/146 ,  H01L21/02 ,  H01L21/768 ,  H01L21/762 ,  H01L23/48 ,  H01L23/528

摘要： A method for semiconductor manufacturing is disclosed. The method includes receiving a device having a first surface through which a first metal or an oxide of the first metal is exposed. The method further includes depositing a dielectric film having Si, N, C, and O over the first surface such that the dielectric film has a higher concentration of N and C in a first portion of the dielectric film near the first surface than in a second portion of the dielectric film further away from the first surface than the first portion. The method further includes forming a conductive feature over the dielectric film. The dielectric film electrically insulates the conductive feature from the first metal or the oxide of the first metal.

公开(公告)号：US20180350601A1

公开(公告)日：2018-12-06

申请号：US16043286

申请日：2018-07-24

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Wen-Chin Chen ,  Cheng-Yi Wu ,  Yu-Hung Cheng ,  Ren-Hua Guo ,  Hsiang Liu ,  Chin-Szu Lee

IPC分类号： H01L21/20 ,  H01L29/66 ,  H01L29/04 ,  H01L21/02

摘要： A method includes providing a semiconductor structure having an active region and an isolation structure adjacent to the active region, the active region having source and drain regions sandwiching a channel region for a transistor, the semiconductor structure further having a gate structure over the channel region. The method further includes etching a trench in one of the source and drain regions, wherein the trench exposes a portion of a sidewall of the isolation structure, epitaxially growing a first semiconductor layer in the trench, epitaxially growing a second semiconductor layer over the first semiconductor layer, changing a crystalline facet orientation of a portion of a top surface of the second semiconductor layer by an etching process, and epitaxially growing a third semiconductor layer over the second semiconductor layer after the changing of the crystalline facet orientation.