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    Semiconductor integrated circuit
    4.
    发明授权
    Semiconductor integrated circuit 失效
    半导体集成电路

    公开(公告)号：US06531735B1

    公开(公告)日：2003-03-11

    申请号：US09660923

    申请日：2000-09-13

    申请人： Yoshiaki Kamigaki ,  Shinichi Minami ,  Kozo Katayama ,  Masataka Kato

    发明人： Yoshiaki Kamigaki ,  Shinichi Minami ,  Kozo Katayama ,  Masataka Kato

    IPC分类号： H01L29792

    CPC分类号： H01L27/11568 ,  G11C11/5671 ,  G11C16/0475 ,  H01L21/28273 ,  H01L21/28282 ,  H01L27/0207 ,  H01L27/105 ,  H01L27/115 ,  H01L27/11519 ,  H01L27/11521 ,  H01L29/66825 ,  H01L29/66833 ,  H01L29/7887 ,  H01L29/7923

    摘要： A multi-storage nonvolatile memory of high density, high speed and high reliability has a memory transistor and switch transistors disposed on both the sides of the memory transistor. The memory transistor includes a gate insulating film having discrete traps and a memory gate electrode, whereas the switch transistors include switch gate electrodes. The gate insulating film has the discrete traps for storing information charge, can locally inject carriers, and one memory cell constitutes a multi-storage cell for storing at least information of 2 bits. The switch transistors having the switch gate electrodes realize source side injection. The memory transistor is fommed together with the switch transistors in self-aligned diffusion. The memory gate electrode of the memory transistor is connected to a word line so as to perform word-line erase.

    摘要翻译： 高密度，高速度和高可靠性的多存储非易失性存储器具有置于存储晶体管的两侧的存储晶体管和开关晶体管。 存储晶体管包括具有离散陷阱和存储栅电极的栅极绝缘膜，而开关晶体管包括开关栅电极。 栅极绝缘膜具有用于存储信息电荷的离散陷阱，可以局部注入载流子，并且一个存储器单元构成用于至少存储2位信息的多存储单元。 具有开关栅电极的开关晶体管实现源极侧注入。 存储晶体管与自对准扩散中的开关晶体管一起发生。 存储晶体管的存储栅电极连接到字线，以便执行字线擦除。

    Semiconductor integrated circuit
    5.
    发明申请
    Semiconductor integrated circuit 失效

    公开(公告)号：US20060102967A1

    公开(公告)日：2006-05-18

    申请号：US11320850

    申请日：2005-12-30

    申请人： Yoshiaki Kamigaki ,  Shinichi Minami ,  Kozo Katayama ,  Masataka Kato

    发明人： Yoshiaki Kamigaki ,  Shinichi Minami ,  Kozo Katayama ,  Masataka Kato

    IPC分类号： H01L29/76

    CPC分类号： G11C16/0475 ,  H01L27/115 ,  H01L27/11521 ,  H01L27/11524 ,  H01L29/42332 ,  H01L29/7887

    摘要： A multi-storage nonvolatile memory of high density, high speed and high reliability has a memory transistor and switch transistors disposed on both the sides of the memory transistor. The memory transistor includes a gate insulating film having discrete traps and a memory gate electrode, whereas the switch transistors include switch gate electrodes. The gate insulating film has the discrete traps for storing information charge, can locally inject carriers, and one memory cell constitutes a multi-storage cell for storing at least information of 2 bits. The switch transistors having the switch gate electrodes realize source side injection. The memory transistor is fommed together with the switch transistors in self-aligned diffusion. The memory gate electrode of the memory transistor is connected to a word line so as to perform word-line erase.

    Nonvolatile memory device with multi-bit memory cells having plural side gates
    6.
    发明授权
    Nonvolatile memory device with multi-bit memory cells having plural side gates 有权
    具有多个存储单元的非易失性存储器件具有多个侧栅极

    公开(公告)号：US06936888B2

    公开(公告)日：2005-08-30

    申请号：US10676158

    申请日：2003-10-02

    申请人： Kozo Katayama ,  Yoshiaki Kamigaki ,  Shinichi Minami

    发明人： Kozo Katayama ,  Yoshiaki Kamigaki ,  Shinichi Minami

    IPC分类号： B42D15/10 ,  G06K19/07 ,  G06K19/077 ,  G11C16/02 ,  G11C16/04 ,  G11C16/06 ,  G11C16/10 ,  G11C16/14 ,  G11C16/26 ,  H01L21/8247 ,  H01L27/10 ,  H01L27/115 ,  H01L29/788 ,  H01L29/792 ,  H01L29/76

    CPC分类号： H01L27/115 ,  G11C16/0475 ,  G11C16/10 ,  G11C16/14 ,  G11C16/26 ,  H01L29/7923

    摘要： A nonvolatile memory device has a plurality of nonvolatile memory cells in which a memory gate electrode is formed over a first semiconductor region with a gate insulating film and a gate nitride film interposed therebetween. First and second switch gate electrodes, and first and second signal electrodes used as source/drain electrodes are formed on both sides of the memory gate electrode. Electrons are injected into the gate nitride film from the source side to store information in the memory cells. The memory gate electrode and the switch gate electrodes extend in the same direction. The application of a high electric field to a memory cell which is not selected for writing can be avoided owing to the switch gate electrodes being held in a cut-off state.

    摘要翻译： 非易失性存储器件具有多个非易失性存储单元，其中存储栅极电极形成在第一半导体区域上，栅极绝缘膜和栅极氮化物膜介于其间。 第一和第二开关栅电极以及用作源/漏电极的第一和第二信号电极形成在存储栅电极的两侧。 从源极将电子注入到栅极氮化物膜中，以将信息存储在存储单元中。 存储栅电极和开关栅电极沿相同方向延伸。 由于开关栅极被保持在截止状态，因此可以避免对未被选择用于写入的存储单元施加高电场。

    Semiconductor integrated circuit having discrete trap type memory cells
    9.
    发明授权
    Semiconductor integrated circuit having discrete trap type memory cells 失效
    具有离散陷阱型存储单元的半导体集成电路

    公开(公告)号：US07190023B2

    公开(公告)日：2007-03-13

    申请号：US11320850

    申请日：2005-12-30

    申请人： Yoshiaki Kamigaki ,  Shinichi Minami ,  Kozo Katayama ,  Masataka Kato

    发明人： Yoshiaki Kamigaki ,  Shinichi Minami ,  Kozo Katayama ,  Masataka Kato

    IPC分类号： H01L29/788

    CPC分类号： G11C16/0475 ,  H01L27/115 ,  H01L27/11521 ,  H01L27/11524 ,  H01L29/42332 ,  H01L29/7887

    摘要： A multi-storage nonvolatile memory of high density, high speed and high reliability has a memory transistor and switch transistors disposed on both the sides of the memory transistor. The memory transistor includes a gate insulating film having discrete traps and a memory gate electrode, whereas the switch transistors include switch gate electrodes. The gate insulating film has the discrete traps for storing information charge, can locally inject carriers, and one memory cell constitutes a multi-storage cell for storing at least information of 2 bits. The switch transistors having the switch gate electrodes realize source side injection. The memory transistor is fommed together with the switch transistors in self-aligned diffusion. The memory gate electrode of the memory transistor is connected to a word line so as to perform word-line erase.

    摘要翻译： 高密度，高速度和高可靠性的多存储非易失性存储器具有置于存储晶体管的两侧的存储晶体管和开关晶体管。 存储晶体管包括具有离散陷阱和存储栅电极的栅极绝缘膜，而开关晶体管包括开关栅电极。 栅极绝缘膜具有用于存储信息电荷的离散陷阱，可以局部注入载流子，并且一个存储器单元构成用于至少存储2位信息的多存储单元。 具有开关栅电极的开关晶体管实现源极侧注入。 存储晶体管与自对准扩散中的开关晶体管一起发生。 存储晶体管的存储栅电极连接到字线，以便执行字线擦除。