SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
    2.
    发明申请
    SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE 有权
    半导体集成电路设备

    公开(公告)号:US20090250680A1

    公开(公告)日:2009-10-08

    申请号:US12487492

    申请日:2009-06-18

    IPC分类号: H01L47/00

    摘要: With a high-speed nonvolatile phase change memory, reliability in respect of the number of refresh times is enhanced. In a memory cell forming area of a phase change memory using a MISFET as a transistor for selection of memory cells, a phase change material layer of a memory cell comprising a resistor element, using a phase change material, is formed for common use. As a result, variation in shape and a change in composition of the phase change material, caused by isolation of memory cell elements by etching, are reduced, thereby enhancing reliability of memory cells, in respect of the number of refresh times.

    摘要翻译: 通过高速非易失性相变存储器,提高了刷新次数的可靠性。 在使用MISFET作为选择存储单元的晶体管的相变存储器的存储单元形成区域中,形成了使用相变材料的包括电阻元件的存储单元的相变材料层,用于常用。 结果,减少了通过蚀刻对存储单元元件的隔离而导致的相变材料的形状变化和组成变化,从而提高了存储单元的刷新次数的可靠性。

    Semiconductor integrated circuit device
    5.
    发明授权
    Semiconductor integrated circuit device 有权
    半导体集成电路器件

    公开(公告)号:US08129707B2

    公开(公告)日:2012-03-06

    申请号:US12487492

    申请日:2009-06-18

    IPC分类号: H01L47/00

    摘要: With a high-speed nonvolatile phase change memory, reliability in respect of the number of refresh times is enhanced. In a memory cell forming area of a phase change memory using a MISFET as a transistor for selection of memory cells, a phase change material layer of a memory cell comprising a resistor element, using a phase change material, is formed for common use. As a result, variation in shape and a change in composition of the phase change material, caused by isolation of memory cell elements by etching, are reduced, thereby enhancing reliability of memory cells, in respect of the number of refresh times.

    摘要翻译: 通过高速非易失性相变存储器,提高了刷新次数的可靠性。 在使用MISFET作为选择存储单元的晶体管的相变存储器的存储单元形成区域中,形成了使用相变材料的包括电阻元件的存储单元的相变材料层,用于常用。 结果,减少了通过蚀刻对存储单元元件的隔离而导致的相变材料的形状变化和组成变化,从而提高了存储单元的刷新次数的可靠性。

    Semiconductor memory cell and method of forming same
    8.
    发明申请
    Semiconductor memory cell and method of forming same 审中-公开
    半导体存储单元及其形成方法

    公开(公告)号:US20080121860A1

    公开(公告)日:2008-05-29

    申请号:US12007851

    申请日:2008-01-16

    IPC分类号: H01L29/66 G11C11/00

    摘要: A semiconductor memory cell and forming method thereof utilizes a vertical select transistor to eliminate the problem of a large cell surface area in memory cells of the related art utilizing phase changes. A memory cell with a smaller surface area than the DRAM device of the related art is achieved by the present invention. Besides low power consumption during read operation, the invention also provides phase change memory having low power consumption even during write operation. Phase change memory also has stable read-out operation.

    摘要翻译: 半导体存储单元及其形成方法利用垂直选择晶体管来消除利用相位变化的现有技术的存储单元中的大的单元表面积的问题。 通过本发明实现了具有比现有技术的DRAM器件更小的表面积的存储单元。 除了读取操作中的低功耗之外,本发明还提供即使在写入操作期间具有低功耗的相变存储器。 相变存储器也具有稳定的读出操作。