公开(公告)号：US08470672B2

公开(公告)日：2013-06-25

申请号：US13220756

申请日：2011-08-30

申请人： Takeshi Endo ,  Shinichiro Miyahara ,  Tomoo Morino ,  Masaki Konishi ,  Hirokazu Fujiwara ,  Jun Morimoto ,  Tsuyoshi Ishikawa ,  Takashi Katsuno ,  Yukihiko Watanabe

发明人： Takeshi Endo ,  Shinichiro Miyahara ,  Tomoo Morino ,  Masaki Konishi ,  Hirokazu Fujiwara ,  Jun Morimoto ,  Tsuyoshi Ishikawa ,  Takashi Katsuno ,  Yukihiko Watanabe

IPC分类号： H01L21/336 ,  H01L21/265

CPC分类号： H01L29/7813 ,  H01L21/30604 ,  H01L21/3065 ,  H01L29/1608 ,  H01L29/4236 ,  H01L29/66068

摘要： A method of manufacturing a semiconductor device includes forming a drift layer on a substrate; forming a base layer on the drift layer; forming a trench to penetrate the base layer and to reach the drift layer; rounding off a part of a shoulder corner and a part of a bottom corner of the trench; covering an inner wall of the trench with an organic film; implanting an impurity to a surface portion of the base layer; forming a source region by activating the implanted impurity; and removing the organic film after the source region is formed, in which the substrate, the drift layer, the base layer and the source region are made of silicon carbide, and the implanting and the activating of the impurity are performed under a condition that the trench is covered with the organic film.

摘要翻译： 制造半导体器件的方法包括在衬底上形成漂移层; 在漂移层上形成基层; 形成沟槽以穿透基层并到达漂移层; 将沟槽的一部分肩部角落和底角的一部分倒圆; 用有机膜覆盖沟槽的内壁; 将杂质注入基层的表面部分; 通过激活注入的杂质形成源区; 在形成源极区域之后除去有机膜，其中基板，漂移层，基极层和源极区域由碳化硅构成，并且杂质的注入和活化在 沟槽被有机膜覆盖。

公开(公告)号：US08436365B2

公开(公告)日：2013-05-07

申请号：US13031280

申请日：2011-02-21

申请人： Takeo Yamamoto ,  Takeshi Endo ,  Jun Morimoto ,  Hirokazu Fujiwara ,  Yukihiko Watanabe ,  Takashi Katsuno ,  Tsuyoshi Ishikawa

发明人： Takeo Yamamoto ,  Takeshi Endo ,  Jun Morimoto ,  Hirokazu Fujiwara ,  Yukihiko Watanabe ,  Takashi Katsuno ,  Tsuyoshi Ishikawa

IPC分类号： H01L29/16 ,  H01L29/47 ,  H01L29/872

CPC分类号： H01L29/47 ,  H01L21/0495 ,  H01L29/0619 ,  H01L29/063 ,  H01L29/1608 ,  H01L29/402 ,  H01L29/6606 ,  H01L29/872

摘要： A SiC semiconductor device having a Schottky barrier diode includes: a substrate made of SiC and having a first conductive type, wherein the substrate includes a main surface and a rear surface; a drift layer made of SiC and having the first conductive type, wherein the drift layer is disposed on the main surface of the substrate and has an impurity concentration lower than the substrate; a Schottky electrode disposed on the drift layer and has a Schottky contact with a surface of the drift layer; and an ohmic electrode disposed on the rear surface of the substrate. The Schottky electrode directly contacts the drift layer in such a manner that a lattice of the Schottky electrode is matched with a lattice of the drift layer.

摘要翻译： 具有肖特基势垒二极管的SiC半导体器件包括：由SiC制成并具有第一导电类型的衬底，其中所述衬底包括主表面和后表面; 由SiC制成并具有第一导电类型的漂移层，其中所述漂移层设置在所述衬底的主表面上并且具有低于所述衬底的杂质浓度; 肖特基电极，设置在漂移层上并与漂移层的表面具有肖特基接触; 以及设置在基板的后表面上的欧姆电极。 肖特基电极以使得肖特基电极的晶格与漂移层的晶格匹配的方式直接接触漂移层。

公开(公告)号：US20110204383A1

公开(公告)日：2011-08-25

申请号：US13031280

申请日：2011-02-21

申请人： Takeo YAMAMOTO ,  Takeshi Endo ,  Jun Morimoto ,  Hirokazu Fujiwara ,  Yukihiko Watanabe ,  Takashi Katsuno ,  Tsuyoshi Ishikawa

发明人： Takeo YAMAMOTO ,  Takeshi Endo ,  Jun Morimoto ,  Hirokazu Fujiwara ,  Yukihiko Watanabe ,  Takashi Katsuno ,  Tsuyoshi Ishikawa

IPC分类号： H01L29/24 ,  H01L21/329 ,  B82Y99/00 ,  B82Y40/00

CPC分类号： H01L29/47 ,  H01L21/0495 ,  H01L29/0619 ,  H01L29/063 ,  H01L29/1608 ,  H01L29/402 ,  H01L29/6606 ,  H01L29/872

摘要： A SiC semiconductor device having a Schottky barrier diode includes: a substrate made of SiC and having a first conductive type, wherein the substrate includes a main surface and a rear surface; a drift layer made of SiC and having the first conductive type, wherein the drift layer is disposed on the main surface of the substrate and has an impurity concentration lower than the substrate; a Schottky electrode disposed on the drift layer and has a Schottky contact with a surface of the drift layer; and an ohmic electrode disposed on the rear surface of the substrate. The Schottky electrode directly contacts the drift layer in such a manner that a lattice of the Schottky electrode is matched with a lattice of the drift layer.

摘要翻译： 具有肖特基势垒二极管的SiC半导体器件包括：由SiC制成并具有第一导电类型的衬底，其中所述衬底包括主表面和后表面; 由SiC制成并具有第一导电类型的漂移层，其中所述漂移层设置在所述衬底的主表面上并且具有低于所述衬底的杂质浓度; 肖特基电极，设置在漂移层上并与漂移层的表面具有肖特基接触; 以及设置在基板的后表面上的欧姆电极。 肖特基电极以使得肖特基电极的晶格与漂移层的晶格匹配的方式直接接触漂移层。

公开(公告)号：US20130330896A1

公开(公告)日：2013-12-12

申请号：US14000901

申请日：2012-09-04

申请人： Shinichiro Miyahara ,  Toshimasa Yamamoto ,  Hidefumi Takaya ,  Masahiro Sugimoto ,  Yukihiko Watanabe ,  Narumasa Soejima ,  Tsuyoshi Ishikawa

发明人： Shinichiro Miyahara ,  Toshimasa Yamamoto ,  Hidefumi Takaya ,  Masahiro Sugimoto ,  Yukihiko Watanabe ,  Narumasa Soejima ,  Tsuyoshi Ishikawa

IPC分类号： H01L29/66

CPC分类号： H01L29/66666 ,  H01L21/3065 ,  H01L29/1608 ,  H01L29/34 ,  H01L29/4236 ,  H01L29/66068 ,  H01L29/7813

摘要： A manufacturing method of a silicon carbide semiconductor device includes: forming a drift layer on a silicon carbide substrate; forming a base layer on or in a surface portion of the drift layer; forming a source region in a surface portion of the base layer; forming a trench to penetrate the base layer and to reach the drift layer; forming a gate electrode on a gate insulation film in the trench; forming a source electrode electrically connected to the source region and the base layer; and forming a drain electrode on a back surface of the substrate. The forming of the trench includes: flattening a substrate surface; and etching to form the trench after flattening.

摘要翻译： 碳化硅半导体器件的制造方法包括：在碳化硅衬底上形成漂移层; 在漂移层的表面部分上或其中形成基底层; 在所述基底层的表面部分中形成源区; 形成沟槽以穿透基层并到达漂移层; 在沟槽中的栅极绝缘膜上形成栅电极; 形成与源极区域和基极层电连接的源电极; 以及在所述基板的背面上形成漏电极。 沟槽的形成包括：使基底表面变平; 并进行蚀刻以在平坦化之后形成沟槽。

公开(公告)号：US20120181551A1

公开(公告)日：2012-07-19

申请号：US13348781

申请日：2012-01-12

申请人： Shinichiro Miyahara ,  Hidefumi Takaya ,  Masahiro Sugimoto ,  Yukihiko Watanabe ,  Narumasa Soejima ,  Tsuyoshi Ishikawa

发明人： Shinichiro Miyahara ,  Hidefumi Takaya ,  Masahiro Sugimoto ,  Yukihiko Watanabe ,  Narumasa Soejima ,  Tsuyoshi Ishikawa

IPC分类号： H01L29/24

CPC分类号： H01L21/0475 ,  H01L29/045 ,  H01L29/24 ,  H01L29/42356 ,  H01L29/66068

摘要： A silicon carbide semiconductor device includes a silicon carbide semiconductor substrate and a trench. The silicon carbide semiconductor substrate has an offset angle with respect to a (0001) plane or a (000-1) plane and has an offset direction in a direction. The trench is provided from a surface of the silicon carbide semiconductor substrate. The trench extends in a direction whose interior angle with respect to the offset direction is 30 degrees or −30 degrees.

摘要翻译： 碳化硅半导体器件包括碳化硅半导体衬底和沟槽。 碳化硅半导体衬底相对于（0001）面或（000-1）面具有偏移角，并且在<11-20>方向上具有偏移方向。 从碳化硅半导体衬底的表面提供沟槽。 沟槽沿相对于偏移方向的内角为30度或-30度的方向延伸。

公开(公告)号：US08525223B2

公开(公告)日：2013-09-03

申请号：US13450639

申请日：2012-04-19

申请人： Hiroki Watanabe ,  Shinichiro Miyahara ,  Masahiro Sugimoto ,  Hidefumi Takaya ,  Yukihiko Watanabe ,  Narumasa Soejima ,  Tsuyoshi Ishikawa

发明人： Hiroki Watanabe ,  Shinichiro Miyahara ,  Masahiro Sugimoto ,  Hidefumi Takaya ,  Yukihiko Watanabe ,  Narumasa Soejima ,  Tsuyoshi Ishikawa

IPC分类号： H01L21/02

CPC分类号： H01L29/7813 ,  H01L29/045 ,  H01L29/0634 ,  H01L29/1095 ,  H01L29/1608 ,  H01L29/66068 ,  H01L29/7397

摘要： A SiC semiconductor device includes: a SiC substrate including a first or second conductive type layer and a first conductive type drift layer and including a principal surface having an offset direction; a trench disposed on the drift layer and having a longitudinal direction; and a gate electrode disposed in the trench via a gate insulation film. A sidewall of the trench provides a channel formation surface. The vertical semiconductor device flows current along with the channel formation surface of the trench according to a gate voltage applied to the gate electrode. The offset direction of the SiC substrate is perpendicular to the longitudinal direction of the trench.

摘要翻译： SiC半导体器件包括：SiC衬底，包括第一或第二导电类型层和第一导电类型漂移层，并且包括具有偏移方向的主表面; 设置在所述漂移层上并具有纵向方向的沟槽; 以及通过栅极绝缘膜设置在沟槽中的栅电极。 沟槽的侧壁提供通道形成表面。 垂直半导体器件根据施加到栅电极的栅极电压与沟道形成表面一起流动电流。 SiC衬底的偏移方向垂直于沟槽的纵向方向。

公开(公告)号：US09136372B2

公开(公告)日：2015-09-15

申请号：US13531793

申请日：2012-06-25

申请人： Shinichiro Miyahara ,  Masahiro Sugimoto ,  Hidefumi Takaya ,  Yukihiko Watanabe ,  Narumasa Soejima ,  Tsuyoshi Ishikawa

发明人： Shinichiro Miyahara ,  Masahiro Sugimoto ,  Hidefumi Takaya ,  Yukihiko Watanabe ,  Narumasa Soejima ,  Tsuyoshi Ishikawa

IPC分类号： H01L29/66 ,  H01L29/78 ,  H01L29/423 ,  H01L29/04 ,  H01L29/08 ,  H01L29/10 ,  H01L29/16

CPC分类号： H01L29/7813 ,  H01L29/045 ,  H01L29/0865 ,  H01L29/1095 ,  H01L29/1608 ,  H01L29/4236 ,  H01L29/66068 ,  H01L29/7825 ,  H01L29/7827

摘要： In a silicon carbide semiconductor device, a plurality of trenches has a longitudinal direction in one direction and is arranged in a stripe pattern. Each of the trenches has first and second sidewalls extending in the longitudinal direction. The first sidewall is at a first acute angle to one of a (11-20) plane and a (1-100) plane, the second sidewall is at a second acute angle to the one of the (11-20) plane and the (1-100) plane, and the first acute angle is smaller than the second acute angle. A first conductivity type region is in contact with only the first sidewall in the first and second sidewalls of each of the trenches, and a current path is formed on only the first sidewall in the first and second sidewalls.

摘要翻译： 在碳化硅半导体器件中，多个沟槽在一个方向上具有纵向方向并且被布置成条纹图案。 每个沟槽具有在纵向方向上延伸的第一和第二侧壁。 第一侧壁与（11-20）面和（1-100）面中的一个成锐角，第二侧壁与（11-20）面和 （1-100）平面，第一锐角小于第二锐角。 第一导电类型区域仅与每个沟槽的第一和第二侧壁中的第一侧壁接触，并且仅在第一和第二侧壁中的第一侧壁上形成电流路径。

公开(公告)号：US20130001592A1

公开(公告)日：2013-01-03

申请号：US13531793

申请日：2012-06-25

申请人： Shinichiro Miyahara ,  Masahiro Sugimoto ,  Hidefumi Takaya ,  Yukihiko Watanabe ,  Narumasa Soejima ,  Tsuyoshi Ishikawa

发明人： Shinichiro Miyahara ,  Masahiro Sugimoto ,  Hidefumi Takaya ,  Yukihiko Watanabe ,  Narumasa Soejima ,  Tsuyoshi Ishikawa

IPC分类号： H01L29/161

CPC分类号： H01L29/7813 ,  H01L29/045 ,  H01L29/0865 ,  H01L29/1095 ,  H01L29/1608 ,  H01L29/4236 ,  H01L29/66068 ,  H01L29/7825 ,  H01L29/7827

摘要： In a silicon carbide semiconductor device, a plurality of trenches has a longitudinal direction in one direction and is arranged in a stripe pattern. Each of the trenches has first and second sidewalls extending in the longitudinal direction. The first sidewall is at a first acute angle to one of a (11-20) plane and a (1-100) plane, the second sidewall is at a second acute angle to the one of the (11-20) plane and the (1-100) plane, and the first acute angle is smaller than the second acute angle. A first conductivity type region is in contact with only the first sidewall in the first and second sidewalls of each of the trenches, and a current path is formed on only the first sidewall in the first and second sidewalls.

摘要翻译： 在碳化硅半导体器件中，多个沟槽在一个方向上具有纵向方向并且被布置成条纹图案。 每个沟槽具有在纵向方向上延伸的第一和第二侧壁。 第一侧壁与（11-20）面和（1-100）面中的一个成锐角，第二侧壁与（11-20）面和 （1-100）平面，第一锐角小于第二锐角。 第一导电类型区域仅与每个沟槽的第一和第二侧壁中的第一侧壁接触，并且仅在第一和第二侧壁中的第一侧壁上形成电流通路。

公开(公告)号：US08975139B2

公开(公告)日：2015-03-10

申请号：US14000901

申请日：2012-09-04

申请人： Shinichiro Miyahara ,  Toshimasa Yamamoto ,  Hidefumi Takaya ,  Masahiro Sugimoto ,  Yukihiko Watanabe ,  Narumasa Soejima ,  Tsuyoshi Ishikawa

发明人： Shinichiro Miyahara ,  Toshimasa Yamamoto ,  Hidefumi Takaya ,  Masahiro Sugimoto ,  Yukihiko Watanabe ,  Narumasa Soejima ,  Tsuyoshi Ishikawa

IPC分类号： H01L21/336 ,  H01L29/66 ,  H01L29/78 ,  H01L21/3065 ,  H01L29/34 ,  H01L29/423 ,  H01L29/16

CPC分类号： H01L29/66666 ,  H01L21/3065 ,  H01L29/1608 ,  H01L29/34 ,  H01L29/4236 ,  H01L29/66068 ,  H01L29/7813

摘要： A manufacturing method of a silicon carbide semiconductor device includes: forming a drift layer on a silicon carbide substrate; forming a base layer on or in a surface portion of the drift layer; forming a source region in a surface portion of the base layer; forming a trench to penetrate the base layer and to reach the drift layer; forming a gate electrode on a gate insulation film in the trench; forming a source electrode electrically connected to the source region and the base layer; and forming a drain electrode on a back surface of the substrate. The forming of the trench includes: flattening a substrate surface; and etching to form the trench after flattening.

摘要翻译： 碳化硅半导体器件的制造方法包括：在碳化硅衬底上形成漂移层; 在漂移层的表面部分上或其中形成基底层; 在所述基底层的表面部分中形成源区; 形成沟槽以穿透基层并到达漂移层; 在沟槽中的栅极绝缘膜上形成栅电极; 形成与源极区域和基极层电连接的源电极; 以及在所述基板的背面上形成漏电极。 沟槽的形成包括：使基底表面变平; 并进行蚀刻以在平坦化之后形成沟槽。

公开(公告)号：US08575689B2

公开(公告)日：2013-11-05

申请号：US13330835

申请日：2011-12-20

申请人： Tomohiro Mimura ,  Shinichiro Miyahara ,  Hidefumi Takaya ,  Masahiro Sugimoto ,  Narumasa Soejima ,  Tsuyoshi Ishikawa ,  Yukihiko Watanabe

发明人： Tomohiro Mimura ,  Shinichiro Miyahara ,  Hidefumi Takaya ,  Masahiro Sugimoto ,  Narumasa Soejima ,  Tsuyoshi Ishikawa ,  Yukihiko Watanabe

IPC分类号： H01L29/76 ,  H01L29/94 ,  H01L31/062 ,  H01L31/113 ,  H01L31/119

CPC分类号： H01L29/7813 ,  H01L29/045 ,  H01L29/1608 ,  H01L29/4236 ,  H01L29/42368 ,  H01L29/66068 ,  H01L29/7397

摘要： An SiC semiconductor device includes a substrate, a drift layer, a base region, a source region, a trench, a gate oxide film, a gate electrode, a source electrode and a drain electrode. The substrate has a Si-face as a main surface. The source region has the Si-face. The trench is provided from a surface of the source region to a portion deeper than the base region and extends longitudinally in one direction and has a Si-face bottom. The trench has an inverse tapered shape, which has a smaller width at an entrance portion than at a bottom, at least at a portion that is in contact with the base region.

摘要翻译： SiC半导体器件包括衬底，漂移层，基极区域，源极区域，沟槽，栅极氧化膜，栅电极，源电极和漏电极。 基板具有作为主表面的Si面。 源区具有Si面。 沟槽从源极区域的表面提供到比基部区域更深的部分并且在一个方向上纵向延伸并且具有Si面底部。 沟槽具有倒锥形形状，至少在与基部区域接触的部分处，入口部分处的宽度比底部宽。