公开(公告)号：US07514292B2

公开(公告)日：2009-04-07

申请号：US11539486

申请日：2006-10-06

申请人： Taylor R Efland ,  Milton L Buschbom ,  Sameer Pendharkar

发明人： Taylor R Efland ,  Milton L Buschbom ,  Sameer Pendharkar

IPC分类号： H01L21/00

CPC分类号： H01L24/05 ,  H01L23/5286 ,  H01L24/06 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L2224/04042 ,  H01L2224/05083 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05166 ,  H01L2224/05171 ,  H01L2224/0518 ,  H01L2224/05184 ,  H01L2224/05187 ,  H01L2224/05554 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05664 ,  H01L2224/05669 ,  H01L2224/32245 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/48624 ,  H01L2224/48639 ,  H01L2224/48644 ,  H01L2224/48664 ,  H01L2224/48669 ,  H01L2224/48724 ,  H01L2224/48739 ,  H01L2224/48744 ,  H01L2224/48764 ,  H01L2224/48769 ,  H01L2224/48824 ,  H01L2224/48839 ,  H01L2224/48844 ,  H01L2224/48864 ,  H01L2224/49175 ,  H01L2224/73265 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01031 ,  H01L2924/01032 ,  H01L2924/01042 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01076 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01083 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/05042 ,  H01L2924/13055 ,  H01L2924/14 ,  H01L2924/15724 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/20752 ,  H01L2924/20753 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/00014 ,  H01L2924/04953 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/48869

摘要： An integrated circuit (IC) chip, mounted on a leadframe, has a network of power distribution lines deposited on the surface of the chip so that these lines are located over active components of the IC, connected vertically by metal-filled vias to selected active components below the lines, and also by conductors to segments of the leadframe. Furthermore, the lines are fabricated with a sheet resistance of less than 1.5 mΩ/· and the majority of the lines is patterned as straight lines between the vias and the conductors, respectively.

摘要翻译： 安装在引线框架上的集成电路（IC）芯片具有沉积在芯片表面上的配电线网络，使得这些线路位于IC的有源元件上方，通过金属填充的通孔垂直连接到选定的有源 线路下方的组件，以及引线框架的导体。 此外，线路的薄层电阻小于1.5mOmega /。 并且大多数线分别被图案化为通孔和导体之间的直线。

公开(公告)号：US08304868B2

公开(公告)日：2012-11-06

申请号：US12902271

申请日：2010-10-12

申请人： Michael G Amaro ,  Steven A Kummerl ,  Taylor R Efland ,  Sreenivasan K Koduri

发明人： Michael G Amaro ,  Steven A Kummerl ,  Taylor R Efland ,  Sreenivasan K Koduri

IPC分类号： H01L23/495

CPC分类号： H01L23/495 ,  H01L23/3107 ,  H01L23/4951 ,  H01L23/49548 ,  H01L24/16 ,  H01L2224/131 ,  H01L2224/16245 ,  H01L2924/0001 ,  H01L2924/14 ,  H01L2924/1461 ,  H01L2924/014 ,  H01L2224/13099 ,  H01L2924/00

摘要： A pallet (501) supporting a half-etched leadframe with cantilever-type leads (403) without metallic supports during the step of attaching components (510) to the leads in order to assemble an electronic system. After assembly, the pallet is removed before the molding step that encapsulates (601a) the components on the leadframe and mechanically supports (601b) the cantilever leads. The pallet is machined from metal or inert plastic material, tolerates elevated temperatures during soldering, and is reusable for the next assembly batch.

摘要翻译： 在将部件（510）附接到引线的步骤中，以便组装电子系统的托板（501），其支撑具有悬臂式引线（403）的半蚀刻引线框架，而没有金属支撑件。 在组装之后，在模制步骤之前移除托盘（601a），并将构件（601a）封装在引线框架上并机械地支撑（601b）悬臂引线。 托盘由金属或惰性塑料材料加工而成，在焊接过程中可承受高温，并可重复使用下一个装配批次。