摘要:
Liquid crystal optoelectronic devices are produced by fabricating a wafer-level component structure and affixing a plurality of discrete components to a surface structure prior to singulating the individual devices therefrom. After singulation, the individual devices include a portion of the wafer-level fabricated structure and at least of the discrete components. The wafer-level structure may include a liquid crystal and controlling electrodes, and the discrete components may include fixed lenses or image sensors. The discrete components may be located on either or both of two sides of the wafer-level structure. Multiple liquid crystal layers may be used to reduce nonuniformities in the interaction with light from different angles, and to control light of different polarizations. The liquid crystal devices may function as optoelectronic devices such as tunable lenses, shutters or diaphragms.
摘要:
A tunable liquid crystal optical device is described. The optical device has an electrode arrangement associated with a liquid crystal cell and includes a hole patterned electrode, wherein control of the liquid crystal cell depends on electrical characteristics of liquid crystal optical device layers. The optical device further has a circuit for measuring said electrical characteristics of the liquid crystal optical device layers, and a drive signal circuit having at least one parameter adjusted as a function of the measured electrical characteristics. The drive signal circuit generates a control signal for the electrode arrangement.
摘要:
Methods and apparatus for testing operation of a single or multiple tunable active optical device(s) operated by one or more driving electrodes are described Test methods and apparatus are provided for device testing without necessarily requiring direct physical contact with the driving electrodes Testing subjects devices to incident light along an optical path and to an external electric field applied to the device producing a dipolar charge distribution within the electrodes, causing the device to operate The effect of device operation on incident light is optically sensed The sensed effect is analyzed to identify device defects Test methods and apparatus are provided for testing multiple unsingulated devices during fabrication employing a strip contact structure having contact strips connected to multiple devices and extending to wafer edges, such that singulating devices leaves portions of the strip contact structure exposed on device dice edges providing electrical contacts in use.
摘要:
A tunable liquid crystal optical device is described. The optical device has an electrode arrangement associated with a liquid crystal cell and includes a hole patterned electrode, wherein control of the liquid crystal cell depends on electrical characteristics of liquid crystal optical device layers. The optical device further has a circuit for measuring said electrical characteristics of the liquid crystal optical device layers, and a drive signal circuit having at least one parameter adjusted as a function of the measured electrical characteristics. The drive signal circuit generates a control signal for the electrode arrangement.
摘要:
Methods and apparatus for testing operation of a single or multiple tunable active optical device(s) operated by one or more driving electrodes are described Test methods and apparatus are provided for device testing without necessarily requiring direct physical contact with the driving electrodes Testing subjects devices to incident light along an optical path and to an external electric field applied to the device producing a dipolar charge distribution within the electrodes, causing the device to operate The effect of device operation on incident light is optically sensed The sensed effect is analyzed to identify device defects Test methods and apparatus are provided for testing multiple unsingulated devices during fabrication employing a strip contact structure having contact strips connected to multiple devices and extending to wafer edges, such that singulating devices leaves portions of the strip contact structure exposed on device dice edges providing electrical contacts in use.
摘要:
A method of forming a microelectronic assembly includes positioning a support structure adjacent to an active region of a device but not extending onto the active region. The support structure has planar sections. Each planar section has a substantially uniform composition. The composition of at least one of the planar sections differs from the composition of at least one of the other planar sections. A lid is positioned in contact with the support structure and extends over the active region. The support structure is bonded to the device and to the lid.
摘要:
A solder joint or seal attaching components having dissimilar coefficients of thermal expansion is made thin (e.g., less than 20 μm and preferably about 5 μm) and of a solder such as an indium-based solder that has a tendency to creep. The solder is toroidal or otherwise shaped to avoid tensile stress in the solder. Axial shearing stress in the solder causes reversible creep without causing failure of the joint or seal. In one embodiment, a toroidal solder seal has a diameter, a footprint, and a thickness in approximate proportions of 5000:200:1.
摘要:
Packaged microelectronic elements are provided. In an exemplary embodiment, a microelectronic element having a front face and a plurality of peripheral edges bounding the front face has a device region at the front face and a contact region with a plurality of exposed contacts adjacent to at least one of the peripheral edges. The packaged element may include a plurality of support walls overlying the front face of the microelectronic element such that a lid can be mounted to the support walls above the microelectronic element. For example, the lid may have an inner surface confronting the front face. In a particular embodiment, some of the contacts can be exposed beyond edges of the lid.
摘要:
The present invention provides an integrated circuit chip assembly and a method of manufacturing the same. The assembly includes a package element having a top surface and an integrated circuit chip having a top surface, a bottom surface, edge surface between the top and bottom surfaces, and contacts exposed at the top surface. The package element is disposed below the chip with the top surface of the package element facing toward the bottom surface of the chip. At least one spacer element resides between the top surface of the package element and the bottom surface of the chip. According to one embodiment, the at least one spacer element may form a substantially closed cavity between the package element and the integrated circuit chip. According to another embodiment, first conductive features may extend from the contacts of the chip along the top surface, and at least some of said first conductive features extend along at least one of the edge surfaces of the chip.
摘要:
A compliant structure is provided on a semiconductor wafer. The compliant structure includes cavities. The compliant structure and the wafer seal the cavities during process steps used to form conductive elements on the compliant structure. After processing, vents are opened to connect the cavities to the exterior of the assembly. The vents may be formed by severing the wafer and compliant structure to form individual units, so that the severance planes intersect channels or other voids communicating with the cavities. Alternatively, the vents may be formed by forming holes in the compliant structure, or by opening bores extending through the wafer.