Semiconductor device
    2.
    发明授权
    Semiconductor device 失效
    半导体器件

    公开(公告)号:US07759788B2

    公开(公告)日:2010-07-20

    申请号:US12230484

    申请日:2008-08-29

    IPC分类号: H01L23/14

    摘要: A highly reliable semiconductor device which is not damaged by local pressing force from the outside and in which unevenness of a portion where an antenna and an element overlap with each other is reduced. The semiconductor device includes a chip and an antenna. The chip includes a semiconductor element layer including a thin film transistor; a conductive resin electrically connected to the semiconductor element layer; and a sealing layer. The sealing layer in which a fiber body is impregnated with an organic resin covers the semiconductor element layer and the conductive resin, and has a thickness of 10 to 100 μm. The antenna has a depressed portion and is electrically connected to the semiconductor element layer through the conductive resin. The chip is embedded inside the depressed portion. The thickness of the chip is equal to the depth of the depressed portion.

    摘要翻译: 不会受到来自外部的局部按压力的损害,天线和元件相互重叠的部分的不均匀性降低的高度可靠的半导体装置。 半导体器件包括芯片和天线。 该芯片包括:包括薄膜晶体管的半导体元件层; 电连接到半导体元件层的导电树脂; 和密封层。 纤维体浸渍有机树脂的密封层覆盖半导体元件层和导电性树脂,其厚度为10〜100μm。 天线具有凹部,并且通过导电树脂与半导体元件层电连接。 芯片嵌入凹陷部分内。 芯片的厚度等于凹陷部分的深度。

    Semiconductor device
    3.
    发明申请
    Semiconductor device 失效
    半导体器件

    公开(公告)号:US20090057875A1

    公开(公告)日:2009-03-05

    申请号:US12230484

    申请日:2008-08-29

    IPC分类号: H01L23/14

    摘要: A highly reliable semiconductor device which is not damaged by local pressing force from the outside and in which unevenness of a portion where an antenna and an element overlap with each other is reduced. The semiconductor device includes a chip and an antenna. The chip includes a semiconductor element layer including a thin film transistor; a conductive resin electrically connected to the semiconductor element layer; and a sealing layer. The sealing layer in which a fiber body is impregnated with an organic resin covers the semiconductor element layer and the conductive resin, and has a thickness of 10 to 100 μm. The antenna has a depressed portion and is electrically connected to the semiconductor element layer through the conductive resin. The chip is embedded inside the depressed portion. The thickness of the chip is equal to the depth of the depressed portion.

    摘要翻译: 不会受到来自外部的局部按压力的损害,天线和元件相互重叠的部分的不均匀性降低的高度可靠的半导体装置。 半导体器件包括芯片和天线。 该芯片包括:包括薄膜晶体管的半导体元件层; 电连接到半导体元件层的导电树脂; 和密封层。 纤维体浸渍有机树脂的密封层覆盖半导体元件层和导电性树脂,其厚度为10〜100μm。 天线具有凹部,并且通过导电树脂与半导体元件层电连接。 芯片嵌入凹陷部分内。 芯片的厚度等于凹陷部分的深度。

    Method for manufacturing semiconductor device
    8.
    发明授权
    Method for manufacturing semiconductor device 有权
    制造半导体器件的方法

    公开(公告)号:US07875530B2

    公开(公告)日:2011-01-25

    申请号:US11602261

    申请日:2006-11-21

    IPC分类号: H01L21/00 H01L21/46 H01L21/30

    CPC分类号: H01L27/1266 H01L27/1214

    摘要: First semiconductor integrated circuits and second semiconductor integrated circuits arranged over a first substrate so that each of the second semiconductor integrated circuits is adjacent to one of the first semiconductor integrated circuits are transferred to additional substrates through multiple transfer operations. After the first semiconductor integrated circuits and the second semiconductor integrated circuits formed over the first substrate are transferred to the additional substrates (a fourth substrate and a fifth substrate) respectively, the circuits are divided into a semiconductor device corresponding to each semiconductor integrated circuit. The first semiconductor integrated circuits are arranged while keeping a distance from each other over the fourth substrate, and the second semiconductor integrated circuits are arranged while keeping a distance from each other over the fifth substrate. Thus, a large division margin of each of the fourth substrate and the fifth substrate can be obtained.

    摘要翻译: 第一半导体集成电路和第二半导体集成电路布置在第一基板上,使得第二半导体集成电路中的每一个与第一半导体集成电路之一相邻,通过多次传送操作被传送到附加的基板。 在第一半导体集成电路和形成在第一衬底上的第二半导体集成电路分别转移到附加衬底(第四衬底和第五衬底)之后,将电路分成对应于每个半导体集成电路的半导体器件。 第一半导体集成电路在第四衬底上彼此保持距离的同时被布置,并且第二半导体集成电路被布置成在第五衬底上彼此保持距离。 因此,可以获得第四基板和第五基板中的每一个的大分割裕度。

    Manufacturing method of semiconductor device
    10.
    发明授权
    Manufacturing method of semiconductor device 有权
    半导体器件的制造方法

    公开(公告)号:US07504317B2

    公开(公告)日:2009-03-17

    申请号:US11600070

    申请日:2006-11-16

    IPC分类号: H01L21/46

    摘要: It is an object to provide a manufacturing method of a semiconductor device with high reliability. A plurality of first semiconductor integrated circuits, a plurality of second semiconductor integrated circuits each of which is arranged to be adjacent to one of the first semiconductor integrated circuits, a plurality of third semiconductor integrated circuits each of which is arranged to be adjacent to one of the first semiconductor integrated circuits and one of the second semiconductor integrated circuits, and a plurality of fourth semiconductor integrated circuits each of which is arranged to be adjacent to one of the first semiconductor integrated circuits, one of the second semiconductor integrated circuits, and one of the third semiconductor integrated circuits are formed over a first substrate. The first semiconductor integrated circuits are transferred to a second substrate. A first protective layer is formed to cover the first semiconductor integrated circuits and a surface of the second substrate in the periphery of the first semiconductor integrated circuits. The second substrate and the first protective layer are divided so that the plurality of the first semiconductor integrated circuits is divided into individual pieces and part of the second substrate remains in the periphery of the first semiconductor integrated circuits. Accordingly, a semiconductor device having the first semiconductor integrated circuit is manufactured.

    摘要翻译: 本发明的目的是提供一种高可靠性的半导体器件的制造方法。 多个第一半导体集成电路,多个第二半导体集成电路,每个第二半导体集成电路被布置为与第一半导体集成电路之一相邻,多个第三半导体集成电路被布置为与 第一半导体集成电路和第二半导体集成电路之一,以及多个第四半导体集成电路,每个第四半导体集成电路被布置为与第一半导体集成电路之一相邻,第二半导体集成电路之一和第二半导体集成电路之一 第三半导体集成电路形成在第一基板上。 第一半导体集成电路被转移到第二衬底。 形成第一保护层以覆盖第一半导体集成电路和第一半导体集成电路的周边中的第二基板的表面。 第二基板和第一保护层被分割成使得多个第一半导体集成电路被分成单独的部分,并且第二基板的一部分保留在第一半导体集成电路的周围。 因此,制造具有第一半导体集成电路的半导体器件。