摘要:
A semiconductor device includes a plurality of circuit groups constituting an integrated circuit and each constituted by a plurality of circuit blocks and a bias circuit which applies a bias potential to said circuit blocks. The device further includes a plurality of power buses provided above the circuit groups through an insulating layer so as to feed power to circuit elements in the circuit groups. At least one of the power buses is constituted by a first bus for feeding power to the circuit groups and a plurality of second buses respectively provided for the circuit groups so that each second bus receives power from the first bus and feeds power to circuit elements in the corresponding circuit group. Each of the second buses is connected to the first bus at a predetermined position on the corresponding circuit group.
摘要:
An improved flip-flop circuit is provided which prevents the occurrence of soft errors due to .alpha. rays and the like emitted from a trace amount of radioactive materials contained in a semiconductor package material. The flip-flop circuit has a first logic circuit which holds data and produces a first logic signal and a second logic circuit which produces a second logic signal. A logic gate receives the first and second logic signals that are produced from the first and second logic circuits and which have the same logic level. The output of the logic gate is input to the first logic circuit through a feedback loop which is provided between the output and the input of the first logic circuit and which includes the logic gate. According to the circuit construction of the present invention, a flip-flop circuit can be accomplished which is resistant to the radioactive rays such as .alpha. rays and does not cause soft errors.
摘要:
An information processing system includes a plurality of functional blocks (neurons) and a data bus for transmitting in common the outputs of the individual functional blocks (neurons). Data transaction among the functional blocks (neurons) is performed through the data bus on the time-division basis. For preventing the outputs from conflicting or competition, addresses are assigned to the individual blocks (neurons), respectively, so that only the functional blocks (neuron) having the own address designated by the address signal supplied through an address bus outputs data signal onto the data bus, while the other functional blocks (neurons) receive the information on the data bus as the signal originating in the functional block whose address is designated at that time point. The addresses are sequentially changed. During a round of the address signals, data are transmitted from given functional blocks (neurons) to other given functional blocks (neurons).
摘要:
A transistor circuit of this invention comprises a first transistor for receiving a first bias at its base, resistor means connected to the collector of the first transistor and clamp means connected to the junction between the first transistor and the resistor means, and obtains an output from a terminal of the resistor on the opposite to its junction with the first transistor. When a noise current due to .alpha. rays develops in the first transistor and the output is lowered, the clamp means operates in such a manner that the current flows through the clamp means and prevents the change of the output. The transistor circuit of this invention is connected to a resistor or a transistor and operates as a constant current circuit for supplying a current to the resistor or the transistor so that the current flowing therethrough becomes constant. For example, it is used as a constant current source of an emitter follower to constitute a level shift circuit. It is disposed in a feedback part and used as a constant current source in a logic circuit comprising a logic part consisting of a differential transistor circuit and the feedback part for negatively feeding back the in-phase output of the differential transistor circuit.
摘要:
An FPGA needs extremely large numbers of switches in its wiring architecture and therefore shows low logic density and low operating speed. This tendency becomes increasingly evident with high integration FPGAs. 3-dimensional FPGAs are getting attention for potential improvements in their operating speed and logic density. However, 3-dimensional integration processes have poor yield and are difficult to adapt for the production of devices with fine features. In addition, difficulty in heat radiation imposes limits on the number of stacks. The present invention exploits advantages of the 3-dimensional FPGA to deliver FPGAs with high speed/high integration and which resolves difficulty in manufacturing processes. The present invention solves problems by proposing a design method for an FPGA in which a high dimensional FPGA switch topology is embedded in a lower dimensional integrated circuit and a semiconductor integrated circuit including an FPGA in which a high dimensional FPGA switch topology is embedded in a lower dimensional integrated circuit.
摘要:
A parallel folding apparatus of a folding machine comprises a first cylinder in contact with a second cylinder. A guide plate guides a signature transported on the lower circumferential surface of the second cylinder after being double-folded by grippers of the second cylinder in cooperation with knives of the first cylinder. The guide plate comprises a stationary guide located downstream, in the rotating direction, of the point of contact between the first cylinder and the second cylinder and disposed continuously along the circumferential surfaces of the first cylinder and the second cylinder, and a moving guide movable in accordance with the operating speed of the folding machine between a position, closer to the circumferential surface of the first cylinder than the stationary guide, and a position, more remote from the circumferential surface of the first cylinder than the stationary guide.
摘要:
This invention concerns a cooling module for integrated circuit chips, characterized in that it is provided with cooling members through which a coolant circulates, and which are connected directly, or via insulating plates, to a plurality of integrated circuit chips mounted on a wiring substrate, and pipes which introduce the coolant into the cooling members and which have a resiliency which is high enough to enable the pipes to expand and contract in the direction perpendicular to the wiring substrate.
摘要:
A liquid crystal display device has a liquid crystal cell, a liquid crystalline substance layer, a pair of polarizers, and an optical compensation element. The twist angle of the liquid crystal cell is set to 180 to 270 degrees. The optical compensation element has a twisted structure twisted in the opposite direction to that of the liquid crystal cell. The difference in the absolute values of the twist angles between the liquid crystal cell and the optical compensation element is from 40 to 100 degrees. The difference in retardation at a wavelength λ=550 nm between the liquid crystal cell and the optical compensation element is from 100 to 250 nm. When the absolute values of the differences in retardation at wavelengths λ of 400 nm and 550 nm between the liquid crystal cell and the optical compensation element are represented by ΔR(400) and ΔR(550), respectively, and the ratio D therebetween is represented by D=ΔR(400)/ΔR(550), D is within the range of 0.5 to 1.0.
摘要:
A cooling structure for cooling a multichip module for effectively removing heat generated from integrated circuit chips. A suction plate formed with minute grooves on one of its surfaces is disposed between each integrated circuit chip and an associated cooling block and is brought into contact at a grooved surface with the integrated circuit chip through a layer of a liquid such as silicone oil interposed therebetween, thereby producing negative hydrostatic pressure by capillary action of the minute grooves. The suction plate has a thickness small enough to be bent under influence of the negative hydrostatic pressure to follow a warping of the integrated circuit chip, so that the clearance between the opposing surfaces of the suction plate and the integrated circuit chip can be minimized. Thus, an integrated circuit chip cooling device of surface-to-surface contact type operable with a low thermal resistance is provided, which can improve the maintainability and reliability without sacrificing the cooling efficiency.
摘要:
A large scale integrated circuit including therein a logical gate circuit and a memory circuit is disclosed in which a large number of circuit blocks each having the same structure and including at least eight transistors and at least five resistors are arranged on a chip, and the logical gate circuit or memory circuit has a selected wiring pattern of the transistors and resistors included in the circuit block.