PACKAGE STRUCTURE AND MANUFACTURING METHOD THEREOF

    公开(公告)号:US20220336333A1

    公开(公告)日:2022-10-20

    申请号:US17233551

    申请日:2021-04-19

    Abstract: A package structure includes at least one first redistribution layer, at least one second redistribution layer, a chip pad, a solder ball pad, a chip, a solder ball, and a molding compound. The first redistribution layer includes a first dielectric layer and a first redistribution circuit that fills a first opening and a second opening of the first dielectric layer. The first dielectric layer is aligned with the first redistribution circuit. The second redistribution layer includes a second and a third dielectric layers and a second redistribution circuit. The third dielectric layer is aligned with the second redistribution circuit. The chip pad and the solder ball pad are electrically connected to the first and the second redistribution circuits respectively. The chip and the solder ball are disposed on the chip pad and the solder ball pad respectively. The molding compound at least covers the chip and the chip pad.

    PACKAGE STRUCTURE AND MANUFACTURING METHOD THEREOF

    公开(公告)号:US20220246810A1

    公开(公告)日:2022-08-04

    申请号:US17209110

    申请日:2021-03-22

    Abstract: A manufacturing method of a package structure is provided, which includes the following steps. A carrier having a surface is provided. A copper foil layer is laminated on the surface of the carrier. A subtractive process is performed on the copper foil layer to form a copper foil circuit layer on the carrier. The copper foil circuit layer exposes a part of the surface of the carrier. A build-up structure layer is formed on the copper foil circuit layer and the surface of the carrier. A first surface of the copper foil circuit layer is aligned with a second surface of the build-up structure layer. At least one electronic component is disposed on the build-up structure layer. A package colloid is formed to cover the electronic component and the build-up structure layer. The carrier is removed to expose the first surface of the copper foil circuit layer.

    Light emitting diode package structure and manufacturing method thereof and manufacturing method of display device

    公开(公告)号:US11955587B2

    公开(公告)日:2024-04-09

    申请号:US17227391

    申请日:2021-04-12

    CPC classification number: H01L33/62 H01L27/156 H01L33/005 H01L2933/0066

    Abstract: A light emitting diode (LED) package structure includes a glass substrate, conductive through holes, active elements, an insulating layer, LEDs and pads. The glass substrate has an upper surface and a lower surface. The conductive through holes penetrate the glass substrate and connect the upper and the lower surfaces. The active elements are disposed on the upper surface of the glass substrate and electrically connected to the conductive through holes. The insulating layer is disposed on the upper surface and covers the active elements. The LEDs are disposed on the insulating layer and electrically connected to at least one of the active elements. The pads are disposed on the lower surface of the glass substrate and electrically connected to the conductive through holes. A source of at least one active elements is directly electrically connected to at least one of the corresponding pads through the corresponding conductive through hole.

    PACKAGE STRUCTURE AND MANUFACTURING METHOD THEREOF

    公开(公告)号:US20220344248A1

    公开(公告)日:2022-10-27

    申请号:US17235944

    申请日:2021-04-21

    Abstract: A package structure includes a redistribution layer, a chip assembly, a plurality of solder balls, and a molding compound. The redistribution layer includes redistribution circuits, photoimageable dielectric layers, conductive through holes, and chip pads. One of the photoimageable dielectric layers located on opposite two outermost sides has an upper surface and openings. The chip pads are located on the upper surface and are electrically connected to the redistribution circuits through the conductive through holes. The openings expose portions of the redistribution circuits to define solder ball pads. Line widths and line spacings of the redistribution circuits decrease in a direction from the solder ball pads towards the chip pads. The chip assembly is disposed on the chip pads and includes at least two chips with different sizes. The solder balls are disposed on the solder ball pads, and the molding compound at least covers the chip assembly.

    Substrate structure and cutting method thereof

    公开(公告)号:US12250776B2

    公开(公告)日:2025-03-11

    申请号:US18317756

    申请日:2023-05-15

    Abstract: A substrate structure and a cutting method thereof are provided. The cutting method includes the following steps. A first substrate structure is provided, wherein the first substrate structure includes a glass substrate and a redistribution layer disposed on the glass substrate. A laser process is performed on the glass substrate to form a modified region on the glass substrate. A wet etching process is performed on the modified region of the glass substrate to remove the modified region and form a plurality of second substrate structures.

    Flexible circuit board and manufacturing method thereof

    公开(公告)号:US12185479B2

    公开(公告)日:2024-12-31

    申请号:US17945106

    申请日:2022-09-15

    Abstract: A flexible circuit board and a manufacturing method thereof are provided. The flexible circuit board includes a circuit structure, a first cover layer, and a second cover layer. The circuit structure has a top surface and a bottom surface opposite to the top surface. The circuit structure includes multiple circuit layers and multiple insulating layers stacked alternately. A material of the insulating layers is a photosensitive dielectric material and a Young's modulus of the insulating layers is between 0.36 GPa and 8 GPa. The first cover layer is disposed on the top surface of the circuit structure. The second cover layer is disposed on the bottom surface of the circuit structure.

Patent Agency Ranking