公开(公告)号：US09881863B2

公开(公告)日：2018-01-30

申请号：US15428109

申请日：2017-02-08

Applicant: UTAC Headquarters Pte. Ltd.

Inventor： Chuen Khiang Wang ,  Nathapong Suthiwongsunthorn ,  Kriangsak Sae Le ,  Antonio Jr B Dimaano ,  Catherine Bee Liang Ng ,  Richard Te Gan ,  Kian Teng Eng

IPC: H01L23/498 ,  H01L21/48 ,  H01L21/56 ,  H01L23/31 ,  H01L23/495

CPC classification number: H01L23/49861 ,  H01L21/2885 ,  H01L21/4825 ,  H01L21/4828 ,  H01L21/4832 ,  H01L21/4839 ,  H01L21/4857 ,  H01L21/486 ,  H01L21/56 ,  H01L21/561 ,  H01L21/563 ,  H01L21/565 ,  H01L23/3114 ,  H01L23/3121 ,  H01L23/36 ,  H01L23/481 ,  H01L23/49503 ,  H01L23/4952 ,  H01L23/49534 ,  H01L23/49537 ,  H01L23/49541 ,  H01L23/49575 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/49838 ,  H01L23/49894 ,  H01L24/48 ,  H01L24/73 ,  H01L24/81 ,  H01L24/83 ,  H01L24/85 ,  H01L24/92 ,  H01L25/03 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/16 ,  H01L25/50 ,  H01L2224/16225 ,  H01L2224/16245 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2224/9211 ,  H01L2224/92125 ,  H01L2224/92247 ,  H01L2225/0651 ,  H01L2225/06517 ,  H01L2225/0652 ,  H01L2225/06541 ,  H01L2225/06548 ,  H01L2225/06558 ,  H01L2225/1023 ,  H01L2225/1052 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/01079 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2924/19105 ,  H01L2924/19107 ,  H01L2924/3025 ,  H01L2924/3511 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A device is disclosed. The device includes a carrier substrate having first and second major surfaces. The first surface includes a die region and contact pads and the second surface includes package contacts. The carrier substrate includes a patterned lead frame which defines a line level with conductive traces and a via level with via contacts. The patterned lead frame provides interconnections between the contact pads and package contacts. The carrier substrate further includes a dielectric layer isolating the conductive traces and via contacts. The device includes a die mounted on the die region of the first surface.

公开(公告)号：US09589875B2

公开(公告)日：2017-03-07

申请号：US14849560

申请日：2015-09-09

Applicant: UTAC Headquarters Pte. Ltd.

Inventor： Chuen Khiang Wang ,  Nathapong Suthiwongsunthorn ,  Kriangsak Sae Le ,  Antonio Jr B Dimaano ,  Catherine Bee Liang Ng ,  Richard Te Gan ,  Kian Teng Eng

IPC: H01L23/495 ,  H01L21/48 ,  H01L23/00 ,  H01L25/00 ,  H01L21/56 ,  H01L21/288 ,  H01L25/10 ,  H01L23/31 ,  H01L23/36 ,  H01L23/48 ,  H01L23/498 ,  H01L25/03 ,  H01L25/16 ,  H01L25/065

CPC classification number: H01L23/49861 ,  H01L21/2885 ,  H01L21/4825 ,  H01L21/4828 ,  H01L21/4832 ,  H01L21/4839 ,  H01L21/4857 ,  H01L21/486 ,  H01L21/56 ,  H01L21/561 ,  H01L21/563 ,  H01L21/565 ,  H01L23/3114 ,  H01L23/3121 ,  H01L23/36 ,  H01L23/481 ,  H01L23/49503 ,  H01L23/4952 ,  H01L23/49534 ,  H01L23/49537 ,  H01L23/49541 ,  H01L23/49575 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/49838 ,  H01L23/49894 ,  H01L24/48 ,  H01L24/73 ,  H01L24/81 ,  H01L24/83 ,  H01L24/85 ,  H01L24/92 ,  H01L25/03 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/16 ,  H01L25/50 ,  H01L2224/16225 ,  H01L2224/16245 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2224/9211 ,  H01L2224/92125 ,  H01L2224/92247 ,  H01L2225/0651 ,  H01L2225/06517 ,  H01L2225/0652 ,  H01L2225/06541 ,  H01L2225/06548 ,  H01L2225/06558 ,  H01L2225/1023 ,  H01L2225/1052 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/01079 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2924/19105 ,  H01L2924/19107 ,  H01L2924/3025 ,  H01L2924/3511 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A device is disclosed. The device includes a carrier substrate having first and second major surfaces. The first surface includes a die region and contact pads and the second surface includes package contacts. The carrier substrate includes a patterned lead frame which defines a line level with conductive traces and a via level with via contacts. The patterned lead frame provides interconnections between the contact pads and package contacts. The carrier substrate further includes a dielectric layer isolating the conductive traces and via contacts. The device includes a die mounted on the die region of the first surface.

Abstract translation: 公开了一种设备。 该装置包括具有第一和第二主表面的载体衬底。 第一表面包括管芯区域和接触焊盘，第二表面包括封装接触。 载体衬底包括图案化引线框架，其将导电迹线和具有通孔触点的通孔级限定在线路电平。 图案化引线框架提供接触焊盘和封装触点之间的互连。 载体衬底还包括隔离导电迹线和通孔触点的电介质层。 该装置包括安装在第一表面的管芯区域上的管芯。