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公开(公告)号：US08664749B2
公开(公告)日：2014-03-04
申请号：US13084204
申请日：2011-04-11
申请人： Weng-Jin Wu , Hung-Jung Tu , Ku-Feng Yang , Jung-Chih Hu , Wen-Chih Chiou
发明人： Weng-Jin Wu , Hung-Jung Tu , Ku-Feng Yang , Jung-Chih Hu , Wen-Chih Chiou
IPC分类号： H01L23/31
CPC分类号： H01L23/3157 , H01L25/0657 , H01L25/50 , H01L2224/0554 , H01L2224/0557 , H01L2224/05571 , H01L2224/05573 , H01L2224/16 , H01L2225/06513 , H01L2924/00014 , H01L2224/05599 , H01L2224/0555 , H01L2224/0556
摘要： A method of forming integrated circuits includes laminating a patterned film including an opening onto a wafer, wherein a bottom die in the wafer is exposed through the opening. A top die is placed into the opening. The top die fits into the opening with substantially no gap between the patterned film and the top die. The top die is then bonded onto the bottom die, followed by curing the patterned film.
摘要翻译： 一种形成集成电路的方法包括将包括开口的图案化膜层压到晶片上，其中晶片中的底模裸露通过开口。 将顶模放入开口。 顶部模具装配到开口中，在图案化膜和顶模之间基本上没有间隙。 然后将顶模结合到底模上，随后固化图案化膜。
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公开(公告)号：US20110186967A1
公开(公告)日：2011-08-04
申请号：US13084204
申请日：2011-04-11
申请人： Weng-Jin Wu , Hung-Jung Tu , Ku-Feng Yang , Jung-Chih Hu , Wen-Chih Chiou
发明人： Weng-Jin Wu , Hung-Jung Tu , Ku-Feng Yang , Jung-Chih Hu , Wen-Chih Chiou
IPC分类号： H01L23/544 , H01L23/48
CPC分类号： H01L23/3157 , H01L25/0657 , H01L25/50 , H01L2224/0554 , H01L2224/0557 , H01L2224/05571 , H01L2224/05573 , H01L2224/16 , H01L2225/06513 , H01L2924/00014 , H01L2224/05599 , H01L2224/0555 , H01L2224/0556
摘要： A method of forming integrated circuits includes laminating a patterned film including an opening onto a wafer, wherein a bottom die in the wafer is exposed through the opening. A top die is placed into the opening. The top die fits into the opening with substantially no gap between the patterned film and the top die. The top die is then bonded onto the bottom die, followed by curing the patterned film.
摘要翻译： 一种形成集成电路的方法包括将包括开口的图案化膜层压到晶片上，其中晶片中的底模裸露通过开口。 将顶模放入开口。 顶部模具装配到开口中，在图案化膜和顶模之间基本上没有间隙。 然后将顶模结合到底模上，随后固化图案化膜。
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公开(公告)号：US07943421B2
公开(公告)日：2011-05-17
申请号：US12329322
申请日：2008-12-05
申请人： Weng-Jin Wu , Hung-Jung Tu , Ku-Feng Yang , Jung-Chih Hu , Wen-Chih Chiou
发明人： Weng-Jin Wu , Hung-Jung Tu , Ku-Feng Yang , Jung-Chih Hu , Wen-Chih Chiou
IPC分类号： H01L23/28
CPC分类号： H01L23/3157 , H01L25/0657 , H01L25/50 , H01L2224/0554 , H01L2224/0557 , H01L2224/05571 , H01L2224/05573 , H01L2224/16 , H01L2225/06513 , H01L2924/00014 , H01L2224/05599 , H01L2224/0555 , H01L2224/0556
摘要： A method of forming integrated circuits includes laminating a patterned film including an opening onto a wafer, wherein a bottom die in the wafer is exposed through the opening. A top die is placed into the opening. The top die fits into the opening with substantially no gap between the patterned film and the top die. The top die is then bonded onto the bottom die, followed by curing the patterned film.
摘要翻译： 一种形成集成电路的方法包括将包括开口的图案化膜层压到晶片上，其中晶片中的底模裸露通过开口。 将顶模放入开口。 顶部模具装配到开口中，在图案化膜和顶模之间基本上没有间隙。 然后将顶模结合到底模上，随后固化图案化膜。
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公开(公告)号：US20100140767A1
公开(公告)日：2010-06-10
申请号：US12329322
申请日：2008-12-05
申请人： Weng-Jin Wu , Hung-Jung Tu , Ku-Feng Yang , Jung-Chih Hu , Wen-Chih Chiou
发明人： Weng-Jin Wu , Hung-Jung Tu , Ku-Feng Yang , Jung-Chih Hu , Wen-Chih Chiou
CPC分类号： H01L23/3157 , H01L25/0657 , H01L25/50 , H01L2224/0554 , H01L2224/0557 , H01L2224/05571 , H01L2224/05573 , H01L2224/16 , H01L2225/06513 , H01L2924/00014 , H01L2224/05599 , H01L2224/0555 , H01L2224/0556
摘要： A method of forming integrated circuits includes laminating a patterned film including an opening onto a wafer, wherein a bottom die in the wafer is exposed through the opening. A top die is placed into the opening. The top die fits into the opening with substantially no gap between the patterned film and the top die. The top die is then bonded onto the bottom die, followed by curing the patterned film.
摘要翻译： 一种形成集成电路的方法包括将包括开口的图案化膜层压到晶片上，其中晶片中的底模裸露通过开口。 将顶模放入开口。 顶部模具装配到开口中，在图案化膜和顶模之间基本上没有间隙。 然后将顶模结合到底模上，随后固化图案化膜。
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公开(公告)号：US07955895B2
公开(公告)日：2011-06-07
申请号：US12267244
申请日：2008-11-07
申请人： Ku-Feng Yang , Wen-Chih Chiou , Weng-Jin Wu , Hung-Jung Tu
发明人： Ku-Feng Yang , Wen-Chih Chiou , Weng-Jin Wu , Hung-Jung Tu
IPC分类号： H01L21/00
CPC分类号： H01L21/76898 , H01L21/561 , H01L21/6835 , H01L23/3114 , H01L23/3135 , H01L23/481 , H01L24/10 , H01L24/13 , H01L25/0657 , H01L25/50 , H01L2224/05001 , H01L2224/05009 , H01L2224/05567 , H01L2224/13 , H01L2224/13099 , H01L2225/0652 , H01L2225/06541 , H01L2924/00014 , H01L2924/01006 , H01L2924/01013 , H01L2924/01019 , H01L2924/01029 , H01L2924/01032 , H01L2924/01033 , H01L2924/01047 , H01L2924/01074 , H01L2924/01075 , H01L2924/01082 , H01L2924/14 , H01L2924/181 , H01L2924/19041 , H01L2924/00 , H01L2224/05599 , H01L2224/05099
摘要： A method for fabricating stacked wafers is provided. In one embodiment, the method comprises providing a wafer having a chip side and a non-chip side, the chip side comprising a plurality of semiconductor chips. A plurality of dies is provided, each of the die bonded to one of the plurality of semiconductor chips. The chip side of the wafer and the plurality of dies are encapsulated with a protecting material. The non-chip side of the wafer is thinned to an intended thickness. The wafer is then diced to separate the wafer into individual semiconductor packages.
摘要翻译： 提供了一种用于制造堆叠晶片的方法。 在一个实施例中，该方法包括提供具有芯片侧和非芯片侧的晶片，芯片侧包括多个半导体芯片。 提供多个管芯，每个管芯接合到多个半导体芯片中的一个。 晶片的芯片侧和多个管芯被保护材料封装。 晶片的非芯片侧被薄化到预期的厚度。 然后切割晶片以将晶片分离成单独的半导体封装。
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公开(公告)号：US20100330743A1
公开(公告)日：2010-12-30
申请号：US12878112
申请日：2010-09-09
申请人： Chen-Hua Yu , Wen-Chih Chiou , Weng-Jin Wu , Hung-Jung Tu , Ku-Feng Yang
发明人： Chen-Hua Yu , Wen-Chih Chiou , Weng-Jin Wu , Hung-Jung Tu , Ku-Feng Yang
IPC分类号： H01L21/50
CPC分类号： H01L21/8221 , H01L21/76898 , H01L24/16 , H01L25/0652 , H01L25/0657 , H01L25/50 , H01L27/0688 , H01L2224/05001 , H01L2224/05009 , H01L2224/05124 , H01L2224/05139 , H01L2224/05147 , H01L2224/05157 , H01L2224/05166 , H01L2224/05181 , H01L2224/05184 , H01L2224/05186 , H01L2224/05568 , H01L2224/05573 , H01L2224/05609 , H01L2224/05616 , H01L2224/05624 , H01L2224/05644 , H01L2224/05647 , H01L2224/05684 , H01L2224/13099 , H01L2225/06513 , H01L2225/06541 , H01L2924/01006 , H01L2924/01013 , H01L2924/01019 , H01L2924/01022 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01073 , H01L2924/01074 , H01L2924/01078 , H01L2924/01327 , H01L2924/014 , H01L2924/04941 , H01L2924/04953 , H01L2924/14 , H01L2924/19041 , Y10S148/164 , H01L2924/00014 , H01L2924/0105 , H01L2924/01079 , H01L2924/013
摘要： A semiconductor structure includes a first die comprising a first substrate and a first bonding pad over the first substrate, a second die having a first surface and a second surface opposite the first surface, wherein the second die is stacked on the first die and a protection layer having a vertical portion on a sidewall of the second die, and a horizontal portion extending over the first die.
摘要翻译： 半导体结构包括第一裸片，其包括第一衬底和第一衬底上的第一焊盘，第二裸片，具有与第一表面相对的第一表面和第二表面，其中第二裸片堆叠在第一裸片上， 层，其具有在第二管芯的侧壁上的垂直部分，以及在第一管芯上延伸的水平部分。
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公开(公告)号：US08405225B2
公开(公告)日：2013-03-26
申请号：US13437533
申请日：2012-04-02
申请人： Chen-Hua Yu , Wen-Chih Chiou , Weng-Jin Wu , Hung-Jung Tu , Ku-Feng Yang
发明人： Chen-Hua Yu , Wen-Chih Chiou , Weng-Jin Wu , Hung-Jung Tu , Ku-Feng Yang
CPC分类号： H01L21/8221 , H01L21/76898 , H01L24/16 , H01L25/0652 , H01L25/0657 , H01L25/50 , H01L27/0688 , H01L2224/05001 , H01L2224/05009 , H01L2224/05124 , H01L2224/05139 , H01L2224/05147 , H01L2224/05157 , H01L2224/05166 , H01L2224/05181 , H01L2224/05184 , H01L2224/05186 , H01L2224/05568 , H01L2224/05573 , H01L2224/05609 , H01L2224/05616 , H01L2224/05624 , H01L2224/05644 , H01L2224/05647 , H01L2224/05684 , H01L2224/13099 , H01L2225/06513 , H01L2225/06541 , H01L2924/01006 , H01L2924/01013 , H01L2924/01019 , H01L2924/01022 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01073 , H01L2924/01074 , H01L2924/01078 , H01L2924/01327 , H01L2924/014 , H01L2924/04941 , H01L2924/04953 , H01L2924/14 , H01L2924/19041 , Y10S148/164 , H01L2924/00014 , H01L2924/0105 , H01L2924/01079 , H01L2924/013
摘要： A semiconductor structure includes a first die comprising a first substrate and a first bonding pad over the first substrate, a second die having a first surface and a second surface opposite the first surface, wherein the second die is stacked on the first die and a protection layer having a vertical portion on a sidewall of the second die, and a horizontal portion extending over the first die.
摘要翻译： 半导体结构包括第一裸片，其包括第一衬底和第一衬底上的第一焊盘，第二裸片，具有与第一表面相对的第一表面和第二表面，其中第二裸片堆叠在第一裸片上， 层，其具有在第二管芯的侧壁上的垂直部分，以及在第一管芯上延伸的水平部分。
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公开(公告)号：US08148826B2
公开(公告)日：2012-04-03
申请号：US13273845
申请日：2011-10-14
申请人： Chen-Hua Yu , Wen-Chih Chiou , Weng-Jin Wu , Hung-Jung Tu , Ku-Feng Yang
发明人： Chen-Hua Yu , Wen-Chih Chiou , Weng-Jin Wu , Hung-Jung Tu , Ku-Feng Yang
CPC分类号： H01L21/8221 , H01L21/76898 , H01L24/16 , H01L25/0652 , H01L25/0657 , H01L25/50 , H01L27/0688 , H01L2224/05001 , H01L2224/05009 , H01L2224/05124 , H01L2224/05139 , H01L2224/05147 , H01L2224/05157 , H01L2224/05166 , H01L2224/05181 , H01L2224/05184 , H01L2224/05186 , H01L2224/05568 , H01L2224/05573 , H01L2224/05609 , H01L2224/05616 , H01L2224/05624 , H01L2224/05644 , H01L2224/05647 , H01L2224/05684 , H01L2224/13099 , H01L2225/06513 , H01L2225/06541 , H01L2924/01006 , H01L2924/01013 , H01L2924/01019 , H01L2924/01022 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01073 , H01L2924/01074 , H01L2924/01078 , H01L2924/01327 , H01L2924/014 , H01L2924/04941 , H01L2924/04953 , H01L2924/14 , H01L2924/19041 , Y10S148/164 , H01L2924/00014 , H01L2924/0105 , H01L2924/01079 , H01L2924/013
摘要： A semiconductor structure includes a first die comprising a first substrate and a first bonding pad over the first substrate, a second die having a first surface and a second surface opposite the first surface, wherein the second die is stacked on the first die and a protection layer having a vertical portion on a sidewall of the second die, and a horizontal portion extending over the first die.
摘要翻译： 半导体结构包括第一裸片，其包括第一衬底和第一衬底上的第一焊盘，第二裸片，具有与第一表面相对的第一表面和第二表面，其中第二裸片堆叠在第一裸片上， 层，其具有在第二管芯的侧壁上的垂直部分，以及在第一管芯上延伸的水平部分。
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公开(公告)号：US08053277B2
公开(公告)日：2011-11-08
申请号：US12878112
申请日：2010-09-09
申请人： Chen-Hua Yu , Wen-Chih Chiou , Weng-Jin Wu , Hung-Jung Tu , Ku-Feng Yang
发明人： Chen-Hua Yu , Wen-Chih Chiou , Weng-Jin Wu , Hung-Jung Tu , Ku-Feng Yang
IPC分类号： H01L21/50
CPC分类号： H01L21/8221 , H01L21/76898 , H01L24/16 , H01L25/0652 , H01L25/0657 , H01L25/50 , H01L27/0688 , H01L2224/05001 , H01L2224/05009 , H01L2224/05124 , H01L2224/05139 , H01L2224/05147 , H01L2224/05157 , H01L2224/05166 , H01L2224/05181 , H01L2224/05184 , H01L2224/05186 , H01L2224/05568 , H01L2224/05573 , H01L2224/05609 , H01L2224/05616 , H01L2224/05624 , H01L2224/05644 , H01L2224/05647 , H01L2224/05684 , H01L2224/13099 , H01L2225/06513 , H01L2225/06541 , H01L2924/01006 , H01L2924/01013 , H01L2924/01019 , H01L2924/01022 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01073 , H01L2924/01074 , H01L2924/01078 , H01L2924/01327 , H01L2924/014 , H01L2924/04941 , H01L2924/04953 , H01L2924/14 , H01L2924/19041 , Y10S148/164 , H01L2924/00014 , H01L2924/0105 , H01L2924/01079 , H01L2924/013
摘要： A semiconductor structure includes a first die comprising a first substrate and a first bonding pad over the first substrate, a second die having a first surface and a second surface opposite the first surface, wherein the second die is stacked on the first die and a protection layer having a vertical portion on a sidewall of the second die, and a horizontal portion extending over the first die.
摘要翻译： 半导体结构包括第一裸片，其包括第一衬底和第一衬底上的第一焊盘，第二裸片，具有与第一表面相对的第一表面和第二表面，其中第二裸片堆叠在第一裸片上， 层，其具有在第二管芯的侧壁上的垂直部分，以及在第一管芯上延伸的水平部分。
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公开(公告)号：US20100117226A1
公开(公告)日：2010-05-13
申请号：US12267244
申请日：2008-11-07
申请人： Ku-Feng YANG , Wen-Chih Chiou , Weng-Jin Wu , Hung-Jung Tu
发明人： Ku-Feng YANG , Wen-Chih Chiou , Weng-Jin Wu , Hung-Jung Tu
IPC分类号： H01L21/50 , H01L23/538
CPC分类号： H01L21/76898 , H01L21/561 , H01L21/6835 , H01L23/3114 , H01L23/3135 , H01L23/481 , H01L24/10 , H01L24/13 , H01L25/0657 , H01L25/50 , H01L2224/05001 , H01L2224/05009 , H01L2224/05567 , H01L2224/13 , H01L2224/13099 , H01L2225/0652 , H01L2225/06541 , H01L2924/00014 , H01L2924/01006 , H01L2924/01013 , H01L2924/01019 , H01L2924/01029 , H01L2924/01032 , H01L2924/01033 , H01L2924/01047 , H01L2924/01074 , H01L2924/01075 , H01L2924/01082 , H01L2924/14 , H01L2924/181 , H01L2924/19041 , H01L2924/00 , H01L2224/05599 , H01L2224/05099
摘要： A method for fabricating stacked wafers is provided. In one embodiment, the method comprises providing a wafer having a chip side and a non-chip side, the chip side comprising a plurality of semiconductor chips. A plurality of dies is provided, each of the die bonded to one of the plurality of semiconductor chips. The chip side of the wafer and the plurality of dies are encapsulated with a protecting material. The non-chip side of the wafer is thinned to an intended thickness. The wafer is then diced to separate the wafer into individual semiconductor packages.
摘要翻译： 提供了一种用于制造堆叠晶片的方法。 在一个实施例中，该方法包括提供具有芯片侧和非芯片侧的晶片，芯片侧包括多个半导体芯片。 提供多个管芯，每个管芯接合到多个半导体芯片中的一个。 晶片的芯片侧和多个管芯被保护材料封装。 晶片的非芯片侧被薄化到预期的厚度。 然后切割晶片以将晶片分离成单独的半导体封装。
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