公开(公告)号：US20240203917A1

公开(公告)日：2024-06-20

申请号：US18393489

申请日：2023-12-21

Applicant: ADEIA SEMICONDUCTOR BONDING TECHNOLOGIES INC.

Inventor： Rajesh Katkar ,  Cyprian Emeka Uzoh

IPC: H01L23/00 ,  H01L25/00

CPC classification number: H01L24/05 ,  H01L24/03 ,  H01L24/08 ,  H01L24/80 ,  H01L25/50 ,  H01L2224/03462 ,  H01L2224/03464 ,  H01L2224/0347 ,  H01L2224/03616 ,  H01L2224/0362 ,  H01L2224/0384 ,  H01L2224/03845 ,  H01L2224/05013 ,  H01L2224/05015 ,  H01L2224/05026 ,  H01L2224/05076 ,  H01L2224/05082 ,  H01L2224/05105 ,  H01L2224/05109 ,  H01L2224/05111 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05166 ,  H01L2224/05171 ,  H01L2224/05181 ,  H01L2224/05551 ,  H01L2224/05554 ,  H01L2224/05555 ,  H01L2224/05576 ,  H01L2224/05578 ,  H01L2224/05605 ,  H01L2224/05609 ,  H01L2224/05611 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/08145 ,  H01L2224/08146 ,  H01L2224/80375 ,  H01L2224/80895

Abstract: A first conductive material having a first hardness is disposed within a recess or opening of a microelectronic component, in a first preselected pattern, and forms a first portion of an interconnect structure. A second conductive material having a second hardness different from the first hardness is disposed within the recess or opening in a second preselected pattern and forms a second portion of the interconnect structure.

公开(公告)号：US11984417B2

公开(公告)日：2024-05-14

申请号：US17648309

申请日：2022-01-19

Applicant: CHANGXIN MEMORY TECHNOLOGIES, INC.

Inventor： Ling-Yi Chuang

IPC: H01L23/48 ,  H01L23/00

CPC classification number: H01L24/05 ,  H01L24/08 ,  H01L24/80 ,  H01L24/03 ,  H01L2224/0331 ,  H01L2224/03462 ,  H01L2224/05013 ,  H01L2224/05017 ,  H01L2224/05025 ,  H01L2224/05073 ,  H01L2224/05147 ,  H01L2224/05184 ,  H01L2224/05553 ,  H01L2224/05564 ,  H01L2224/05578 ,  H01L2224/05601 ,  H01L2224/05609 ,  H01L2224/05611 ,  H01L2224/05613 ,  H01L2224/05616 ,  H01L2224/05638 ,  H01L2224/08145 ,  H01L2224/08503 ,  H01L2224/8081

Abstract: The present disclosure relates to the technical field of semiconductors, and provides a semiconductor structure and a manufacturing method thereof. The semiconductor structure includes a first chip and a second chip. A first conductive connection wire of the first chip is connected to a first conductive contact pad, and a second conductive connection wire of the second chip is connected to a second conductive contact pad. In addition, the first conductive contact pad includes a first conductor group and a second conductor group, and the second conductive contact pad includes a third conductor group and a fourth conductor group.

公开(公告)号：US09837380B2

公开(公告)日：2017-12-05

申请号：US14165720

申请日：2014-01-28

Applicant: Infineon Technologies Austria AG

Inventor： Tian San Tan ,  Theng Chao Long

IPC: H01L23/00 ,  H01L25/065 ,  H01L21/56 ,  H01L23/31 ,  H01L25/00 ,  H01R4/00 ,  H01L25/07 ,  H01L23/433 ,  H01L23/495

CPC classification number: H01L25/0655 ,  H01L21/56 ,  H01L23/3107 ,  H01L23/3121 ,  H01L23/4334 ,  H01L23/49513 ,  H01L23/49524 ,  H01L23/49562 ,  H01L23/49575 ,  H01L24/05 ,  H01L24/29 ,  H01L24/32 ,  H01L24/33 ,  H01L24/37 ,  H01L24/38 ,  H01L24/40 ,  H01L24/48 ,  H01L24/70 ,  H01L24/73 ,  H01L24/83 ,  H01L24/84 ,  H01L24/89 ,  H01L24/97 ,  H01L25/072 ,  H01L25/50 ,  H01L2224/04026 ,  H01L2224/05554 ,  H01L2224/05609 ,  H01L2224/05611 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05664 ,  H01L2224/05669 ,  H01L2224/29111 ,  H01L2224/29139 ,  H01L2224/29144 ,  H01L2224/29147 ,  H01L2224/2929 ,  H01L2224/29294 ,  H01L2224/293 ,  H01L2224/32227 ,  H01L2224/32245 ,  H01L2224/33181 ,  H01L2224/37011 ,  H01L2224/37013 ,  H01L2224/37026 ,  H01L2224/3719 ,  H01L2224/40227 ,  H01L2224/40245 ,  H01L2224/40499 ,  H01L2224/48227 ,  H01L2224/48245 ,  H01L2224/73221 ,  H01L2224/73263 ,  H01L2224/73265 ,  H01L2224/83143 ,  H01L2224/83447 ,  H01L2224/83801 ,  H01L2224/83815 ,  H01L2224/83825 ,  H01L2224/8384 ,  H01L2224/83855 ,  H01L2224/84143 ,  H01L2224/84447 ,  H01L2224/84801 ,  H01L2224/84815 ,  H01L2224/84825 ,  H01L2224/8484 ,  H01L2224/8485 ,  H01L2224/84855 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/1425 ,  H01L2924/14252 ,  H01L2924/14253 ,  H01L2924/181 ,  H01R4/00 ,  H01L2924/00 ,  H01L2924/0105 ,  H01L2924/01049 ,  H01L2924/01014 ,  H01L2924/014 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/83 ,  H01L2224/84

Abstract: A semiconductor device includes a device carrier, a first semiconductor chip mounted on the device carrier and a second semiconductor chip mounted on the device carrier. Further, the semiconductor device includes a first contact clip bonded to a first electrode of the first semiconductor chip, a second contact clip bonded to a first electrode of the second semiconductor chip and an insulating connector configured to hold the first contact clip and the second contact clip together.

公开(公告)号：US09679937B2

公开(公告)日：2017-06-13

申请号：US14992865

申请日：2016-01-11

Applicant: Sony Corporation

Inventor： Atsushi Okuyama

IPC: H01L23/00 ,  H01L27/146 ,  H01L25/00 ,  H01L21/768 ,  H01L23/532

CPC classification number: H01L27/14636 ,  H01L21/76804 ,  H01L21/76831 ,  H01L21/76898 ,  H01L23/53214 ,  H01L23/53228 ,  H01L23/53238 ,  H01L24/06 ,  H01L24/09 ,  H01L24/94 ,  H01L25/50 ,  H01L27/14634 ,  H01L2224/05547 ,  H01L2224/05609 ,  H01L2224/05611 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05655 ,  H01L2224/05657 ,  H01L2224/05666 ,  H01L2224/0568 ,  H01L2224/05681 ,  H01L2224/05684 ,  H01L2224/0903 ,  H01L2224/095 ,  H01L2224/80357 ,  H01L2224/80895 ,  H01L2224/80896 ,  H01L2225/06513 ,  H01L2924/01002 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01018 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/04953 ,  H01L2924/00014

Abstract: A semiconductor device with a connection pad in a substrate, the connection pad having an exposed surface made of a metallic material that diffuses less readily into a dielectric layer than does a metal of a wiring layer connected thereto.

公开(公告)号：US20170125366A1

公开(公告)日：2017-05-04

申请号：US15275522

申请日：2016-09-26

Applicant: FUJITSU LIMITED

Inventor： Taiki Uemura ,  Seiki Sakuyama

IPC: H01L23/00

CPC classification number: H01L24/05 ,  H01L23/49816 ,  H01L24/13 ,  H01L24/16 ,  H01L24/29 ,  H01L24/48 ,  H01L24/73 ,  H01L24/81 ,  H01L2224/0401 ,  H01L2224/05609 ,  H01L2224/05611 ,  H01L2224/05613 ,  H01L2224/05639 ,  H01L2224/13101 ,  H01L2224/16225 ,  H01L2224/2919 ,  H01L2224/29199 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48228 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/20102 ,  H01L2924/20103 ,  H01L2224/45099 ,  H01L2924/00012 ,  H01L2924/014

Abstract: An electronic device includes a first electronic part, a second electronic part opposite the first electronic part, and a bonding portion between the first electronic part and the second electronic part. The bonding portion contains a solder containing a substance whose crystal structure reversibly changes in temperature rise and fall processes which accompany the operation of the electronic device or electronic equipment including the electronic device. A change in the crystal structure of the substance contained in the solder promotes recovery and recrystallization of the solder in the temperature rise and fall processes which accompany the operation of the electronic device or the electronic equipment. As a result, the coarsening of crystal grains in the solder is suppressed.

公开(公告)号：US09269682B2

公开(公告)日：2016-02-23

申请号：US13778969

申请日：2013-02-27

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Tsung-Yuan Yu ,  Hsien-Wei Chen ,  Ying-Ju Chen

IPC: H01L23/00

CPC classification number: H01L24/11 ,  H01L24/03 ,  H01L24/05 ,  H01L24/13 ,  H01L2224/03424 ,  H01L2224/0345 ,  H01L2224/03462 ,  H01L2224/03464 ,  H01L2224/0348 ,  H01L2224/0391 ,  H01L2224/0401 ,  H01L2224/05022 ,  H01L2224/05026 ,  H01L2224/05027 ,  H01L2224/05109 ,  H01L2224/05111 ,  H01L2224/05139 ,  H01L2224/05144 ,  H01L2224/05155 ,  H01L2224/05164 ,  H01L2224/05166 ,  H01L2224/05572 ,  H01L2224/05573 ,  H01L2224/05582 ,  H01L2224/05583 ,  H01L2224/05609 ,  H01L2224/05611 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05664 ,  H01L2224/05666 ,  H01L2224/05681 ,  H01L2224/05687 ,  H01L2224/11334 ,  H01L2224/13022 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13116 ,  H01L2224/81191 ,  H01L2224/94 ,  H01L2224/97 ,  H01L2924/15788 ,  H01L2924/00014 ,  H01L2924/01082 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/01047 ,  H01L2224/11 ,  H01L2224/81 ,  H01L2924/00012 ,  H01L2924/00

Abstract: A method of forming a bump structure includes forming a metallization layer on a top metal layer by electroless plating process, forming a polymer layer over the metallization layer; forming an opening on the polymer layer to expose the metallization layer, and forming a solder bump over the exposed metallization layer to make electrical contact with the top metal layer.

Abstract translation: 形成凸块结构的方法包括通过化学镀方法在顶部金属层上形成金属化层，在金属化层上形成聚合物层; 在所述聚合物层上形成开口以暴露所述金属化层，以及在所述暴露的金属化层上形成焊料凸块以与所述顶部金属层电接触。

公开(公告)号：US09209112B2

公开(公告)日：2015-12-08

申请号：US14504957

申请日：2014-10-02

Applicant: Seiko Epson Corporation

Inventor： Hideo Imai

IPC: H01L23/48 ,  H01L23/00 ,  H01L25/07 ,  H01L21/768 ,  H01L25/065

CPC classification number: H01L23/481 ,  H01L21/76898 ,  H01L23/562 ,  H01L25/0657 ,  H01L25/074 ,  H01L2224/03462 ,  H01L2224/0401 ,  H01L2224/05009 ,  H01L2224/05553 ,  H01L2224/05567 ,  H01L2224/0557 ,  H01L2224/05571 ,  H01L2224/05609 ,  H01L2224/05611 ,  H01L2224/05613 ,  H01L2224/05616 ,  H01L2224/05618 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/06181 ,  H01L2224/11462 ,  H01L2224/11464 ,  H01L2224/13007 ,  H01L2224/13017 ,  H01L2224/13022 ,  H01L2224/13144 ,  H01L2224/16146 ,  H01L2224/16147 ,  H01L2224/16237 ,  H01L2224/8114 ,  H01L2224/81191 ,  H01L2224/81895 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2924/01327 ,  H01L2924/00

Abstract: A first substrate with a penetration electrode formed thereon is stacked on a second substrate with a protruding electrode formed thereon. The penetration electrode has a recessed portion. The substrates are stacked with the protruding electrode entered in the recessed portion. A distal width of the protruding electrode is smaller than an opening width of the recessed portion.

Abstract translation: 在其上形成有穿透电极的第一基板层叠在其上形成有突出电极的第二基板上。 穿透电极具有凹部。 基板被突出电极堆叠在凹入部分中。 突出电极的前端宽度小于凹部的开口宽度。

公开(公告)号：US20150348925A1

公开(公告)日：2015-12-03

申请号：US14725242

申请日：2015-05-29

Applicant: APPLIED Materials, Inc.

Inventor： David P. Surdock ,  Marvin L. Bernt

IPC: H01L23/00

CPC classification number: H01L24/13 ,  C23F1/26 ,  C23F1/38 ,  H01L21/4846 ,  H01L23/49811 ,  H01L24/02 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/94 ,  H01L2224/02311 ,  H01L2224/02321 ,  H01L2224/02331 ,  H01L2224/0239 ,  H01L2224/0345 ,  H01L2224/03452 ,  H01L2224/03462 ,  H01L2224/03464 ,  H01L2224/0347 ,  H01L2224/03614 ,  H01L2224/03831 ,  H01L2224/03912 ,  H01L2224/03914 ,  H01L2224/0401 ,  H01L2224/05073 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05166 ,  H01L2224/05187 ,  H01L2224/05609 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05664 ,  H01L2224/11005 ,  H01L2224/11013 ,  H01L2224/1145 ,  H01L2224/11452 ,  H01L2224/11462 ,  H01L2224/11464 ,  H01L2224/1147 ,  H01L2224/11831 ,  H01L2224/13006 ,  H01L2224/13018 ,  H01L2224/13027 ,  H01L2224/13083 ,  H01L2224/13084 ,  H01L2224/13111 ,  H01L2224/13116 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13563 ,  H01L2224/1357 ,  H01L2224/13666 ,  H01L2224/94 ,  H01L2224/03 ,  H01L2224/11 ,  H01L2924/00014 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/01025 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2224/0231 ,  H01L2924/01029 ,  H01L2924/01079 ,  H01L2924/00012

Abstract: In accordance with one embodiment of the present disclosure, a method of forming a metal feature includes etching a portion of a first metal layer using a first etching chemistry, and etching a portion of a barrier layer using a second etching chemistry to achieve a barrier layer undercut of less than or equal to 2 times the thickness of the barrier layer.

Abstract translation: 根据本公开的一个实施例，形成金属特征的方法包括使用第一蚀刻化学法蚀刻第一金属层的一部分，并且使用第二蚀刻化学法蚀刻阻挡层的一部分以实现阻挡层 底切小于或等于阻挡层厚度的2倍。

公开(公告)号：US20140376200A1

公开(公告)日：2014-12-25

申请号：US13924002

申请日：2013-06-21

Applicant: Invensas Corporation

Inventor： Cyprian Emeka Uzoh ,  Belgacem Haba ,  Charles G. Woychik ,  Michael Newman ,  Terrence Caskey

IPC: H05K3/30 ,  H05K1/18

CPC classification number: H01L24/13 ,  H01L21/563 ,  H01L23/564 ,  H01L24/02 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/14 ,  H01L24/16 ,  H01L24/17 ,  H01L24/32 ,  H01L24/81 ,  H01L24/83 ,  H01L24/92 ,  H01L25/0652 ,  H01L25/0655 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/02372 ,  H01L2224/0345 ,  H01L2224/03462 ,  H01L2224/03464 ,  H01L2224/0347 ,  H01L2224/03912 ,  H01L2224/03914 ,  H01L2224/0401 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05557 ,  H01L2224/05568 ,  H01L2224/05571 ,  H01L2224/05609 ,  H01L2224/05611 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05657 ,  H01L2224/05664 ,  H01L2224/10145 ,  H01L2224/1146 ,  H01L2224/11462 ,  H01L2224/11464 ,  H01L2224/1147 ,  H01L2224/11903 ,  H01L2224/13024 ,  H01L2224/13025 ,  H01L2224/13109 ,  H01L2224/13111 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13157 ,  H01L2224/13164 ,  H01L2224/1319 ,  H01L2224/14517 ,  H01L2224/1601 ,  H01L2224/16057 ,  H01L2224/16058 ,  H01L2224/16104 ,  H01L2224/16105 ,  H01L2224/16145 ,  H01L2224/16146 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16503 ,  H01L2224/17505 ,  H01L2224/17517 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/81001 ,  H01L2224/81007 ,  H01L2224/811 ,  H01L2224/81139 ,  H01L2224/8192 ,  H01L2224/83104 ,  H01L2224/9201 ,  H01L2224/9212 ,  H01L2225/06513 ,  H01L2225/06524 ,  H01L2225/06541 ,  H01L2924/00014 ,  H05K1/181 ,  H05K3/30 ,  Y10T29/4913 ,  H01L2924/00012 ,  H01L2924/01015 ,  H01L2924/01074 ,  H01L2224/05552

Abstract: Microelectronic assemblies and methods for making the same are disclosed herein. In one embodiment, a method of forming a microelectronic assembly comprises assembling first and second components to have first major surfaces of the first and second components facing one another and spaced apart from one another by a predetermined spacing, the first component having first and second oppositely-facing major surfaces, a first thickness extending in a first direction between the first and second major surfaces, and a plurality of first metal connection elements at the first major surface, the second component having a plurality of second metal connection elements at the first major surface of the second component; and plating a plurality of metal connector regions each connecting and extending continuously between a respective first connection element and a corresponding second connection element opposite the respective first connection element in the first direction.

Abstract translation: 本文公开了微电子组件及其制造方法。 在一个实施例中，形成微电子组件的方法包括组装第一和第二部件以使第一和第二部件的第一主表面彼此面对并且彼此隔开预定间隔，第一部件具有第一和第二相对 主表面，在第一和第二主表面之间沿第一方向延伸的第一厚度和在第一主表面处的多个第一金属连接元件，第二部件在第一主要部分具有多个第二金属连接元件 第二部件的表面; 以及电镀多个金属连接器区域，每个金属连接器区域在第一方向上在相应的第一连接元件和与相应的第一连接元件相对的相应的第二连接元件之间连续延伸。

公开(公告)号：US20140302642A1

公开(公告)日：2014-10-09

申请号：US14310377

申请日：2014-06-20

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Chen-Hua Yu ,  Shih Ting Lin ,  Jing-Cheng Lin ,  Shang-Yun Hou ,  Szu Wei Lu

IPC: H01L21/56

CPC classification number: H01L21/561 ,  H01L21/56 ,  H01L21/563 ,  H01L23/4985 ,  H01L23/5387 ,  H01L23/562 ,  H01L24/05 ,  H01L24/13 ,  H01L24/16 ,  H01L24/32 ,  H01L24/81 ,  H01L24/83 ,  H01L24/92 ,  H01L2224/0401 ,  H01L2224/05609 ,  H01L2224/05611 ,  H01L2224/05624 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05794 ,  H01L2224/058 ,  H01L2224/131 ,  H01L2224/13109 ,  H01L2224/13111 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13294 ,  H01L2224/133 ,  H01L2224/16 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/81007 ,  H01L2224/81192 ,  H01L2224/81193 ,  H01L2224/81409 ,  H01L2224/81411 ,  H01L2224/81424 ,  H01L2224/81444 ,  H01L2224/81447 ,  H01L2224/81815 ,  H01L2224/83007 ,  H01L2224/831 ,  H01L2224/92125 ,  H01L2924/01322 ,  H01L2924/3511 ,  H01L2924/014 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/00014 ,  H01L2924/00

Abstract: Flexible structures and method of providing a flexible structure are disclosed. In some embodiments, a method of providing a flexible structure includes: providing a flex substrate having a device bonded to a first side of the flex substrate; and attaching a rigid layer to a second side of the flex substrate opposite the first side using an adhesive layer.

Abstract translation: 公开了柔性结构和提供柔性结构的方法。 在一些实施例中，提供柔性结构的方法包括：提供具有结合到柔性基板的第一侧的装置的柔性基板; 以及使用粘合剂层将刚性层附接到柔性基板的与第一侧相对的第二侧。