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公开(公告)号:US06643950B2
公开(公告)日:2003-11-11
申请号:US10006015
申请日:2001-12-04
申请人: William J. Lambert , Zeren Wang
发明人: William J. Lambert , Zeren Wang
IPC分类号: F26B506
CPC分类号: F26B5/06
摘要: A cake resistance measuring system and method are used to measure the cake resistance of a freeze dried sample during or after processing, with the results of the measurement being used to improve that processing and/or subsequent freeze drying processes or formulations.
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公开(公告)号:US08243410B2
公开(公告)日:2012-08-14
申请号:US12116746
申请日:2008-05-07
CPC分类号: H02M3/1584
摘要: A transient voltage compensation system is provided. The transient voltage compensation system includes a processor and a first voltage regulator coupled to the processor, wherein the first voltage regulator is to deliver a load current to the processor at an output voltage. The transient voltage compensation system also includes a second voltage regulator coupled to the first voltage regulator, wherein the second voltage regulator is to regulate the output voltage in response to transient loads of the processor.
摘要翻译: 提供瞬态电压补偿系统。 瞬态电压补偿系统包括耦合到处理器的处理器和第一电压调节器,其中第一电压调节器将以输出电压将负载电流传送到处理器。 瞬态电压补偿系统还包括耦合到第一电压调节器的第二电压调节器,其中第二电压调节器响应于处理器的瞬态负载来调节输出电压。
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公开(公告)号:US20090279224A1
公开(公告)日:2009-11-12
申请号:US12116746
申请日:2008-05-07
IPC分类号: H02H3/22
CPC分类号: H02M3/1584
摘要: A transient voltage compensation system is provided. The transient voltage compensation system includes a processor and a first voltage regulator coupled to the processor, wherein the first voltage regulator is to deliver a load current to the processor at an output voltage. The transient voltage compensation system also includes a second voltage regulator coupled to the first voltage regulator, wherein the second voltage regulator is to regulate the output voltage in response to transient loads of the processor.
摘要翻译: 提供瞬态电压补偿系统。 瞬态电压补偿系统包括耦合到处理器的处理器和第一电压调节器,其中第一电压调节器将以输出电压将负载电流传送到处理器。 瞬态电压补偿系统还包括耦合到第一电压调节器的第二电压调节器,其中第二电压调节器响应于处理器的瞬态负载来调节输出电压。
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公开(公告)号:US4488224A
公开(公告)日:1984-12-11
申请号:US406775
申请日:1982-08-10
CPC分类号: G06F9/30145 , G06F9/30072
摘要: A control system is described for controlling the flow of multi-format, multi-bit macroinstructions for loading data into registers. The control system is adapted to: (A) control microprogram flow of instructions based on data within a floating point macroinstruction, (B) speed up macroinstruction flow as a function of data within various fields of the macroinstruction, and (C) speed up macroinstruction branches.
摘要翻译: 描述了用于控制用于将数据加载到寄存器中的多格式多位宏指令的流程的控制系统。 该控制系统适用于:(A)根据浮点宏指令内的数据控制指令的微程序流程,(B)加快宏指令流程作为宏指令各个领域内数据的函数,(C)加快宏指令 分支机构
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公开(公告)号:US20170179094A1
公开(公告)日:2017-06-22
申请号:US14974978
申请日:2015-12-18
申请人: Yongki Min , Reynaldo A. Olmedo , William J. Lambert , Kaladhar Radhakrishnan , Leigh E. Wojewoda , Venkat Anil K. Magadala , Clive R. Hendricks
发明人: Yongki Min , Reynaldo A. Olmedo , William J. Lambert , Kaladhar Radhakrishnan , Leigh E. Wojewoda , Venkat Anil K. Magadala , Clive R. Hendricks
IPC分类号: H01L25/18 , H01L23/00 , H01L25/16 , H01L25/065 , H01L23/498 , H01L23/522
CPC分类号: H01L25/18 , H01F17/00 , H01F17/0006 , H01L23/49827 , H01L23/49838 , H01L23/5227 , H01L24/06 , H01L25/0655 , H01L25/0657 , H01L25/16 , H01L2224/16265 , H01L2924/1427 , H01L2924/143 , H01L2924/19011 , H01L2924/19042
摘要: An apparatus comprises an inductor module including: a module substrate including a magnetic dielectric material; a plurality of inductive circuit elements arranged in the module substrate, wherein an inductive circuit element includes conductive traces arranged as a coil including a first coil end, a second coil end and a coil core, wherein the coil core includes the magnetic dielectric material; and a plurality of conductive contact pads electrically coupled to the first and second coil ends. The contact pads electrically coupled to the first coil ends are arranged on a first surface of the inductor module, and the contact pads electrically coupled to the second coil ends are arranged on a second surface of the inductor module.
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公开(公告)号:US20170169932A1
公开(公告)日:2017-06-15
申请号:US14969861
申请日:2015-12-15
申请人: William J. Lambert , Kevin O'Brien , Omkar Karhade
发明人: William J. Lambert , Kevin O'Brien , Omkar Karhade
CPC分类号: H01F27/2823 , C23C14/35 , C23C14/505 , C23C28/42 , C23C28/44 , H01F17/04 , H01F27/32 , H01F41/12
摘要: Apparatus and methods are provided for a wire based inductor component. In an example, an inductor apparatus can include a wire and a plurality of individual layers of magnetic material surrounding the wire.
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公开(公告)号:US09177831B2
公开(公告)日:2015-11-03
申请号:US14041722
申请日:2013-09-30
申请人: Chia-Pin Chiu , Qing Ma , Robert L. Sankman , Paul B. Fischer , Patrick Morrow , William J. Lambert , Charles A. Gealer , Tyler Osborn
发明人: Chia-Pin Chiu , Qing Ma , Robert L. Sankman , Paul B. Fischer , Patrick Morrow , William J. Lambert , Charles A. Gealer , Tyler Osborn
CPC分类号: H01L25/0655 , H01L21/4803 , H01L21/561 , H01L21/568 , H01L23/15 , H01L23/3121 , H01L23/5384 , H01L23/5386 , H01L23/5389 , H01L24/19 , H01L24/97 , H01L2224/04105 , H01L2224/12105 , H01L2224/16225 , H01L2224/24137 , H01L2224/2499 , H01L2224/32225 , H01L2224/73204 , H01L2924/12042 , H01L2924/181 , H01L2924/00
摘要: A die assembly formed on a thin dielectric sheet is described. In one example, a first and a second die have interconnect areas. A dielectric sheet, such as glass, silicon, or oxidized metal is applied over the interconnect areas of dies. Conductive vias are formed in the dielectric sheet to connect with pads of the interconnect areas. A build-up layer includes routing to connect pads of the first die interconnect area to pads of the second die interconnect area through the conductive vias and a cover is applied over the dies, the dielectric sheet, and the build-up layer.
摘要翻译: 描述了形成在薄介电片上的模具组件。 在一个示例中,第一和第二管芯具有互连区域。 将诸如玻璃,硅或氧化金属之类的电介质片施加在管芯的互连区域上。 导电孔形成在电介质片中以与互连区的焊盘连接。 堆积层包括通过导电通孔将第一管芯互连区的焊盘连接到第二管芯互连区的焊盘的路由,并且覆盖被施加在管芯,电介质层和堆积层上。
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公开(公告)号:US20150091182A1
公开(公告)日:2015-04-02
申请号:US14041722
申请日:2013-09-30
申请人: Chia-Pin Chiu , Qing Ma , Robert L. Sankman , Paul B. Fischer , Patrick Morrow , William J. Lambert , Charles A. Gealer , Tyler Osborn
发明人: Chia-Pin Chiu , Qing Ma , Robert L. Sankman , Paul B. Fischer , Patrick Morrow , William J. Lambert , Charles A. Gealer , Tyler Osborn
IPC分类号: H01L25/00 , H01L23/15 , H01L21/48 , H01L25/065
CPC分类号: H01L25/0655 , H01L21/4803 , H01L21/561 , H01L21/568 , H01L23/15 , H01L23/3121 , H01L23/5384 , H01L23/5386 , H01L23/5389 , H01L24/19 , H01L24/97 , H01L2224/04105 , H01L2224/12105 , H01L2224/16225 , H01L2224/24137 , H01L2224/2499 , H01L2224/32225 , H01L2224/73204 , H01L2924/12042 , H01L2924/181 , H01L2924/00
摘要: A die assembly formed on a thin dielectric sheet is described. In one example, a first and a second die have interconnect areas. A dielectric sheet, such as glass, silicon, or oxidized metal is applied over the interconnect areas of dies. Conductive vias are formed in the dielectric sheet to connect with pads of the interconnect areas. A build-up layer includes routing to connect pads of the first die interconnect area to pads of the second die interconnect area through the conductive vias and a cover is applied over the dies, the dielectric sheet, and the build-up layer.
摘要翻译: 描述了形成在薄介电片上的模具组件。 在一个示例中,第一和第二管芯具有互连区域。 将诸如玻璃,硅或氧化金属之类的电介质片施加在管芯的互连区域上。 导电孔形成在电介质片中以与互连区的焊盘连接。 堆积层包括通过导电通孔将第一管芯互连区的焊盘连接到第二管芯互连区的焊盘的路由,并且覆盖被施加在管芯,电介质层和堆积层上。
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公开(公告)号:US06284727B1
公开(公告)日:2001-09-04
申请号:US08472349
申请日:1995-06-07
申请人: Yesook Kim , William J. Lambert , Hong Qi , Robert A Gelfand , Kieran F. Geoghegan , Dennis E. Danley
发明人: Yesook Kim , William J. Lambert , Hong Qi , Robert A Gelfand , Kieran F. Geoghegan , Dennis E. Danley
IPC分类号: A61K3800
CPC分类号: A61K31/426 , A61K31/4439 , A61K38/26 , C07K14/605
摘要: There are disclosed methods for the treatment of non-insulin dependent diabetes mellitus in a mammal comprising the prolonged administration of GLP-1 (7-37), and related peptides. Also disclosed are compositions to prolong the administration of the peptides.
摘要翻译: 公开了用于治疗哺乳动物中非胰岛素依赖性糖尿病的方法,所述方法包括延长施用GLP-1(7-37)和相关肽。 还公开了延长肽的施用的组合物。
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公开(公告)号:US20170178786A1
公开(公告)日:2017-06-22
申请号:US14973115
申请日:2015-12-17
CPC分类号: H01F27/2804 , C25D5/16 , C25D5/48 , C25D7/00 , H01F17/0013 , H01F17/0033 , H01F27/255 , H01F41/0206 , H01F41/041 , H01F41/046 , H01F2017/002 , H01F2027/2809
摘要: Devices and methods including a though-hole inductor for an electronic package are shown herein. Examples of the through-hole inductor include a substrate including at least one substrate layer. Each substrate layer including a dielectric layer having a first surface and a second surface. An aperture included in the dielectric layer is located from the first surface to the second surface. The aperture includes an aperture wall from the first surface to the second surface. A conductive layer is deposited on the first surface, second surface, and the aperture wall. At least one coil is cut from the conductive layer and located on the aperture wall.
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