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16 条记录 (耗时 0.024 秒)

    CAPACITOR AND METHOD OF MANUFACTURING THE SAME
    2.
    发明申请
    CAPACITOR AND METHOD OF MANUFACTURING THE SAME 审中-公开
    电容器及其制造方法

    公开(公告)号：US20100214719A1

    公开(公告)日：2010-08-26

    申请号：US12414030

    申请日：2009-03-30

    申请人： Woon Chun Kim ,  Sung Yi ,  Soon Gyu Yim

    发明人： Woon Chun Kim ,  Sung Yi ,  Soon Gyu Yim

    IPC分类号： H01G4/06 ,  B05D5/12 ,  H01G4/10

    CPC分类号： H01G4/33 ,  H01G4/10 ,  H01G4/18 ,  H01G4/206

    摘要： The present invention provides a capacitor including: a bottom electrode; a first dielectric layer formed on the bottom electrode; a conductive polymer layer formed on the first dielectric layer; a second dielectric layer formed on the conductive polymer layer; and a top electrode formed on the second dielectric layer, and a method of manufacturing the same.

    摘要翻译： 本发明提供一种电容器，包括：底部电极; 形成在所述底部电极上的第一电介质层; 形成在所述第一电介质层上的导电聚合物层; 形成在导电聚合物层上的第二电介质层; 以及形成在第二介电层上的顶电极及其制造方法。

    Display array substrate and method of manufacturing display substrate
    6.
    发明申请
    Display array substrate and method of manufacturing display substrate 审中-公开
    显示阵列基板及制造显示基板的方法

    公开(公告)号：US20110128709A1

    公开(公告)日：2011-06-02

    申请号：US12805216

    申请日：2010-07-19

    申请人： Woon Chun Kim ,  Soon Gyu Yim ,  Jong Young Lee

    发明人： Woon Chun Kim ,  Soon Gyu Yim ,  Jong Young Lee

    IPC分类号： H05K7/00 ,  H05K3/00

    CPC分类号： G06F3/041 ,  Y10T29/49124

    摘要： A display array substrate according to an aspect of the invention may include: a substrate wafer having a plurality of substrates and cutting portions connecting the plurality of substrates to a dummy area, the substrate wafer being diced to provide individual substrates by cutting the cutting portions; and a transparent electrode part coated over one surface of the substrate wafer.

    摘要翻译： 根据本发明的一个方面的显示阵列基板可以包括：具有多个基板和将多个基板连接到虚拟区域的切割部分的基板晶片，通过切割切割部分切割基板晶片以提供单独的基板; 以及涂覆在基板晶片的一个表面上的透明电极部分。

    Wafer Level Package Having Cylindrical Capacitor and Method Of Fabrication The Same
    9.
    发明申请
    Wafer Level Package Having Cylindrical Capacitor and Method Of Fabrication The Same 有权
    具有圆柱形电容器的晶圆级封装及其制造方法相同

    公开(公告)号：US20130147014A1

    公开(公告)日：2013-06-13

    申请号：US13752238

    申请日：2013-01-28

    申请人： Seung Seoup Lee ,  Soon Gyu Yim

    发明人： Seung Seoup Lee ,  Soon Gyu Yim

    IPC分类号： H01L49/02

    CPC分类号： H01L28/60 ,  H01L23/3114 ,  H01L23/5223 ,  H01L28/90 ,  H01L2224/131 ,  H01L2924/01002 ,  H01L2924/01011 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/014

    摘要： Disclosed is a wafer level package having a cylindrical capacitor, which is capable of increasing electrostatic capacity thanks to the use of a cylindrical capacitor structure and which includes a wafer chip having a bonding pad formed thereon and an insulating layer formed thereon and exposing the bonding pad, a redistribution layer connected to the bonding pad and extending to one side of the insulating layer, a cylindrical outer electrode connected to the redistribution layer and having a center opening therein, a cylindrical inner electrode formed in the center opening of the outer electrode so as to be separated from the outer electrode, a dielectric layer formed between the outer electrode and the inner electrode, and a resin sealing portion formed on the insulating layer to cover the redistribution layer, the inner electrode, the outer electrode and the dielectric layer and having a first recess for exposing an upper surface of the inner electrode. A method of fabricating the wafer level package having a cylindrical capacitor is also provided.

    摘要翻译： 公开了一种具有圆柱形电容器的晶片级封装，其由于使用圆柱形电容器结构而能够增加静电容量，并且其包括其上形成有焊盘的晶片芯片和形成在其上的绝缘层，并露出焊盘 连接到接合焊盘并延伸到绝缘层的一侧的再分配层，连接到再分布层并且具有中心开口的圆筒形外部电极，形成在外部电极的中心开口中的圆柱形内部电极，以便 与外部电极分离，形成在外部电极和内部电极之间的电介质层和形成在绝缘层上以覆盖再分配层，内部电极，外部电极和电介质层的树脂密封部分，并且具有 用于暴露内部电极的上表面的第一凹部。 还提供了一种制造具有圆柱形电容器的晶片级封装的方法。

    APPARATUS AND METHOD FOR INSPECTING DEFECTS IN CIRCUIT PATTERN OF SUBSTRATE
    10.
    发明申请
    APPARATUS AND METHOD FOR INSPECTING DEFECTS IN CIRCUIT PATTERN OF SUBSTRATE 失效
    用于检查基板电路图中缺陷的装置和方法

    公开(公告)号：US20110115516A1

    公开(公告)日：2011-05-19

    申请号：US12710937

    申请日：2010-02-23

    申请人： Seung Seoup Lee ,  Soon Gyu Yim ,  In Kyung Park

    发明人： Seung Seoup Lee ,  Soon Gyu Yim ,  In Kyung Park

    IPC分类号： G01R31/02

    CPC分类号： G01R31/312

    摘要： Disclosed herein is an apparatus and method for inspecting defects in the circuit pattern of a substrate. The apparatus for inspecting defects in a circuit pattern of a substrate includes a pin probe configured to input a voltage while coming into contact with an inspection target circuit pattern of a substrate. A capacitor sensor is provided with a membrane electrode which is opposite a connection circuit pattern to be electrically connected to the inspection target circuit pattern in a non-contact manner, and is configured to detect both capacitance and capacitance variation, generated due to displacement of the membrane electrode attributable to electrostatic attractive force acting from the connection circuit pattern on the membrane electrode. A capacitance measurement unit is connected to the capacitor sensor and is configured to measure capacitance attributable to the displacement of the membrane electrode, which is input from the capacitor sensor.

    摘要翻译： 本文公开了一种用于检查衬底的电路图案中的缺陷的装置和方法。 用于检查基板的电路图案中的缺陷的装置包括：引脚探针，其被配置为在与基板的检查对象电路图案接触的同时输入电压。 电容器传感器设置有与非接触式电连接到检查对象电路图案的连接电路图案相对的膜电极，并且被配置为检测由于位移而产生的电容和电容变化 膜电极归因于从膜电极上的连接电路图案作用的静电吸引力。 电容测量单元连接到电容器传感器，并且被配置为测量归因于从电容器传感器输入的膜电极的位移的电容。