公开(公告)号：US20120318562A1

公开(公告)日：2012-12-20

申请号：US13438363

申请日：2012-04-03

Applicant: Kyu-Tae Kim ,  Yong-Hyun Kim ,  Jung-Chan Cho ,  Jin-San Jung

Inventor： Kyu-Tae Kim ,  Yong-Hyun Kim ,  Jung-Chan Cho ,  Jin-San Jung

IPC: H05K1/02

CPC classification number: H05K3/0097 ,  H05K3/007 ,  H05K2203/0169

Abstract: A working panel includes first array board patterns arranged in a first region and including first and second guide bar patterns facing each other and N first unit board patterns, where N is a natural number greater than or equal to 2, positioned between the first and second guide bar patterns, and second array board patterns including third and fourth guide bar patterns facing each other, and M second unit board patterns, where 1≦M

Abstract translation: 工作面板包括布置在第一区域中并包括彼此面对的第一和第二导杆图案的第一阵列板图案，以及N个大于或等于2的自然数，N个第一单元板图案，位于第一和第二 引导杆图案和包括彼此面对的第三和第四导杆图案的第二阵列板图案，以及位于第三和第四导杆图案之间的第二单元板图案，其中1＆lt; NlE; M

公开(公告)号：US07715200B2

公开(公告)日：2010-05-11

申请号：US12232990

申请日：2008-09-26

Applicant: Jung-Chan Cho ,  Yang-Je Lee ,  Hyun-Seok Choi ,  Yong-Hyun Kim ,  Jung-Hyeon Kim ,  Hyo-Jae Bang ,  Do-Hyung Kim ,  Kyoung-Sun Kim ,  Young-Ho Lee ,  Jae-Sang Baik ,  Yong-Jin Kim

Inventor： Jung-Chan Cho ,  Yang-Je Lee ,  Hyun-Seok Choi ,  Yong-Hyun Kim ,  Jung-Hyeon Kim ,  Hyo-Jae Bang ,  Do-Hyung Kim ,  Kyoung-Sun Kim ,  Young-Ho Lee ,  Jae-Sang Baik ,  Yong-Jin Kim

IPC: H05K1/00

CPC classification number: H05K1/147 ,  H05K1/117 ,  H05K1/189 ,  H05K3/323 ,  H05K3/361 ,  H05K3/4691 ,  H05K2201/042 ,  H05K2201/056 ,  H05K2201/09445 ,  H05K2201/0949 ,  H05K2201/10159 ,  H05K2203/1572

Abstract: A stacked semiconductor module, a method of fabricating the same, and an electronic system using the module are provided. A first semiconductor module having a plurality of semiconductor devices mounted on a rigid printed circuit board (PCB) and a second semiconductor module having a plurality of other semiconductor devices mounted on a flexible PCB are provided. On the rigid PCB a number L of first tabs may be disposed on a first surface, and a number K of second tabs may be disposed on a second surface of the rigid PCB. The flexible PCB may have a number M of third tabs on a third surface, and a number N of fourth tabs on a fourth surface of the flexible PCB. The second tabs may be combined with the third tabs using a conductive adhesive. The third tabs may be electrically connected to corresponding ones of the second tabs.

Abstract translation: 提供堆叠半导体模块，其制造方法和使用该模块的电子系统。 提供了具有安装在刚性印刷电路板（PCB）上的多个半导体器件和具有安装在柔性PCB上的多个其它半导体器件的第二半导体模块的第一半导体模块。 在刚性PCB上，可以在第一表面上设置数L个第一突出部，并且可以在刚性PCB的第二表面上设置数个K个第二突片。 柔性PCB可以在第三表面上具有数量M的第三突出部，并且在柔性PCB的第四表面上可以具有数目N的第四突出部。 第二突片可以使用导电粘合剂与第三突片组合。 第三突片可以电连接到相应的第二突片。

公开(公告)号：US20080080815A1

公开(公告)日：2008-04-03

申请号：US11571108

申请日：2005-06-20

Applicant: Jae-Soo Lee ,  Hyung-Gon Jeong ,  Yong-Hyun Kim ,  Dong-Keun Kim ,  Yong-Moo Lim ,  Jeong-Bin Lee ,  Yong-Woo Yi

Inventor： Jae-Soo Lee ,  Hyung-Gon Jeong ,  Yong-Hyun Kim ,  Dong-Keun Kim ,  Yong-Moo Lim ,  Jeong-Bin Lee ,  Yong-Woo Yi

IPC: G02B6/36

CPC classification number: G02B6/3858 ,  G02B6/3855

Abstract: Disclosed herein is an optical connection. In the present invention, an element wire is removably fastened to the optical connector by tightening a main wire connection member using a tightening member from a state in which a plug, a main wire aligning member, a spring, a fastening member, the main wire connection member and the tightening member are previously assembled together. Consequently, only a related optical line need be repaired or replaced with another one, so that the optical line connection work is markedly simplified and can be performed conveniently. Furthermore, there is an advantage of efficient reuse of components.

Abstract translation: 本文公开了一种光学连接。 在本发明中，通过使用紧固构件从插头，主线对准构件，弹簧，紧固构件，主线等的状态拧紧主线连接构件，将元件线可拆卸地紧固到光连接器 连接构件和紧固构件预先组装在一起。 因此，仅需要修理或替换相关的光线路，从而显着地简化了光线路连接工作并且可以方便地执行。 此外，组件的有效再利用具有优点。

公开(公告)号：US20070161224A1

公开(公告)日：2007-07-12

申请号：US11723086

申请日：2007-03-16

Applicant: Chang-Yong Park ,  Byung-Man Kim ,  Dong-Chun Lee ,  Yong-Hyun Kim ,  Kwang-Seop Kim ,  Dong-Woo Shin ,  Kwang-Ho Chun

Inventor： Chang-Yong Park ,  Byung-Man Kim ,  Dong-Chun Lee ,  Yong-Hyun Kim ,  Kwang-Seop Kim ,  Dong-Woo Shin ,  Kwang-Ho Chun

IPC: H01L21/44

CPC classification number: H05K3/303 ,  H01L2224/13 ,  H01L2224/16225 ,  H05K3/3457 ,  H05K2201/09781 ,  H05K2201/10734 ,  H05K2201/2036 ,  Y02P70/613

Abstract: In one embodiment, a semiconductor module includes at least one semiconductor chip package, a board having functional pads and dummy pads, and at least one solder joint electrically connecting the semiconductor chip package and one of the functional pads of the board. Furthermore, at least one supporting solder bump is formed on one of the dummy pads and disposed under a portion of the semiconductor chip package. For example, the supporting solder bump may be disposed under a peripheral area of the semiconductor chip package.

公开(公告)号：US20060231949A1

公开(公告)日：2006-10-19

申请号：US11246303

申请日：2005-10-11

Applicant: Chang-Yong Park ,  Byung-Man Kim ,  Dong-Chun Lee ,  Yong-Hyun Kim ,  Kwang-Seop Kim ,  Dong-Woo Shin ,  Kwang-Ho Chun

Inventor： Chang-Yong Park ,  Byung-Man Kim ,  Dong-Chun Lee ,  Yong-Hyun Kim ,  Kwang-Seop Kim ,  Dong-Woo Shin ,  Kwang-Ho Chun

IPC: H01L23/48 ,  H01L21/00

CPC classification number: H01L23/49811 ,  H01L23/50 ,  H01L2224/0554 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/1403 ,  H01L2224/141 ,  H01L2224/16 ,  H01L2224/81192 ,  H01L2924/00014 ,  H01L2924/01079 ,  H05K3/303 ,  H05K3/3457 ,  H05K2201/09781 ,  H05K2201/10734 ,  H05K2201/2036 ,  Y02P70/613 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

Abstract: In one embodiment, a semiconductor module includes at least one semiconductor chip package, a board having functional pads and dummy pads, and at least one solder joint electrically connecting the semiconductor chip package and one of the functional pads of the board. Furthermore, at least one supporting solder bump is formed on one of the dummy pads and disposed under a portion of the semiconductor chip package. For example, the supporting solder bump may be disposed under a peripheral area of the semiconductor chip package.

Abstract translation: 在一个实施例中，半导体模块包括至少一个半导体芯片封装，具有功能焊盘和虚拟焊盘的板，以及将半导体芯片封装和板的功能焊盘之一电连接的至少一个焊点。 此外，在一个虚拟焊盘上形成至少一个支撑焊料凸块并且设置在半导体芯片封装的一部分之下。 例如，支撑焊料凸块可以设置在半导体芯片封装的外围区域的下方。

公开(公告)号：US20050272943A1

公开(公告)日：2005-12-08

申请号：US10528256

申请日：2003-09-18

Applicant: Yong-Hyun Kim ,  Yiu-Suk Lee

Inventor： Yong-Hyun Kim ,  Yiu-Suk Lee

IPC: C07D307/77 ,  A61K20060101 ,  A61K31/558 ,  C07C33/04 ,  C07D307/92 ,  C07D307/93 ,  C07F7/18 ,  C07F7/22

CPC classification number: C07D307/93 ,  C07F7/1892 ,  C07F7/2208 ,  Y02P20/55

Abstract: The present invention provides a process for preparing benzoprostacycline derivatives of formula (1), i.e. 5,6,7-trinor-4,8-inter-m-phenylene PGI2 derivatives, and vinyl tin compounds of formula (III) as starting materials for the same.

Abstract translation: 本发明提供了制备式（1）的苯并前列环素衍生物的方法，即5,6,7-三硝基-4,​​8-​​间 - 间 - 亚苯基PGI 2衍生物和式（III）的乙烯基锡化合物作为起始原料 一样。

公开(公告)号：US06852880B2

公开(公告)日：2005-02-08

申请号：US10476115

申请日：2002-05-07

Applicant: Won-Hun Ham ,  Chang-Young Oh ,  Kee-Young Lee ,  Yong-Hyun Kim ,  Yiu-Suk Lee

Inventor： Won-Hun Ham ,  Chang-Young Oh ,  Kee-Young Lee ,  Yong-Hyun Kim ,  Yiu-Suk Lee

IPC: C07C303/00 ,  C07C405/00 ,  C07F1/08 ,  C07F7/18 ,  C07C59/00

CPC classification number: C07C405/0016 ,  Y02P20/55

Abstract: The present invention relates to a process for effectively preparing prostaglandin derivatives and to a stereospecific alkyl halide containing 15S-alcohol group as a starting material.

Abstract translation: 本发明涉及一种有效制备前列腺素衍生物和含有15S-醇基作为起始原料的立体特异性烷基卤化物的方法。

公开(公告)号：US07990734B2

公开(公告)日：2011-08-02

申请号：US11934616

申请日：2007-11-02

Applicant: Hyun-Seok Choi ,  Hyung-Mo Hwang ,  Yong-Hyun Kim ,  Hyo-Jae Bang ,  Su-Yong An

Inventor： Hyun-Seok Choi ,  Hyung-Mo Hwang ,  Yong-Hyun Kim ,  Hyo-Jae Bang ,  Su-Yong An

IPC: H05K7/10 ,  H05K7/12

CPC classification number: H05K3/3442 ,  H05K1/111 ,  H05K1/181 ,  H05K3/06 ,  H05K3/244 ,  H05K2201/09736 ,  H05K2201/10477 ,  H05K2201/10636 ,  H05K2203/0369 ,  Y02P70/611 ,  Y02P70/613 ,  Y10T29/49133

Abstract: A semiconductor memory module having a reverse mounted chip resistor, and a method of fabricating the same are provided. By reverse mounting the chip resistor on the semiconductor memory module, the resistive material is protected, thereby preventing open circuits caused by damage to the resistive material. Also, a chip-resistor connection pad of a module substrate is formed to extend higher from the module substrate than other connection pads connected to other elements. Thus, the resistive material of the chip resistor does not contact the module substrate, thereby preventing poor alignment and defective connections.

Abstract translation: 提供了具有反向安装的芯片电阻器的半导体存储器模块及其制造方法。 通过将芯片电阻器反向安装在半导体存储器模块上，电阻材料被保护，从而防止由电阻材料损坏引起的开路。 此外，模块基板的芯片电阻器连接焊盘形成为从与其它元件连接的其它连接焊盘相比，从模块基板延伸得更高。 因此，片式电阻器的电阻材料不与模块基板接触，从而防止对准不良和连接不良。

公开(公告)号：US20100294350A1

公开(公告)日：2010-11-25

申请号：US12614459

申请日：2009-11-09

Applicant: Min-Jae KO ,  Won-Mok Kim ,  Kyung-Kon Kim ,  Nam-Gyu Park ,  Boem-Jin Yoo ,  Yong-Hyun Kim

Inventor： Min-Jae KO ,  Won-Mok Kim ,  Kyung-Kon Kim ,  Nam-Gyu Park ,  Boem-Jin Yoo ,  Yong-Hyun Kim

IPC: H01L31/00 ,  H01L31/18

CPC classification number: H01G9/2031 ,  H01G9/2022 ,  H01G9/2059 ,  H01L51/0086 ,  Y02E10/542 ,  Y02P70/521

Abstract: Provided are a photo-electrode for dye-sensitized solar cells, and back contact dye-sensitized solar cells comprising the same. The photo-electrode includes a porous membrane having metal oxide nano-particles adsorbed in a photosensitive dye directly contacting a transparent substrate without intermediation of a conductive film, so that the photo-electrode has advanced light transmittance without absorption and scattering of incident light by the conductive film and application possibilities to a thin film retaining a high-level of electrical conductivity, as well as an easy forming method for the conductive film.

Abstract translation: 提供了用于染料敏化太阳能电池的光电极，以及包含该光电极的背面接触染料敏化太阳能电池。 光电极包括具有金属氧化物纳米颗粒的多孔膜，其吸附在直接接触透明基板的感光性染料中，而不用导电膜，从而光电极具有提高的透光率而不会吸收和散射入射光 导电膜和对保持高水平导电性的薄膜的应用可能性，以及导电膜的易形成方法。

公开(公告)号：US20080149372A1

公开(公告)日：2008-06-26

申请号：US12000930

申请日：2007-12-19

Applicant: Hyun-Seok Choi ,  Yong-Hyun Kim ,  Jung-Chan Cho ,  Hyung-Mo Hwang

Inventor： Hyun-Seok Choi ,  Yong-Hyun Kim ,  Jung-Chan Cho ,  Hyung-Mo Hwang

IPC: H05K1/00

CPC classification number: H05K1/147 ,  G11C5/04 ,  H01L2224/16225 ,  H05K1/117 ,  H05K1/189 ,  H05K3/4691 ,  H05K2201/042 ,  H05K2201/10159 ,  H05K2201/2009 ,  H05K2203/1572

Abstract: A semiconductor memory module includes a printed circuit board (PCB) including a rigid PCB part and a flexible PCB part including an overlap portion, a non-overlap portion, and memory components mounted on the PCB. The rigid PCB part includes a first surface and a second surface facing the first surface. The overlap portion of the flexible PCB part overlaps the rigid PCB part, and the non-overlap portion does not overlap the rigid PCB part. The flexible PCB part may include an overlap stacked structure including at least one doubling portion.

Abstract translation: 半导体存储器模块包括印刷电路板（PCB），其包括刚性PCB部件和包括重叠部分的柔性PCB部件，非重叠部分和安装在PCB上的存储器部件。 刚性PCB部件包括第一表面和面向第一表面的第二表面。 柔性PCB部分的重叠部分与刚性PCB部分重叠，并且非重叠部分不与刚性PCB部分重叠。 柔性PCB部件可以包括包括至少一个加倍部分的重叠堆叠结构。