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1.发明授权Semiconductor device, its manufacturing process, position matching mark, pattern forming method and pattern forming device 失效半导体器件，其制造工艺，位置匹配标记，图案形成方法和图案形成装置公开(公告)号：US06709966B1
公开(公告)日：2004-03-23
申请号：US09606152
申请日：2000-06-29
申请人： Yoshimi Hisatsune , Keiichi Sasaki , Hiroshi Ikegami , Mie Matsuo , Nobuo Hayasaka , Katsuya Okumura
发明人： Yoshimi Hisatsune , Keiichi Sasaki , Hiroshi Ikegami , Mie Matsuo , Nobuo Hayasaka , Katsuya Okumura
IPC分类号： H01L2144
CPC分类号： H01L24/81 , H01L21/6835 , H01L21/76877 , H01L24/11 , H01L24/13 , H01L24/742 , H01L2224/11003 , H01L2224/1132 , H01L2224/1183 , H01L2224/13099 , H01L2224/13111 , H01L2224/16 , H01L2224/81121 , H01L2224/81136 , H01L2224/81801 , H01L2924/00014 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01009 , H01L2924/01013 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01039 , H01L2924/01047 , H01L2924/0105 , H01L2924/01074 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/14 , H01L2924/15787 , H05K3/207 , H05K3/4007 , H05K2201/0367 , H05K2201/083 , H05K2203/0113 , H05K2203/104 , H01L2924/00012 , H01L2924/00 , H01L2224/0401
摘要： A semiconductor device comprising the bump containing magnetic body, magnetic body, the bump including non-magnetic body for at least partially covering the magnetic body, mixture of magnetic particles and non-magnetic particles and the bump including baked magnetic particles and baked non-magnetic particles.
摘要翻译： 一种半导体器件，包括包括磁体的磁体，磁体，包括用于至少部分地覆盖磁体的非磁性体的凸起，磁性粒子和非磁性粒子的混合物以及包含焙烧磁性粒子的凸块和烘烤的非磁性体 粒子。
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2.发明授权公开(公告)号：US08283755B2
公开(公告)日：2012-10-09
申请号：US13067180
申请日：2011-05-13
申请人： Nobuo Hayasaka , Katsuya Okumura , Keiichi Sasaki , Mie Matsuo
发明人： Nobuo Hayasaka , Katsuya Okumura , Keiichi Sasaki , Mie Matsuo
IPC分类号： H01L29/40
CPC分类号： H01L23/642 , H01L21/76898 , H01L23/367 , H01L23/481 , H01L25/0655 , H01L25/0657 , H01L25/105 , H01L25/50 , H01L2224/0401 , H01L2224/0557 , H01L2224/06181 , H01L2224/13025 , H01L2224/14181 , H01L2224/16145 , H01L2224/16225 , H01L2224/32225 , H01L2224/73204 , H01L2225/06513 , H01L2225/06527 , H01L2225/06541 , H01L2225/06572 , H01L2225/06589 , H01L2225/1023 , H01L2225/1058 , H01L2924/01046 , H01L2924/01057 , H01L2924/01078 , H01L2924/01079 , H01L2924/10253 , H01L2924/13091 , H01L2924/15174 , H01L2924/15192 , H01L2924/15311 , H01L2924/1532 , H01L2924/15331 , H01L2924/00
摘要： A multichip semiconductor device is disclosed in which chips are stacked each of which comprises a semiconductor substrate formed on top with circuit components and an interlayer insulating film formed on the top of the semiconductor substrate. At least one of the chips has a connect plug of a metal formed in a through hole that passes through the semiconductor substrate and the interlayer insulating film. The chip with the connect plug is electrically connected with another chip by that connect plug.
摘要翻译： 公开了一种多芯片半导体器件，其中堆叠芯片，每个芯片包括形成在顶部的半导体衬底和电路部件，以及形成在半导体衬底的顶部上的层间绝缘膜。 至少一个芯片具有穿过半导体衬底和层间绝缘膜的通孔中形成的金属的连接插头。 具有连接插头的芯片通过该连接插头与另一个芯片电连接。
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公开(公告)号：US08174093B2
公开(公告)日：2012-05-08
申请号：US12926104
申请日：2010-10-26
申请人： Nobuo Hayasaka , Katsuya Okumura , Keiichi Sasaki , Mie Matsuo
发明人： Nobuo Hayasaka , Katsuya Okumura , Keiichi Sasaki , Mie Matsuo
IPC分类号： H01L29/40
CPC分类号： H01L23/642 , H01L21/76898 , H01L23/367 , H01L23/481 , H01L25/0655 , H01L25/0657 , H01L25/105 , H01L25/50 , H01L2224/0401 , H01L2224/0557 , H01L2224/06181 , H01L2224/13025 , H01L2224/14181 , H01L2224/16145 , H01L2224/16225 , H01L2224/32225 , H01L2224/73204 , H01L2225/06513 , H01L2225/06527 , H01L2225/06541 , H01L2225/06572 , H01L2225/06589 , H01L2225/1023 , H01L2225/1058 , H01L2924/01046 , H01L2924/01057 , H01L2924/01078 , H01L2924/01079 , H01L2924/10253 , H01L2924/13091 , H01L2924/15174 , H01L2924/15192 , H01L2924/15311 , H01L2924/1532 , H01L2924/15331 , H01L2924/00
摘要： A multichip semiconductor device is disclosed in which chips are stacked each of which comprises a semiconductor substrate formed on top with circuit components and an interlayer insulating film formed on the top of the semiconductor substrate. At least one of the chips has a connect plug of a metal formed in a through hole that passes through the semiconductor substrate and the interlayer insulating film. The chip with the connect plug is electrically connected with another chip by that connect plug.
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公开(公告)号：US20110215443A1
公开(公告)日：2011-09-08
申请号：US13067180
申请日：2011-05-13
申请人： Nobuo Hayasaka , Katsuya Okumura , Keiichi Sasaki , Mie Matsuo
发明人： Nobuo Hayasaka , Katsuya Okumura , Keiichi Sasaki , Mie Matsuo
IPC分类号： H01L29/41
CPC分类号： H01L23/642 , H01L21/76898 , H01L23/367 , H01L23/481 , H01L25/0655 , H01L25/0657 , H01L25/105 , H01L25/50 , H01L2224/0401 , H01L2224/0557 , H01L2224/06181 , H01L2224/13025 , H01L2224/14181 , H01L2224/16145 , H01L2224/16225 , H01L2224/32225 , H01L2224/73204 , H01L2225/06513 , H01L2225/06527 , H01L2225/06541 , H01L2225/06572 , H01L2225/06589 , H01L2225/1023 , H01L2225/1058 , H01L2924/01046 , H01L2924/01057 , H01L2924/01078 , H01L2924/01079 , H01L2924/10253 , H01L2924/13091 , H01L2924/15174 , H01L2924/15192 , H01L2924/15311 , H01L2924/1532 , H01L2924/15331 , H01L2924/00
摘要： A multichip semiconductor device is disclosed in which chips are stacked each of which comprises a semiconductor substrate formed on top with circuit components and an interlayer insulating film formed on the top of the semiconductor substrate. At least one of the chips has a connect plug of a metal formed in a through hole that passes through the semiconductor substrate and the interlayer insulating film. The chip with the connect plug is electrically connected with another chip by that connect plug.
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5.发明申请公开(公告)号：US20110101522A1
公开(公告)日：2011-05-05
申请号：US12926104
申请日：2010-10-26
申请人： Nobuo Hayasaka , Katsuya Okumura , Keiichi Sasaki , Mie Matsuo
发明人： Nobuo Hayasaka , Katsuya Okumura , Keiichi Sasaki , Mie Matsuo
IPC分类号： H01L23/485
CPC分类号： H01L23/642 , H01L21/76898 , H01L23/367 , H01L23/481 , H01L25/0655 , H01L25/0657 , H01L25/105 , H01L25/50 , H01L2224/0401 , H01L2224/0557 , H01L2224/06181 , H01L2224/13025 , H01L2224/14181 , H01L2224/16145 , H01L2224/16225 , H01L2224/32225 , H01L2224/73204 , H01L2225/06513 , H01L2225/06527 , H01L2225/06541 , H01L2225/06572 , H01L2225/06589 , H01L2225/1023 , H01L2225/1058 , H01L2924/01046 , H01L2924/01057 , H01L2924/01078 , H01L2924/01079 , H01L2924/10253 , H01L2924/13091 , H01L2924/15174 , H01L2924/15192 , H01L2924/15311 , H01L2924/1532 , H01L2924/15331 , H01L2924/00
摘要： A multichip semiconductor device is disclosed in which chips are stacked each of which comprises a semiconductor substrate formed on top with circuit components and an interlayer insulating film formed on the top of the semiconductor substrate. At least one of the chips has a connect plug of a metal formed in a through hole that passes through the semiconductor substrate and the interlayer insulating film. The chip with the connect plug is electrically connected with another chip by that connect plug.
摘要翻译： 公开了一种多芯片半导体器件，其中堆叠芯片，每个芯片包括形成在顶部的半导体衬底和电路部件，以及形成在半导体衬底的顶部上的层间绝缘膜。 至少一个芯片具有穿过半导体衬底和层间绝缘膜的通孔中形成的金属的连接插头。 具有连接插头的芯片通过该连接插头与另一个芯片电连接。
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6.发明授权公开(公告)号：US07335517B2
公开(公告)日：2008-02-26
申请号：US10902391
申请日：2004-07-30
申请人： Nobuo Hayasaka , Katsuya Okumura , Keiichi Sasaki , Mie Matsuo
发明人： Nobuo Hayasaka , Katsuya Okumura , Keiichi Sasaki , Mie Matsuo
IPC分类号： H01L21/00 , H01L21/44 , H01L21/4763 , G01R31/26
CPC分类号： H01L23/642 , H01L21/76898 , H01L23/367 , H01L23/481 , H01L25/0655 , H01L25/0657 , H01L25/105 , H01L25/50 , H01L2224/0401 , H01L2224/0557 , H01L2224/06181 , H01L2224/13025 , H01L2224/14181 , H01L2224/16145 , H01L2224/16225 , H01L2224/32225 , H01L2224/73204 , H01L2225/06513 , H01L2225/06527 , H01L2225/06541 , H01L2225/06572 , H01L2225/06589 , H01L2225/1023 , H01L2225/1058 , H01L2924/01046 , H01L2924/01057 , H01L2924/01078 , H01L2924/01079 , H01L2924/10253 , H01L2924/13091 , H01L2924/15174 , H01L2924/15192 , H01L2924/15311 , H01L2924/1532 , H01L2924/15331 , H01L2924/00
摘要： A multichip semiconductor device is disclosed in which chips are stacked each of which comprises a semiconductor substrate formed on top with circuit components and an interlayer insulating film formed on the top of the semiconductor substrate. At least one of the chips has a connect plug of a metal formed in a through hole that passes through the semiconductor substrate and the interlayer insulating film. The chip with the connect plug is electrically connected with another chip by that connect plug.
摘要翻译： 公开了一种多芯片半导体器件，其中堆叠芯片，每个芯片包括形成在顶部的半导体衬底和电路部件，以及形成在半导体衬底顶部的层间绝缘膜。 至少一个芯片具有穿过半导体衬底和层间绝缘膜的通孔中形成的金属的连接插头。 具有连接插头的芯片通过该连接插头与另一个芯片电连接。
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7.发明申请公开(公告)号：US20050014311A1
公开(公告)日：2005-01-20
申请号：US10902391
申请日：2004-07-30
申请人： Nobuo Hayasaka , Katsuya Okumura , Keiichi Sasaki , Mie Matsuo
发明人： Nobuo Hayasaka , Katsuya Okumura , Keiichi Sasaki , Mie Matsuo
IPC分类号： H01L21/768 , H01L23/48 , H01L23/64 , H01L25/065 , H01L25/10 , H01L21/44 , H01L21/4763 , H01L21/48 , H01L29/40
CPC分类号： H01L23/642 , H01L21/76898 , H01L23/367 , H01L23/481 , H01L25/0655 , H01L25/0657 , H01L25/105 , H01L25/50 , H01L2224/0401 , H01L2224/0557 , H01L2224/06181 , H01L2224/13025 , H01L2224/14181 , H01L2224/16145 , H01L2224/16225 , H01L2224/32225 , H01L2224/73204 , H01L2225/06513 , H01L2225/06527 , H01L2225/06541 , H01L2225/06572 , H01L2225/06589 , H01L2225/1023 , H01L2225/1058 , H01L2924/01046 , H01L2924/01057 , H01L2924/01078 , H01L2924/01079 , H01L2924/10253 , H01L2924/13091 , H01L2924/15174 , H01L2924/15192 , H01L2924/15311 , H01L2924/1532 , H01L2924/15331 , H01L2924/00
摘要： A multichip semiconductor device is disclosed in which chips are stacked each of which comprises a semiconductor substrate formed on top with circuit components and an interlayer insulating film formed on the top of the semiconductor substrate. At least one of the chips has a connect plug of a metal formed in a through hole that passes through the semiconductor substrate and the interlayer insulating film. The chip with the connect plug is electrically connected with another chip by that connect plug.
摘要翻译： 公开了一种多芯片半导体器件，其中堆叠芯片，每个芯片包括形成在顶部的半导体衬底和电路部件，以及形成在半导体衬底的顶部上的层间绝缘膜。 至少一个芯片具有穿过半导体衬底和层间绝缘膜的通孔中形成的金属的连接插头。 具有连接插头的芯片通过该连接插头与另一个芯片电连接。
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8.发明授权公开(公告)号：US07829975B2
公开(公告)日：2010-11-09
申请号：US11980641
申请日：2007-10-31
申请人： Nobuo Hayasaka , Katsuya Okumura , Keiichi Sasaki , Mie Matsuo
发明人： Nobuo Hayasaka , Katsuya Okumura , Keiichi Sasaki , Mie Matsuo
IPC分类号： H01L29/40
CPC分类号： H01L23/642 , H01L21/76898 , H01L23/367 , H01L23/481 , H01L25/0655 , H01L25/0657 , H01L25/105 , H01L25/50 , H01L2224/0401 , H01L2224/0557 , H01L2224/06181 , H01L2224/13025 , H01L2224/14181 , H01L2224/16145 , H01L2224/16225 , H01L2224/32225 , H01L2224/73204 , H01L2225/06513 , H01L2225/06527 , H01L2225/06541 , H01L2225/06572 , H01L2225/06589 , H01L2225/1023 , H01L2225/1058 , H01L2924/01046 , H01L2924/01057 , H01L2924/01078 , H01L2924/01079 , H01L2924/10253 , H01L2924/13091 , H01L2924/15174 , H01L2924/15192 , H01L2924/15311 , H01L2924/1532 , H01L2924/15331 , H01L2924/00
摘要： A multichip semiconductor device is disclosed in which chips are stacked each of which comprises a semiconductor substrate formed on top with circuit components and an interlayer insulating film formed on the top of the semiconductor substrate. At least one of the chips has a connect plug of a metal formed in a through hole that passes through the semiconductor substrate and the interlayer insulating film. The chip with the connect plug is electrically connected with another chip by that connect plug.
摘要翻译： 公开了一种多芯片半导体器件，其中堆叠芯片，每个芯片包括形成在顶部的半导体衬底和电路部件，以及形成在半导体衬底的顶部上的层间绝缘膜。 至少一个芯片具有穿过半导体衬底和层间绝缘膜的通孔中形成的金属的连接插头。 具有连接插头的芯片通过该连接插头与另一个芯片电连接。
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公开(公告)号：US20080237888A1
公开(公告)日：2008-10-02
申请号：US11980641
申请日：2007-10-31
申请人： Nobuo Hayasaka , Katsuya Okumura , Keiichi Sasaki , Mie Matsuo
发明人： Nobuo Hayasaka , Katsuya Okumura , Keiichi Sasaki , Mie Matsuo
CPC分类号： H01L23/642 , H01L21/76898 , H01L23/367 , H01L23/481 , H01L25/0655 , H01L25/0657 , H01L25/105 , H01L25/50 , H01L2224/0401 , H01L2224/0557 , H01L2224/06181 , H01L2224/13025 , H01L2224/14181 , H01L2224/16145 , H01L2224/16225 , H01L2224/32225 , H01L2224/73204 , H01L2225/06513 , H01L2225/06527 , H01L2225/06541 , H01L2225/06572 , H01L2225/06589 , H01L2225/1023 , H01L2225/1058 , H01L2924/01046 , H01L2924/01057 , H01L2924/01078 , H01L2924/01079 , H01L2924/10253 , H01L2924/13091 , H01L2924/15174 , H01L2924/15192 , H01L2924/15311 , H01L2924/1532 , H01L2924/15331 , H01L2924/00
摘要： A multichip semiconductor device is disclosed in which chips are stacked each of which comprises a semiconductor substrate formed on top with circuit components and an interlayer insulating film formed on the top of the semiconductor substrate. At least one of the chips has a connect plug of a metal formed in a through hole that passes through the semiconductor substrate and the interlayer insulating film. The chip with the connect plug is electrically connected with another chip by that connect plug.
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10.发明授权公开(公告)号：US06809421B1
公开(公告)日：2004-10-26
申请号：US09377486
申请日：1999-08-20
申请人： Nobuo Hayasaka , Katsuya Okumura , Keiichi Sasaki , Mie Matsuo
发明人： Nobuo Hayasaka , Katsuya Okumura , Keiichi Sasaki , Mie Matsuo
IPC分类号： H01L2348
CPC分类号： H01L23/642 , H01L21/76898 , H01L23/367 , H01L23/481 , H01L25/0655 , H01L25/0657 , H01L25/105 , H01L25/50 , H01L2224/0401 , H01L2224/0557 , H01L2224/06181 , H01L2224/13025 , H01L2224/14181 , H01L2224/16145 , H01L2224/16225 , H01L2224/32225 , H01L2224/73204 , H01L2225/06513 , H01L2225/06527 , H01L2225/06541 , H01L2225/06572 , H01L2225/06589 , H01L2225/1023 , H01L2225/1058 , H01L2924/01046 , H01L2924/01057 , H01L2924/01078 , H01L2924/01079 , H01L2924/10253 , H01L2924/13091 , H01L2924/15174 , H01L2924/15192 , H01L2924/15311 , H01L2924/1532 , H01L2924/15331 , H01L2924/00
摘要： A multichip semiconductor device is disclosed in which chips are stacked each of which comprises a semiconductor substrate formed on top with circuit components and an interlayer insulating film formed on the top of the semiconductor substrate. At least one of the chips has a connect plug of a metal formed in a through hole that passes through the semiconductor substrate and the interlayer insulating film. The chip with the connect plug is electrically connected with another chip by that connect plug.
摘要翻译： 公开了一种多芯片半导体器件，其中堆叠芯片，每个芯片包括形成在顶部的半导体衬底和电路部件，以及形成在半导体衬底的顶部上的层间绝缘膜。 至少一个芯片具有穿过半导体衬底和层间绝缘膜的通孔中形成的金属的连接插头。 具有连接插头的芯片通过该连接插头与另一个芯片电连接。
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