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    Spacer for a split gate flash memory cell and a memory cell employing the same
    3.
    发明授权
    Spacer for a split gate flash memory cell and a memory cell employing the same 有权
    分离栅闪存单元的间隔器和采用其的存储单元

    公开(公告)号：US07202130B2

    公开(公告)日：2007-04-10

    申请号：US10775290

    申请日：2004-02-10

    申请人： Yuan-Hung Liu ,  Chih-Ta Wu ,  Yeur-Luen Tu ,  Chi-Hsin Lo ,  Chia-Shiung Tsai

    发明人： Yuan-Hung Liu ,  Chih-Ta Wu ,  Yeur-Luen Tu ,  Chi-Hsin Lo ,  Chia-Shiung Tsai

    IPC分类号： H01L21/336 ,  H01L29/788

    CPC分类号： H01L27/11568 ,  H01L27/115 ,  H01L27/11521 ,  H01L29/42324

    摘要： A spacer, a split gate flash memory cell, and related method of forming the same. In one aspect, a composite spacer includes a first spacer insulating layer having a first deposition distribution that varies as a function of a location on a substrate. The composite spacer also includes a second spacer insulating layer having a second deposition distribution that varies in substantial opposition to the first deposition distribution. In another aspect, a composite spacer includes a first spacer insulating layer having a substantially uniform deposition distribution across a surface thereof. The composite spacer also includes a second spacer insulating layer having a varying deposition distribution with a thinner composition in selected regions of the memory cell. In another aspect, a coupling spacer provides for a conductive layer that extends between a floating gate and a substrate insulating layer adjacent a source recessed into the substrate of the memory cell.

    摘要翻译： 间隔物，分裂栅极闪存单元及其相关方法。 在一个方面，一种复合间隔物包括具有第一沉积分布的第一间隔绝缘层，其随着基底上的位置而变化。 复合间隔物还包括具有与第一沉积分布基本相反的第二沉积分布的第二间隔绝缘层。 在另一方面，复合间隔物包括在其表面上具有基本均匀的沉积分布的第一间隔绝缘层。 复合间隔物还包括具有在存储单元的选定区域中具有较薄组成的不同沉积分布的第二间隔绝缘层。 在另一方面，耦合间隔物提供导电层，该导电层在浮置栅极和与凹入到存储器单元的衬底中的源极相邻的衬底绝缘层之间延伸。

    Lens structures suitable for use in image sensors and method for making the same
    4.
    发明授权
    Lens structures suitable for use in image sensors and method for making the same 有权
    适用于图像传感器的镜头结构及其制作方法

    公开(公告)号：US07443005B2

    公开(公告)日：2008-10-28

    申请号：US10982978

    申请日：2004-11-05

    申请人： Ching-Sen Kuo ,  Feng-Jia Shiu ,  Gwo-Yuh Shiau ,  Jieh-Jang Chen ,  Shih-Chi Fu ,  Chien Hsien Tseng ,  Chia-Shiung Tsai ,  Yuan-Hung Liu ,  Yeur-Luen Tu ,  Chih-Ta Wu ,  Chi-Hsin Lo

    发明人： Ching-Sen Kuo ,  Feng-Jia Shiu ,  Gwo-Yuh Shiau ,  Jieh-Jang Chen ,  Shih-Chi Fu ,  Chien Hsien Tseng ,  Chia-Shiung Tsai ,  Yuan-Hung Liu ,  Yeur-Luen Tu ,  Chih-Ta Wu ,  Chi-Hsin Lo

    IPC分类号： H01L29/78

    CPC分类号： H01L27/14621 ,  H01L27/14625 ,  H01L27/14627 ,  H01L27/14632 ,  H01L27/14685 ,  H01L27/14687

    摘要： An image sensor includes a double-microlens structure with an outer microlens aligned over an inner microlens, both microlenses aligned over a corresponding photosensor. The inner or outer microlens may be formed by a silylation process in which a reactive portion of a photoresist material reacts with a silicon-containing agent. The inner or outer microlens may be formed by step etching of a dielectric material, the step etching process including a series of alternating etch steps including an anisotropic etching step and an etching step that causes patterned photoresist to laterally recede. Subsequent isotropic etching processes may be used to smooth the etched step structure and form a smooth lens. A thermally stable and photosensitive polymeric/organic material may also be used to form permanent inner or outer lenses. The photosensitive material is coated then patterned using photolithography, reflowed, then cured to form a permanent lens structure.

    摘要翻译： 图像传感器包括双微透镜结构，其外部微透镜在内部微透镜上对准，两个微透镜在相应的光电传感器上对准。 内部或外部微透镜可以通过甲硅烷基化方法形成，其中光致抗蚀剂材料的反应性部分与含硅试剂反应。 内部或外部微透镜可以通过介电材料的步骤蚀刻形成，该步骤蚀刻工艺包括一系列交替蚀刻步骤，其包括各向异性蚀刻步骤和使图案化光致抗蚀剂横向后退的蚀刻步骤。 可以使用随后的各向同性蚀刻工艺来平滑蚀刻的台阶结构并形成光滑的透镜。 热稳定和感光的聚合物/有机材料也可用于形成永久的内镜片或外镜片。 感光材料被涂覆，然后使用光刻图案化，回流，然后固化以形成永久性透镜结构。

    Spacer for a split gate flash memory cell and a memory cell employing the same
    6.
    发明申请
    Spacer for a split gate flash memory cell and a memory cell employing the same 有权
    分离栅闪存单元的间隔器和采用其的存储单元

    公开(公告)号：US20050176201A1

    公开(公告)日：2005-08-11

    申请号：US10775290

    申请日：2004-02-10

    申请人： Yuan-Hung Liu ,  Chih-Ta Wu ,  Yeur-Luen Tu ,  Chi-Hsin Lo ,  Chia-Shiung Tsai

    发明人： Yuan-Hung Liu ,  Chih-Ta Wu ,  Yeur-Luen Tu ,  Chi-Hsin Lo ,  Chia-Shiung Tsai

    IPC分类号： H01L21/336 ,  H01L21/8246 ,  H01L21/8247 ,  H01L27/115 ,  H01L29/423

    CPC分类号： H01L27/11568 ,  H01L27/115 ,  H01L27/11521 ,  H01L29/42324

    摘要： A spacer, a split gate flash memory cell, and related method of forming the same. In one aspect, a composite spacer includes a first spacer insulating layer having a first deposition distribution that varies as a function of a location on a substrate. The composite spacer also includes a second spacer insulating layer having a second deposition distribution that varies in substantial opposition to the first deposition distribution. In another aspect, a composite spacer includes a first spacer insulating layer having a substantially uniform deposition distribution across a surface thereof. The composite spacer also includes a second spacer insulating layer having a varying deposition distribution with a thinner composition in selected regions of the memory cell. In another aspect, a coupling spacer provides for a conductive layer that extends between a floating gate and a substrate insulating layer adjacent a source recessed into the substrate of the memory cell.

    摘要翻译： 间隔物，分裂栅极闪存单元及其相关方法。 在一个方面，一种复合间隔物包括具有第一沉积分布的第一间隔绝缘层，其随着基底上的位置而变化。 复合间隔物还包括具有与第一沉积分布基本相反地变化的第二沉积分布的第二间隔绝缘层。 在另一方面，复合间隔物包括在其表面上具有基本均匀的沉积分布的第一间隔绝缘层。 复合间隔物还包括具有在存储单元的选定区域中具有较薄组成的不同沉积分布的第二间隔绝缘层。 在另一方面，耦合间隔物提供了在浮置栅极和与凹入到存储器单元的衬底中的源极相邻的衬底绝缘层之间延伸的导电层。

    Methods of fabricating a word-line spacer for wide over-etching window on outside diameter (OD) and strong fence
    7.
    发明授权
    Methods of fabricating a word-line spacer for wide over-etching window on outside diameter (OD) and strong fence 失效
    在外径（OD）和强栅栏上制作用于宽过度蚀刻窗口的字线间隔件的方法

    公开(公告)号：US06869837B1

    公开(公告)日：2005-03-22

    申请号：US10758316

    申请日：2004-01-15

    申请人： Yuan-Hung Liu ,  Yeur-Luen Tu ,  Chin-Ta Wu ,  Tsung-Hsun Huang ,  Hsiu Ouyang ,  Chi-Hsin Lo ,  Chia-Shiung Tsai

    发明人： Yuan-Hung Liu ,  Yeur-Luen Tu ,  Chin-Ta Wu ,  Tsung-Hsun Huang ,  Hsiu Ouyang ,  Chi-Hsin Lo ,  Chia-Shiung Tsai

    IPC分类号： H01L21/8238 ,  H01L21/8247 ,  H01L27/115 ,  H01L29/76

    CPC分类号： H01L27/11521 ,  H01L27/115

    摘要： A method of fabricating word-line spacers comprising the following steps. A substrate having an inchoate split-gate flash memory structure formed thereover is provided. A conductive layer is formed over the substrate and the inchoate split-gate flash memory structure. The conductive layer having: a upper portion and lower vertical portions over the inchoate split-gate flash memory structure; and lower horizontal portions over the substrate. A dual-thickness oxide layer is formed over the conductive layer and has a greater thickness over the upper portion of the conductive layer. The oxide layer is partially etched back to remove at least the oxide layer from over the lower horizontal portions of the conductive layer to expose the underlying portions of the conductive layer. Then etching: away the exposed portions of the conductive layer over the substrate; and through at least a portion of the thinned oxide layer and into the exposed underlying portion of the conductive layer to expose a portion of the inchoate split-gate flash memory structure and to form the word-line spacers adjacent the inchoate split-gate flash memory structure.

    摘要翻译： 一种制造字线间隔物的方法，包括以下步骤。 提供了具有形成在其上的初始分离栅闪存结构的衬底。 导电层形成在衬底和初生分裂栅极闪存结构之上。 所述导电层具有：上部分裂栅极闪存结构上方的上部和下部垂直部分; 并且在基底上下方水平部分。 在导电层之上形成双层氧化物层，并且在导电层的上部上具有更大的厚度。 将氧化层部分地回蚀刻以从导电层的下部水平部分上方至少去除氧化物层，以暴露导电层的下面部分。 然后蚀刻：将导电层的暴露部分远离衬底; 并且通过至少一部分减薄的氧化物层并进入导电层的暴露的下面的部分，以暴露初步分离栅闪存结构的一部分并且形成邻近先驱分离栅闪存的字线间隔物 结构体。

    Magnetic memory cells and manufacturing methods
    9.
    发明授权
    Magnetic memory cells and manufacturing methods 有权
    磁记忆体和制造方法

    公开(公告)号：US07554145B2

    公开(公告)日：2009-06-30

    申请号：US11610760

    申请日：2006-12-14

    申请人： Yuan-Hung Liu ,  Chih-Ta Wu ,  Lan-Lin Chao ,  Yeur-Luen Tu ,  Wen-Chin Lin ,  Chia-Shiung Tsai

    发明人： Yuan-Hung Liu ,  Chih-Ta Wu ,  Lan-Lin Chao ,  Yeur-Luen Tu ,  Wen-Chin Lin ,  Chia-Shiung Tsai

    IPC分类号： H01L29/76

    CPC分类号： H01L43/12 ,  H01L27/228

    摘要： An improved magnetoresistive memory device has a reduced distance between the magnetic memory element and a conductive memory line used for writing to the magnetic memory element. The reduced distance is facilitated by forming the improved magnetoresistive memory device according to a method that includes forming a mask over the magnetoresistive memory element and forming an insulating layer over the mask layer, then removing portions of the insulating layer using a planarization process. A conductive via can then be formed in the mask layer, for example using a damascene process. The conductive memory line can then be formed over the mask layer and conductive via.

    摘要翻译： 改进的磁阻存储器件具有减小的磁存储元件与用于写入磁存储器元件的导电存储器线之间的距离。 通过根据包括在磁阻存储元件上形成掩模并在掩模层上形成绝缘层，然后使用平坦化处理去除绝缘层的部分的方法，通过形成改进的磁阻存储器件来简化缩短的距离。 然后可以在掩模层中形成导电通孔，例如使用镶嵌工艺。 然后可以在掩模层和导电通孔上形成导电存储器线。

    Magnetic memory cells and manufacturing methods
    10.
    发明申请
    Magnetic memory cells and manufacturing methods 有权
    磁记忆体和制造方法

    公开(公告)号：US20070096230A1

    公开(公告)日：2007-05-03

    申请号：US11610760

    申请日：2006-12-14

    申请人： Yuan-Hung Liu ,  Chih-Ta Wu ,  Lan-Lin Chao ,  Yeur-Luen Tu ,  Wen-Chin Lin ,  Chia-Shiung Tsai

    发明人： Yuan-Hung Liu ,  Chih-Ta Wu ,  Lan-Lin Chao ,  Yeur-Luen Tu ,  Wen-Chin Lin ,  Chia-Shiung Tsai

    IPC分类号： H01L43/00 ,  H01L29/82

    CPC分类号： H01L43/12 ,  H01L27/228

    摘要： An improved magnetoresistive memory device has a reduced distance between the magnetic memory element and a conductive memory line used for writing to the magnetic memory element. The reduced distance is facilitated by forming the improved magnetoresistive memory device according to a method that includes forming a mask over the magnetoresistive memory element and forming an insulating layer over the mask layer, then removing portions of the insulating layer using a planarization process. A conductive via can then be formed in the mask layer, for example using a damascene process. The conductive memory line can then be formed over the mask layer and conductive via.

    摘要翻译： 改进的磁阻存储器件具有减小的磁存储元件与用于写入磁存储器元件的导电存储器线之间的距离。 通过根据包括在磁阻存储元件上形成掩模并在掩模层上形成绝缘层，然后使用平坦化处理去除绝缘层的部分的方法，通过形成改进的磁阻存储器件来简化缩短的距离。 然后可以在掩模层中形成导电通孔，例如使用镶嵌工艺。 然后可以在掩模层和导电通孔上形成导电存储器线。