公开(公告)号：US5538905A

公开(公告)日：1996-07-23

申请号：US139915

申请日：1993-10-20

申请人： Yukiya Nishioka ,  Yukinobu Nakata ,  Hidenori Negoto ,  Yoshinori Shimada ,  Takehisa Sakurai ,  Mikio Katayama

发明人： Yukiya Nishioka ,  Yukinobu Nakata ,  Hidenori Negoto ,  Yoshinori Shimada ,  Takehisa Sakurai ,  Mikio Katayama

IPC分类号： C01B13/14 ,  C23C14/04 ,  C23C14/08 ,  C23C14/34 ,  C23C14/58 ,  G02F1/1343 ,  H01B5/14 ,  H01B13/00 ,  H01L31/18 ,  H01L21/265

CPC分类号： H01L31/1884 ,  C23C14/086 ,  C23C14/5833 ,  C23C14/5853 ,  G02F1/13439 ,  Y02E10/50

摘要： A method for forming a transparent conductive film includes the steps of: forming an ITO film on a substrate by sputtering a target including oxygen atoms, indium atoms, and tin atoms under an inert gas atmosphere; patterning the ITO film by selectively removing a prescribed portion of the ITO film using an etching method; and doping the patterned ITO film with oxygen using an ion shower doping method, thereby forming the transparent conductive film from the ITO film.

摘要翻译： 形成透明导电膜的方法包括以下步骤：在惰性气体气氛下通过溅射包含氧原子，铟原子和锡原子的靶在衬底上形成ITO膜; 通过使用蚀刻方法选择性地去除ITO膜的规定部分来图案化ITO膜; 并使用离子喷淋掺杂方法用氧掺杂图案化的ITO膜，由ITO膜形成透明导电膜。

公开(公告)号：US5471070A

公开(公告)日：1995-11-28

申请号：US387361

申请日：1995-02-13

申请人： Yoshinori Shimada ,  Naofumi Kondo ,  Takehisa Sakurai ,  Yoshiharu Kataoka ,  Manabu Takahama ,  Mikio Katayama

发明人： Yoshinori Shimada ,  Naofumi Kondo ,  Takehisa Sakurai ,  Yoshiharu Kataoka ,  Manabu Takahama ,  Mikio Katayama

IPC分类号： G02F1/136 ,  G02F1/1368 ,  H01L27/12 ,  H01L29/78 ,  H01L29/786 ,  H01L27/02

CPC分类号： H01L27/12

摘要： A thin-film transistor circuit for a logic gate circuit includes: an amorphous silicon layer; a driver transistor having a source region, a drain region, and a channel region, the source, drain, and channel regions being formed in the amorphous silicon layer; and a load device formed in the amorphous silicon layer and made of n.sup.- amorphous silicon, the load device being connected to the driver transistor.

摘要翻译： 一种用于逻辑门电路的薄膜晶体管电路包括：非晶硅层; 具有源极区，漏极区和沟道区的驱动晶体管，源极，漏极和沟道区形成在非晶硅层中; 以及形成在非晶硅层中并由正非晶硅制成的负载装置，负载装置连接到驱动晶体管。

公开(公告)号：US6133157A

公开(公告)日：2000-10-17

申请号：US119993

申请日：1998-07-21

申请人： Takehisa Sakurai ,  Hitoshi Ujimasa ,  Katsuhiro Kawai ,  Atsushi Ban ,  Masaru Kajitani ,  Mikio Katayama

发明人： Takehisa Sakurai ,  Hitoshi Ujimasa ,  Katsuhiro Kawai ,  Atsushi Ban ,  Masaru Kajitani ,  Mikio Katayama

IPC分类号： G02F1/13 ,  G02F1/136 ,  G02F1/1368 ,  H01L21/302 ,  H01L21/3065 ,  H01L21/3213 ,  H01L21/336 ,  H01L29/78 ,  H01L29/786

CPC分类号： H01L29/66765 ,  H01L21/3065 ,  H01L21/32135 ,  H01L21/32137

摘要： In a method for selectively etching a second silicon layer of a multilayer structure which includes a first silicon layer and the second silicon layer formed on the first silicon layer and doped with impurities according to the present invention, the second silicon layer is selectively etched by using an etching gas including freon-14 gas and a gas selected from a group composed of hydrogen chloride gas and chloride gas.

摘要翻译： 在根据本发明的用于选择性蚀刻包括第一硅层和形成在第一硅层上并掺杂有杂质的第二硅层的多层结构的第二硅层的方法中，通过使用第二硅层选择性地蚀刻第二硅层 包括氟利昂-14气体的蚀刻气体和选自氯化氢气体和氯化物气体的气体。

公开(公告)号：US5783494A

公开(公告)日：1998-07-21

申请号：US524886

申请日：1995-09-07

申请人： Takehisa Sakurai ,  Hitoshi Ujimasa ,  Katsuhiro Kawai ,  Atsushi Ban ,  Masaru Kajitani ,  Mikio Katayama

发明人： Takehisa Sakurai ,  Hitoshi Ujimasa ,  Katsuhiro Kawai ,  Atsushi Ban ,  Masaru Kajitani ,  Mikio Katayama

IPC分类号： G02F1/13 ,  G02F1/136 ,  G02F1/1368 ,  H01L21/302 ,  H01L21/3065 ,  H01L21/3213 ,  H01L21/336 ,  H01L29/78 ,  H01L29/786

CPC分类号： H01L29/66765 ,  H01L21/3065 ,  H01L21/32135 ,  H01L21/32137

摘要： In a method for selectively etching a second silicon layer of a multilayer structure which includes a first silicon layer and the second silicon layer formed on the first silicon layer and doped with impurities according to the present invention, the second silicon layer is selectively etched by using an etching gas including freon-14 gas and a gas selected from a group composed of hydrogen chloride gas and chlorine gas.

摘要翻译： 在根据本发明的用于选择性蚀刻包括第一硅层和形成在第一硅层上并掺杂有杂质的第二硅层的多层结构的第二硅层的方法中，通过使用第二硅层选择性地蚀刻第二硅层 包括氟利昂-14气体的蚀刻气体和选自氯化氢气体和氯气的气体。

公开(公告)号：US20120234584A1

公开(公告)日：2012-09-20

申请号：US13394688

申请日：2010-09-06

申请人： Yoshinori Ejiri ,  Kiyoshi Hasegawa ,  Takehisa Sakurai ,  Yoshiaki Tsubomatsu

发明人： Yoshinori Ejiri ,  Kiyoshi Hasegawa ,  Takehisa Sakurai ,  Yoshiaki Tsubomatsu

IPC分类号： H05K1/16 ,  H05K1/09

CPC分类号： H05K3/244 ,  H01L21/4857 ,  H01L2924/00013 ,  H01L2924/0002 ,  H05K3/062 ,  H05K3/108 ,  H05K3/4644 ,  H05K3/4652 ,  Y10T29/49155 ,  Y10T29/49156 ,  Y10T29/49165 ,  H01L2224/13099 ,  H01L2224/13599 ,  H01L2224/05599 ,  H01L2224/05099 ,  H01L2224/29099 ,  H01L2224/29599 ,  H01L2924/00

摘要： It is an object of the invention to provide a method for producing a substrate for mounting a semiconductor chip, that can reduce bridging and allows excellent wire bondability and solder connection reliability to be obtained, even when forming fine-pitch wirings. The method for producing a substrate for mounting a semiconductor chip according to the invention comprises a resist-forming step in which a resist is formed on the first copper layer of a stack comprising an inner board with an inner layer circuit on the surface and a first copper layer formed on the inner board separated by an insulating layer at the sections other than those that are to constitute a conductor circuit, a conductor circuit-forming step in which a second copper layer is formed by electrolytic copper plating on the first copper layer to obtain a conductor circuit, a nickel layer-forming step in which a nickel layer is formed by electrolytic nickel plating on at least part of the conductor circuit, a resist removal step in which the resist is removed, an etching step in which the first copper layer is removed by etching, and a gold layer-forming step in which a gold layer is formed by electroless gold plating on at least part of the conductor circuit.

摘要翻译： 本发明的目的是提供一种用于制造用于安装半导体芯片的基板的方法，即使在形成精细间距布线时也能够减少桥接并且能够获得优异的引线接合性和焊接连接可靠性。 根据本发明的用于制造用于安装半导体芯片的基板的方法包括抗蚀剂形成步骤，其中在包括在内表层电路的内板上的第一铜层上形成抗蚀剂，并且第一 铜层，其形成在内板上，除了构成导体电路的部分之外的绝缘层分隔开;导体电路形成步骤，其中通过在第一铜层上的电解铜电镀形成第二铜层， 获得导体电路，镍层形成步骤，其中在导体电路的至少一部分上通过电解镀镍形成镍层，去除抗蚀剂的抗蚀剂去除步骤，其中第一铜 通过蚀刻去除层，以及金层形成步骤，其中在导体电路的至少一部分上通过无电镀金形成金层。

公开(公告)号：US20120154368A1

公开(公告)日：2012-06-21

申请号：US13386991

申请日：2010-03-10

申请人： Takehisa Sakurai ,  Shuichi Kozaki ,  Shoichi Ishihara ,  Masako Nakamura ,  Mitsuhiro Murata ,  Tadashi Ohtake

发明人： Takehisa Sakurai ,  Shuichi Kozaki ,  Shoichi Ishihara ,  Masako Nakamura ,  Mitsuhiro Murata ,  Tadashi Ohtake

IPC分类号： G09G3/36 ,  G06F3/038

CPC分类号： G02F1/134363 ,  G02F1/13624 ,  G02F2001/134345 ,  G09G3/3659 ,  G09G2300/0434

摘要： Picture element electrodes (30) and common electrodes (36) are provided in one of two substrates facing each other. Each picture element (20) has a plurality of sub picture elements (22). In a range in which a signal voltage of an image signal is low, a display is carried out only in a first sub picture element (22a) having narrower electrode spacing, whereas in a range in which the signal voltage of the image signal is high, a display is carried out in both of the first sub picture element (22a) and a second sub picture element (22b) having wider electrode spacing.

摘要翻译： 图像元件电极（30）和公共电极（36）设置在彼此面对的两个基板之一中。 每个像素（20）具有多个子像素（22）。 在图像信号的信号电压低的范围内，仅在具有较窄电极间隔的第一子像素（22a）中进行显示，而在图像信号的信号电压高的范围内 在具有较宽的电极间距的第一子像素（22a）和第二子像素（22b）中进行显示。

公开(公告)号：US08199299B2

公开(公告)日：2012-06-12

申请号：US12522222

申请日：2008-01-31

申请人： Shoichi Ishihara ,  Takehisa Sakurai ,  Shuichi Kozaki

发明人： Shoichi Ishihara ,  Takehisa Sakurai ,  Shuichi Kozaki

IPC分类号： G02F1/1343

CPC分类号： G02F1/134363 ,  G02F1/133634 ,  G02F1/133734 ,  G02F1/1395 ,  G02F2001/133738 ,  G02F2001/133749 ,  G02F2001/13706 ,  G02F2201/124 ,  G02F2413/03 ,  G02F2413/07 ,  G02F2413/11

摘要： A liquid crystal panel (10) includes a liquid crystal layer formed with a p-type liquid crystal. The liquid crystal layer exhibits homogeneous orientation while no voltage is applied. Further, an electric field is applied to the liquid crystal layer in a direction same as dipole moments (μ) of liquid crystal molecules (3a) to which no voltage is applied. With these arrangements, it is possible to provide a liquid crystal panel and a liquid crystal display device, each of which adopts a new display mode that can achieve a wide viewing angle equivalent to an IPS mode, can achieve a high-speed response like an OCB mode or exceeding the OCB mode, and does not require an initial operation for orientation conversion to the bend orientation.

摘要翻译： 液晶面板（10）包括由p型液晶形成的液晶层。 液晶层在没有施加电压的情况下显示均匀的取向。 此外，在与没有施加电压的液晶分子（3a）的偶极矩（μ）相同的方向上对液晶层施加电场。 利用这些配置，可以提供一种液晶面板和液晶显示装置，每个液晶面板和液晶显示装置采用可以实现与IPS模式相当的宽视角的新显示模式，可以实现高速响应，如 OCB模式或超出OCB模式，并且不需要初始化操作来定向转换到弯曲方向。

公开(公告)号：US20120127417A1

公开(公告)日：2012-05-24

申请号：US13383484

申请日：2010-03-08

申请人： Takehisa Sakurai ,  Mitsuhiro Murata ,  Shoichi Ishihara ,  Shuichi Kozaki ,  Masako Nakamura ,  Tadashi Ohtake

发明人： Takehisa Sakurai ,  Mitsuhiro Murata ,  Shoichi Ishihara ,  Shuichi Kozaki ,  Masako Nakamura ,  Tadashi Ohtake

IPC分类号： G02F1/1343

CPC分类号： G02F1/134363 ,  G02F1/133707 ,  G02F1/1368 ,  G02F2001/133742 ,  G02F2001/13706 ,  G02F2201/121 ,  G02F2201/124 ,  G02F2201/40

摘要： The present invention provides a liquid crystal display device providing uniform display without lowering the transmissivity.The present invention is a liquid crystal display device comprising: a first substrate and a second substrate positioned to face the first substrate; and a liquid crystal layer interposed between the first substrate and the second substrate, wherein the liquid crystal layer contains liquid crystal molecules having positive dielectric anisotropy, the liquid crystal molecule is aligned in a direction vertical to a surface of the first substrate when voltage is not applied, the first substrate comprises a pixel electrode and a common electrode, each comprising a core portion and a comb-tooth portion, the comb-tooth portions of the pixel electrode and of the common electrode are arranged in parallel with each other and alternately engaged at a constant interval, the core portion of the common electrode comprises two parallel portions that are in parallel with the longitudinal direction of the comb-tooth portion of the common electrode, the two parallel portions are each positioned outside the outermost comb-tooth portions of the pixel electrode, and (W−S)/(L+S) satisfies “2n+1”, in which “W” represents a distance between the two parallel portions, “L” represents the width of each of the comb-tooth portions of the pixel electrode and the common electrode, “S” represents a distance between a comb-tooth portion of the pixel electrode and an adjacent comb-tooth portion of the common electrode and also represents a distance between one of the outermost comb-tooth portions of the pixel electrode and one of the two parallel portions, and “n” represents the number of the comb-tooth portions of the common electrode.

摘要翻译： 本发明提供一种提供均匀显示而不降低透射率的液晶显示装置。 本发明是一种液晶显示装置，包括：第一基板和与第一基板相对定位的第二基板; 以及插入在第一基板和第二基板之间的液晶层，其中液晶层包含具有正的介电各向异性的液晶分子，当电压不是时，液晶分子在垂直于第一基板的表面的方向上排列 第一基板包括像素电极和公共电极，每个包括芯部分和梳齿部分，像素电极和公共电极的梳齿部分彼此平行地布置并交替地接合 以一定的间隔，公共电极的芯部包括与公共电极的梳齿部的长度方向平行的两个平行部，两个平行部分分别位于外侧的梳齿部 像素电极和（W-S）/（L + S）满足“2n + 1”，其中“W”表示t 并行部分，“L”表示像素电极和公共电极的每个梳齿部分的宽度，“S”表示像素电极的梳齿部分和相邻梳齿部分之间的距离 并且也表示像素电极的最外侧梳齿部与两个平行部中的一个之间的距离，“n”表示公共电极的梳齿部的数量。

公开(公告)号：US20110304797A1

公开(公告)日：2011-12-15

申请号：US13202664

申请日：2010-03-08

申请人： Mitsuhiro Murata ,  Shoichi Ishihara ,  Shuichi Kozaki ,  Takehisa Sakurai ,  Masako Nakamura ,  Tadashi Ohtake

发明人： Mitsuhiro Murata ,  Shoichi Ishihara ,  Shuichi Kozaki ,  Takehisa Sakurai ,  Masako Nakamura ,  Tadashi Ohtake

IPC分类号： G02F1/1335

CPC分类号： G02F1/134363 ,  G02F2001/133607

摘要： The present invention provides a liquid crystal display device that suppress moiré generated when a voltage is applied in a liquid crystal mode that drives a vertical alignment liquid crystal by using at least a pair of comb-shaped electrodes. A liquid crystal display device of the present invention comprises: a liquid crystal display panel including a liquid crystal layer and a pair of substrates sandwiching the liquid crystal layer; and a backlight unit disposed on a back side of the liquid crystal display panel, one of the pair of substrates including a pair of comb-shaped electrodes each having comb teeth, the comb teeth of one of the pair of comb-shaped electrodes and the comb teeth of the other of the pair of comb-shaped electrodes being disposed alternately and spaced apart from each other, the liquid crystal layer containing liquid crystal molecules with positive dielectric anisotropy, the liquid crystal molecules being aligned in a direction perpendicular to a surface of one of the pair of substrates when no voltage is applied, the backlight unit having an optical sheet with multiple folds parallel to one another on a surface, the pitch width of the pair of comb-shaped electrodes being different from an integral multiple of the pitch width of the folds of the optical sheet.

摘要翻译： 本发明提供一种液晶显示装置，其能够抑制在以至少一对梳状电极驱动垂直取向液晶的液晶模式中施加电压时产生的莫尔条纹。 本发明的液晶显示装置包括：液晶显示面板，包括液晶层和夹着液晶层的一对基板; 以及配置在液晶显示面板的背面侧的背光单元，一对基板中的一个基板包括一对梳齿形状的电极，所述梳齿形状的电极各自具有梳齿，所述一对梳形电极中的一个的梳齿和 所述一对梳状电极中的另一个的梳齿相互交替设置，所述液晶层含有具有正的介电各向异性的液晶分子，所述液晶分子在垂直于 当没有施加电压时，一对基板中的一个基板，背光单元具有在表面上具有彼此平行的多个折叠的光学片，该对梳状电极的间距宽度与节距的整数倍不同 光学片折叠的宽度。

公开(公告)号：US08997341B2

公开(公告)日：2015-04-07

申请号：US13394688

申请日：2010-09-06

申请人： Yoshinori Ejiri ,  Kiyoshi Hasegawa ,  Takehisa Sakurai ,  Yoshiaki Tsubomatsu

发明人： Yoshinori Ejiri ,  Kiyoshi Hasegawa ,  Takehisa Sakurai ,  Yoshiaki Tsubomatsu

IPC分类号： H05K3/46 ,  H05K3/42 ,  H05K3/24 ,  H01L21/48 ,  H05K3/06 ,  H05K3/10

CPC分类号： H05K3/244 ,  H01L21/4857 ,  H01L2924/00013 ,  H01L2924/0002 ,  H05K3/062 ,  H05K3/108 ,  H05K3/4644 ,  H05K3/4652 ,  Y10T29/49155 ,  Y10T29/49156 ,  Y10T29/49165 ,  H01L2224/13099 ,  H01L2224/13599 ,  H01L2224/05599 ,  H01L2224/05099 ,  H01L2224/29099 ,  H01L2224/29599 ,  H01L2924/00

摘要： It is an object of the invention to provide a method for producing a substrate for mounting a semiconductor chip, that can reduce bridging and allows excellent wire bondability and solder connection reliability to be obtained, even when forming fine-pitch wirings. The method for producing a substrate for mounting a semiconductor chip according to the invention comprises a resist-forming step in which a resist is formed on the first copper layer of a stack comprising an inner board with an inner layer circuit on the surface and a first copper layer formed on the inner board separated by an insulating layer at the sections other than those that are to constitute a conductor circuit, a conductor circuit-forming step in which a second copper layer is formed by electrolytic copper plating on the first copper layer to obtain a conductor circuit, a nickel layer-forming step in which a nickel layer is formed by electrolytic nickel plating on at least part of the conductor circuit, a resist removal step in which the resist is removed, an etching step in which the first copper layer is removed by etching, and a gold layer-forming step in which a gold layer is formed by electroless gold plating on at least part of the conductor circuit.

摘要翻译： 本发明的目的是提供一种用于制造用于安装半导体芯片的基板的方法，即使在形成精细间距布线时也能够减少桥接并且能够获得优异的引线接合性和焊接连接可靠性。 根据本发明的用于制造用于安装半导体芯片的基板的方法包括抗蚀剂形成步骤，其中在包括在内表层电路的内板上的第一铜层上形成抗蚀剂，并且第一 铜层，其形成在内板上，除了构成导体电路的部分之外的绝缘层分隔开;导体电路形成步骤，其中通过在第一铜层上的电解铜电镀形成第二铜层， 获得导体电路，镍层形成步骤，其中在导体电路的至少一部分上通过电解镀镍形成镍层，去除抗蚀剂的抗蚀剂去除步骤，其中第一铜 通过蚀刻去除层，以及金层形成步骤，其中在导体电路的至少一部分上通过无电镀金形成金层。