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公开(公告)号：US20220006446A1
公开(公告)日：2022-01-06
申请号：US17280105
申请日：2019-09-24
申请人： UNIVERSITEIT GENT , IMEC VZW
发明人： Guy TORFS , Michiel VERPLAETSE
摘要： A filter includes cascaded building blocks, for filtering an incoming signal. Each building block has first and second delay elements. A first scaling device is between an input node of the first delay element and an output node of the second delay element, and a second scaling device is between an output node of the first delay element and an input node of the second delay element. The building block has a cross scaling device between the output nodes of the first delay element and of the second delay element, and/or between the input nodes of the first delay element and of the second delay element. The building block is configured such that, in operation, incoming signals at the input node and output node of the second delay element are summed together.
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公开(公告)号：US10313165B2
公开(公告)日：2019-06-04
申请号：US15453774
申请日：2017-03-08
摘要： High-data rate channel interface modules and equalization methods employing a finite impulse response (FIR) analog receive filter. Embodiments include an illustrative channel interface module having multiple amplifier-based delay units arranged in a sequential chain to convert an analog input signal into a set of increasingly-delayed analog signals that are weighted and combined together with the analog input signal to form an equalized signal; and a symbol decision element operating on the equalized signal to obtain a sequence of symbol decisions. An interface that extracts received data from the sequence of symbol decisions. The delay units may employ one or more delay cells each having a common-source amplifier stage followed by a source follower output stage, the two stages providing approximately equal portions of the propagation delay. An enhanced gate-to-drain capacitance in the common-source amplifier may increase propagation delay while reducing bandwidth limitations.
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公开(公告)号：US10056881B2
公开(公告)日：2018-08-21
申请号：US15443443
申请日：2017-02-27
CPC分类号： H03H19/004 , H03H15/00 , H03H15/023
摘要： A charge sharing filter includes a rotating capacitor, and a plurality of elementary filters, each elementary filter comprising: an elementary switch coupled between a first node of the respective elementary filter and a second node of the respective elementary filter; and a history capacitor coupled to the first node of the respective elementary filter, wherein the second nodes of the plurality of elementary filters are interconnected with the rotating capacitor in one interconnecting node.
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公开(公告)号：US09940415B2
公开(公告)日：2018-04-10
申请号：US15019445
申请日：2016-02-09
申请人： ESS Technology, Inc.
发明人： A. Martin Mallinson , Hu Jing Yao , Dustin Forman
IPC分类号： G06F17/50 , H03H15/02 , H03K5/15 , H03K5/1536
CPC分类号： G06F17/5009 , H03H15/02 , H03K5/15 , H03K5/1536
摘要： A method and system for designing and implementing a finite impulse response (FIR) filter to create a plurality of output signals, each output signal having the same frequency but at a different phase shift from the other output(s), is described. Values are determined for the resistors, or other elements having impedance values, in a FIR filter having a plurality of outputs, such that each output has the same frequency response but a different phase than the other output(s). This is accomplished by the inclusion of a phase factor in the time domain calculation of the resistor values that does not change the response in the frequency domain. The phase shift is constant and independent of the frequency of the output signal.
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公开(公告)号：US09698759B2
公开(公告)日：2017-07-04
申请号：US14269647
申请日：2014-05-05
申请人： ANALOG DEVICES, INC.
发明人： Eric Nestler , Jeffrey Venuti , Vladimir Zlatkovic , Kartik Nanda
CPC分类号： H03H15/02 , G01D5/24 , G01R27/2605 , G01R31/028 , G06F17/14 , G06G7/19
摘要： An approach to time domain filtering uses a passive charge sharing approach to implement an infinite impulse response filter. Delayed samples of an input signal are stored as charges on capacitors of a first array of capacitors, and delayed samples of the output signal are stored as charges on capacitors of a second array of capacitors. Outputs are determined by passively coupling capacitors of the first and second arrays to one another, and determining the output according to a total charge on the coupled capacitors. In some examples, a gain is applied to the total charge prior to storing the output on the second array of capacitors. In some examples, a charge scaling circuit is applied to the charges stored on the arrays prior to coupling capacitors to form the output.
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6.发明授权
公开(公告)号：US5973578A
公开(公告)日：1999-10-26
申请号：US50921
申请日：1998-03-31
申请人： Alexander Zharov , Moshe Lerner , Mark Levin
发明人： Alexander Zharov , Moshe Lerner , Mark Levin
CPC分类号： H03H9/6403 , H03H15/023
摘要： A programmable signal translating device, praticularly a transversal filter, includes a wave transport body for transporting a wave along its length, a first channel of electrical conductors having a plurality of code sections spaced along its length for generating phase-coded electrical signals from the wave propagated by the transport body, a second channel of electrical conductors connected in parallel to the first channel and of identical code sections as, but of opposite polarity to, the first channel, and programmable electrical connections between the code sections of the first channel and the code sections of the second channel and the output circuit, for connecting selected code sections of the first and second channels to the output circuit.
摘要翻译： 一种可编程信号转换装置，其特征在于横向滤波器包括用于沿着其长度传送波的波传输体，具有沿着其长度间隔开的多个编码部分的第一导体通道，用于从波形产生相位编码的电信号 由传输体传播，与第一通道并联连接的第二通道的电导体和与第一通道相反极性相同的代码段，以及第一通道的代码段与第一通道的代码段之间的可编程电气连接 第二通道的代码段和输出电路，用于将第一和第二通道的选定代码段连接到输出电路。
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公开(公告)号：US5577066A
公开(公告)日：1996-11-19
申请号：US242103
申请日：1994-05-13
申请人： Leonard Schuchman , Aaron Weinberg
发明人： Leonard Schuchman , Aaron Weinberg
CPC分类号： H04L27/18 , G11C27/04 , H04B1/38 , H04H2201/20
摘要： A data-in-voice modem is disclosed using charge coupled devices. Unique features include: (1) Baseband-to-IF upconversion to enable CCD-based demod/processing; (2) All analog (no analog-to-digital A/D required); option for post-CCD A/D; (3) Additional on-chip functions; (4) Stand-alone, CCD-based high-rate modem over telephone lines; and (5) CCD-based cable-tv/multimedia processing, via baseband-to-IF upconversion, followed by IF-sampled CCD processing.
摘要翻译： 公开了一种使用电荷耦合器件的数据语音调制解调器。 独特的功能包括：（1）基带到IF上变频，实现基于CCD的解调/处理; （2）所有模拟（不需要模拟到数字A / D）; 后CCD A / D选项; （3）额外的片上功能; （4）电话线上独立的基于CCD的高速调制解调器; 和（5）基于CCD的有线电视/多媒体处理，通过基带到IF上变频，然后进行IF采样CCD处理。
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8.发明授权
公开(公告)号：US5563819A
公开(公告)日：1996-10-08
申请号：US360539
申请日：1994-12-21
申请人： David A. Nelson
发明人： David A. Nelson
CPC分类号： H03H15/02
摘要： A high precision fast finite impulse response (FIR) filter which periodically samples an analog input signal and holds a sequentially-replaced number of the resulting discrete-time analog values in fixed storage cells while each value is being multiplied by a number of digital weights. The discrete-time analog values are not passed through delay devices and therefore do not degrade. The weights are stored in a memory or shift register and supplied to the multipliers in a repeating sequence. A predetermined number of the weights are set to zero to increase the setup time of the analog multipliers thereby increasing the precision without slowing the clocking frequency.
摘要翻译： 一种高精度快速有限脉冲响应（FIR）滤波器，其周期性地对模拟输入信号进行采样，并将所得到的离散时间模拟值的顺序替换数量保存在固定存储单元中，同时每个值乘以多个数字权重。 离散时间模拟值不通过延迟器件，因此不会降级。 权重存储在存储器或移位寄存器中，并以重复序列提供给乘法器。 将预定数量的权重设置为零以增加模拟乘法器的建立时间，从而提高精度，而不会减慢时钟频率。
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公开(公告)号：US4876703A
公开(公告)日：1989-10-24
申请号：US159896
申请日：1988-02-24
申请人： Kaoru Urata , Miaki Nakashio , Koichi Ono , Hitoshi Hirai , Masayuki Iwamoto
发明人： Kaoru Urata , Miaki Nakashio , Koichi Ono , Hitoshi Hirai , Masayuki Iwamoto
CPC分类号： G11C19/285 , G11C27/04 , H04N5/14 , H04N9/79
摘要： In an apparatus having a CCD for compressing and/or expanding the time base of an input signal; a first two-phase transfer clock pulse signal made up of first and second pulse train signals having a first period and arranged to be 180.degree. out of phase with each other is used for driving the CCD while writing the input signal into the CCD, a second two-phase transfer clock pulse signal made up of third and fourth pulse train signals having a second period and arranged to be 180.degree. out of phase with each other is used for driving the CCD while reading from the CCD a signal which is produced from the input signal with its time base compressed or expanded, and the pulse width of the first pulse train signal is made virtually equal to the pulse width of the third pulse train signal and such pulse width is selected to be smaller than one-half of the smaller of the first and second periods.
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10.发明授权Method of forming electrodes aligned with respect to a level of implantation in a substrate and a method of forming a charge transfer filter 失效形成相对于衬底中的注入水平排列的电极的方法和形成电荷转移滤光器的方法
公开(公告)号：US4753900A
公开(公告)日：1988-06-28
申请号：US942672
申请日：1986-12-17
申请人： Pierre Blanchard , Gerard Beal
发明人： Pierre Blanchard , Gerard Beal
IPC分类号： H01L21/339 , H01L29/76 , H01L29/762 , H01L29/772 , H03H15/02 , H01L21/28
CPC分类号： H01L29/66954
摘要： The invention provides a method of forming electrodes aligned with respect to an implantation level in a substrate, including the following main phases:formation of a dielectric layer on a substrate;formation of semiconducting or conducting elements which are to serve as mask for implantation;implantation;formation of a layer of conducting or semiconducting material;cutting out electrodes from said layer and from the semiconducting or conducting elements.
摘要翻译： 本发明提供了一种形成相对于衬底中的注入水平排列的电极的方法，包括以下主要阶段：在衬底上形成电介质层; 形成用作植入掩模的半导体或导电元件; 植入; 形成一层导电或半导体材料; 从所述层和半导体或导电元件切割电极。
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