公开(公告)号：WO2008082644A1

公开(公告)日：2008-07-10

申请号：PCT/US2007/026472

申请日：2007-12-28

Applicant: SPANSION LLC ,  ONODERA, Masanori

Inventor： ONODERA, Masanori

IPC: H01L23/13 ,  H01L25/10 ,  H01L25/065

CPC classification number: H01L23/13 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L25/0657 ,  H01L25/105 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/451 ,  H01L2224/48091 ,  H01L2224/48225 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/06517 ,  H01L2225/0652 ,  H01L2225/06562 ,  H01L2225/06572 ,  H01L2225/06586 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2225/1088 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01079 ,  H01L2924/15151 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/18165 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/0401

Abstract: One embodiment in accordance with the invention can include a semiconductor device that includes a first substrate, a projection portion that has a first semiconductor chip mounted on the first substrate, a second substrate that is provided on the first substrate and is electrically coupled to the first substrate, and a second semiconductor chip that is mounted on the second substrate. An opening portion is formed by the second substrate. The projection portion is arranged in the opening portion.

Abstract translation: 根据本发明的一个实施例可以包括半导体器件，其包括第一衬底，具有安装在第一衬底上的第一半导体芯片的突出部分，设置在第一衬底上并与第一衬底电耦合的第二衬底 衬底和安装在第二衬底上的第二半导体芯片。 开口部由第二基板形成。 突起部布置在开口部中。

公开(公告)号：WO1998002919A1

公开(公告)日：1998-01-22

申请号：PCT/JP1997002405

申请日：1997-07-10

Applicant: FUJITSU LIMITED ,  FUKASAWA, Norio ,  KAWAHARA, Toshimi ,  MORIOKA, Muneharu ,  OSAWA, Mitsunada ,  SHINMA, Yasuhiro ,  MATSUKI, Hirohisa ,  ONODERA, Masanori ,  KASAI, Junichi ,  MARUYAMA, Shigeyuki ,  SAKUMA, Masao ,  SUZUKI, Yoshimi ,  TAKENAKA, Masashi

Inventor： FUJITSU LIMITED

IPC: H01L21/56

CPC classification number: H01L21/568 ,  B29C43/18 ,  B29C2043/3444 ,  B29C2043/3628 ,  H01L21/56 ,  H01L21/561 ,  H01L21/563 ,  H01L21/566 ,  H01L21/6835 ,  H01L23/24 ,  H01L23/3107 ,  H01L23/3114 ,  H01L23/3121 ,  H01L23/3128 ,  H01L23/49572 ,  H01L23/4985 ,  H01L24/27 ,  H01L24/29 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L24/97 ,  H01L25/0657 ,  H01L25/105 ,  H01L29/0657 ,  H01L2221/68345 ,  H01L2221/68377 ,  H01L2224/02371 ,  H01L2224/0401 ,  H01L2224/0556 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2224/16237 ,  H01L2224/274 ,  H01L2224/29111 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/50 ,  H01L2224/73104 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2224/83101 ,  H01L2224/83102 ,  H01L2224/83191 ,  H01L2224/85001 ,  H01L2224/92125 ,  H01L2224/97 ,  H01L2225/06517 ,  H01L2225/0652 ,  H01L2225/06527 ,  H01L2225/06541 ,  H01L2225/06551 ,  H01L2225/06572 ,  H01L2225/06579 ,  H01L2225/06582 ,  H01L2225/06586 ,  H01L2225/06589 ,  H01L2225/1005 ,  H01L2225/1064 ,  H01L2225/107 ,  H01L2225/1082 ,  H01L2924/00014 ,  H01L2924/0002 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0133 ,  H01L2924/12042 ,  H01L2924/15153 ,  H01L2924/15165 ,  H01L2924/15173 ,  H01L2924/15174 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/15312 ,  H01L2924/1532 ,  H01L2924/15331 ,  H01L2924/16195 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2924/3011 ,  H01L2924/3025 ,  H01L2924/3511 ,  H01L2224/85 ,  H01L2924/00 ,  H01L2924/01028 ,  H01L2924/3512 ,  H01L2224/81 ,  H01L2924/00012 ,  H01L2224/05552 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A method for manufacturing semiconductor devices includes a resin sealing step of putting a substrate (16) on which bumps (12) and a plurality of semiconductor chips (11) are arranged in the cavity (28) of a mold (20) and supplying a resin (35) to the region where the bumps (12) are provided so as to coat the bumps (12) and form a resin layer (13), a protruded electrode exposing step of exposing at least the front end sections of the bumps (12) coated with the resin layer (13) from the layer (13), and a separating step of separating the semiconductor chips (11) into individual chips (11) by cutting the substrate (16) together with the layer (13).

Abstract translation: 一种制造半导体器件的方法包括：树脂密封步骤，将在所述模具（20）的空腔（28）中布置有凸块（12）和多个半导体芯片（11）的基板（16） 树脂（35）到设置有凸块（12）的区域，以涂覆凸块（12）并形成树脂层（13）;突出电极暴露步骤，至少暴露凸块的前端部分 12），以及通过与衬底（13）一起切割衬底（16）将半导体芯片（11）分离成单个芯片（11）的分离步骤。