公开(公告)号：WO1998026452A1

公开(公告)日：1998-06-18

申请号：PCT/CA1997000946

申请日：1997-12-09

Applicant: MICROBONDS, INC.

Inventor： MICROBONDS, INC. ,  WANG, Daniel

IPC: H01L23/49

CPC classification number: H01L24/49 ,  H01L24/03 ,  H01L24/05 ,  H01L24/06 ,  H01L24/45 ,  H01L24/48 ,  H01L24/85 ,  H01L25/0655 ,  H01L2224/04042 ,  H01L2224/05554 ,  H01L2224/05624 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/45565 ,  H01L2224/45686 ,  H01L2224/4569 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/48463 ,  H01L2224/48507 ,  H01L2224/48624 ,  H01L2224/48724 ,  H01L2224/48799 ,  H01L2224/48824 ,  H01L2224/4917 ,  H01L2224/49171 ,  H01L2224/4943 ,  H01L2224/85207 ,  H01L2924/00011 ,  H01L2924/01005 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01029 ,  H01L2924/0105 ,  H01L2924/01076 ,  H01L2924/01079 ,  H01L2924/01203 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/013 ,  H01L2924/0665 ,  H01L2224/45688 ,  H01L2924/05432

Abstract: A method of increasing the packaging density of input/output interconnections on a semiconductor chip (10) includes creating a plurality of terminal pads on a substrate of the chip (10), providing an array of a plurality of bonding pads (11) on the surface of such chip (10) and connecting the bonding pads (11) and the terminal pads by means of insulated bond wires (13). The bonding pads are not limited to the periphery of the chip. The connections for the bond wires (13) are preferably made using the ball bonding process. Preferably, the bond wires (13) are made of aluminum and are coated with an aluminum oxide insulation (14).

Abstract translation: 一种增加半导体芯片（10）上的输入/输出互连的封装密度的方法包括在芯片（10）的衬底上形成多个端子焊盘，提供多个焊盘（11）的阵列 （10）的表面，并且通过绝缘接合线（13）连接接合焊盘（11）和端子焊盘。 接合焊盘不限于芯片的外围。 接合线（13）的连接优选使用球接合工艺制成。 优选地，接合线（13）由铝制成并且涂覆有氧化铝绝缘体（14）。

公开(公告)号：WO2005057653A1

公开(公告)日：2005-06-23

申请号：PCT/CA2004/002140

申请日：2004-12-15

Applicant: MICROBONDS, INC. ,  WANG, Daniel ,  LYN, Robert, J. ,  PERSIC, John, I.

Inventor： WANG, Daniel ,  LYN, Robert, J. ,  PERSIC, John, I.

IPC: H01L23/48

CPC classification number: H01L24/85 ,  H01L21/485 ,  H01L23/49838 ,  H01L23/50 ,  H01L23/5382 ,  H01L24/05 ,  H01L24/06 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L25/0655 ,  H01L2224/04042 ,  H01L2224/05554 ,  H01L2224/05556 ,  H01L2224/05624 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/45565 ,  H01L2224/4569 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/48227 ,  H01L2224/48235 ,  H01L2224/48463 ,  H01L2224/48624 ,  H01L2224/48644 ,  H01L2224/48647 ,  H01L2224/48724 ,  H01L2224/48744 ,  H01L2224/48747 ,  H01L2224/48824 ,  H01L2224/48844 ,  H01L2224/48847 ,  H01L2224/4917 ,  H01L2224/49171 ,  H01L2224/4943 ,  H01L2224/85045 ,  H01L2224/85201 ,  H01L2224/85203 ,  H01L2224/85205 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01029 ,  H01L2924/01039 ,  H01L2924/01079 ,  H01L2924/01203 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/15312 ,  H01L2924/20752 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2924/00015 ,  H01L2224/78 ,  H01L2924/00 ,  H01L2924/01202 ,  H01L2924/01201 ,  H01L2924/01006

Abstract: An integrated circuit package comprising a substrate having terminal pads arranged in at least one row along a perimeter of a surface of the substrate, vias connecting the terminal pads directly to connectors on an opposite side of the substrate, a semiconductor chip mounted on the substrate, inside the perimeter, the chip having bond pads located on a surface of the chip, and a plurality of insulated bond wires, each of the bond wires extending from a bond pad on the chip to a terminal pad on the substrate, the substrate being sized and shaped to provide a sufficient number of rows of terminal pads and associated vias so that horizontal traces through the substrate are not required.

Abstract translation: 一种集成电路封装，包括：衬底，具有沿着衬底的表面的周边排列成至少一行的端子焊盘，将端子焊盘直接连接到衬底相对侧上的连接器的通孔;安装在衬底上的半导体芯片; 在周边内，芯片具有位于芯片表面上的接合焊盘，以及多个绝缘接合线，每个接合线从芯片上的接合焊盘延伸到衬底上的端子焊盘，衬底的尺寸 并且成形为提供足够数量的端子焊盘和相关通孔的行，使得不需要穿过基板的水平迹线。