公开(公告)号：WO2016084085A1

公开(公告)日：2016-06-02

申请号：PCT/IL2015/051151

申请日：2015-11-26

Applicant: BEN-SHUSHAN, Elchai ,  LINKOVSKI, Zvi Iheskel ,  GELLER, Mark ,  ZUCKER, Shlomo

Inventor： BEN-SHUSHAN, Elchai ,  LINKOVSKI, Zvi Iheskel ,  GELLER, Mark ,  ZUCKER, Shlomo

IPC: H01L23/00

CPC classification number: H02G1/12 ,  H01B13/32 ,  H01L23/29 ,  H01L24/42 ,  H01L24/43 ,  H01L24/45 ,  H01L24/78 ,  H01L24/85 ,  H01L2224/45565 ,  H01L2224/45688 ,  H01L2924/00014 ,  H01L2224/45099 ,  H01L2224/05599

Abstract: A method for exposing a microwire from it glass coating in a glass coated microwire. The method for exposing the microwire is facilitated by way of sufficiently bending the glass coated microwire to break the glass coating while maintaining the embedded microwire intact.

Abstract translation: 一种用于在玻璃涂层微丝中从其玻璃涂层暴露微丝的方法。 用于暴露微丝的方法通过足够弯曲玻璃涂覆的微丝来破坏玻璃涂层，同时保持嵌入的微丝完整而有利。

公开(公告)号：WO2004061959A1

公开(公告)日：2004-07-22

申请号：PCT/US2003/030593

申请日：2003-09-23

Applicant: MOTOROLA, INC.

Inventor： DOWNEY, Susan, H. ,  HARPER, Peter, R.

IPC: H01L23/49

CPC classification number: H01L24/85 ,  H01L23/3128 ,  H01L24/43 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/745 ,  H01L2224/05554 ,  H01L2224/43827 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/4554 ,  H01L2224/45565 ,  H01L2224/45686 ,  H01L2224/45693 ,  H01L2224/48091 ,  H01L2224/4813 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/4911 ,  H01L2224/4912 ,  H01L2224/49171 ,  H01L2224/745 ,  H01L2224/7865 ,  H01L2224/85205 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/0104 ,  H01L2924/01073 ,  H01L2924/01079 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19107 ,  Y10S228/904 ,  H01L2924/00014 ,  H01L2924/05042 ,  H01L2924/05032 ,  H01L2924/0503 ,  H01L2924/05442 ,  H01L2924/05341 ,  H01L2924/0532 ,  H01L2924/0535 ,  H01L2924/0543 ,  H01L2924/0536 ,  H01L2924/05342 ,  H01L2924/04642 ,  H01L2924/059 ,  H01L2924/00012 ,  H01L2924/01004 ,  H01L2924/00011 ,  H01L2224/78 ,  H01L2924/00 ,  H01L2924/00015 ,  H01L2224/45688 ,  H01L2924/0534 ,  H01L2924/053

Abstract: A packaged IC (110) including insulated wire (120) for electrically connecting conductive structures of the packaged IC. In some embodiments, the packaged IC includes an IC die (114) attached to a package substrate (112), where bond pads (118) of the IC die are electrically connected to bond fingers (116) of the substrate with insulated wire. The insulated wire has a conductive core (306) and an insulator coating (304). In some examples, the insulator coating includes an inorganic covalently-bonded substance that is not an oxide of the electrically conductive core such as, e.g., silicon nitride or silicon oxide. In one example, the insulator coating is applied to a conductive core by a chemical vapor deposition (CVD) process such as a plasma enhanced chemical vapor deposition (PECVD).

Abstract translation: 一种封装IC（110），包括用于电连接封装IC的导电结构的绝缘线（120）。 在一些实施例中，封装的IC包括附接到封装衬底（112）的IC管芯（114），其中IC管芯的焊盘（118）用绝缘电线电连接到衬底的接合指状物（116）。 绝缘线具有导电芯（306）和绝缘体涂层（304）。 在一些实例中，绝缘体涂层包括不是导电芯的氧化物的无机共价键合物质，例如氮化硅或氧化硅。 在一个示例中，通过化学气相沉积（CVD）工艺（诸如等离子体增强化学气相沉积（PECVD））将绝缘体涂层施加到导电芯。

公开(公告)号：WO2017092816A1

公开(公告)日：2017-06-08

申请号：PCT/EP2015/078549

申请日：2015-12-03

Applicant: OSRAM OPTO SEMICONDUCTORS GMBH

Inventor： BOON, Mei See ,  KHAW, Wei Chin ,  KAMARONZAMAN, Fazrul Fairuz ,  WONG, Wing Yew

IPC: H01L23/49 ,  H01L33/62 ,  H01L33/50

CPC classification number: H01L24/45 ,  H01L24/48 ,  H01L24/85 ,  H01L33/505 ,  H01L33/62 ,  H01L2224/45124 ,  H01L2224/45139 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/45565 ,  H01L2224/45688 ,  H01L2224/48227 ,  H01L2224/48464 ,  H01L2224/85045 ,  H01L2224/85186 ,  H01L2924/00014 ,  H01L2924/12041 ,  H01L2924/386 ,  H01L2933/0066 ,  H01L2224/85399 ,  H01L2224/05599

Abstract: An electronic chip package comprises a semiconductor chip (110) with a first bond-pad (120) and is located on a carrier (130). A second bond-pad (140) is provided on the carrier (130) and the first bond-pad (120) is electrically connected to the second bond-pad (140) with a bond-wire, having a core (151) comprising a conductive material and a cladding (150) composed of an insulating material. A production method of the electronic chip package with the following steps: - placing of a semiconductor chip (110) comprising a first bond-pad (120) on top of a carrier (130) comprising a second bond-pad (140); - implementation of a wire bonding step between the two bond-pads; wherein the bond wire is first bonded to the second bond-pad (140) of the carrier (130) and then bonded to the first bond-pad (120) of the semiconductor chip (130).

Abstract translation: 电子芯片封装包括具有第一接合焊盘（120）并位于载体（130）上的半导体芯片（110）。 在载体（130）上提供第二键合焊盘（140），并且用键合线将第一键合焊盘（120）电连接到第二键合焊盘（140），该键合线具有芯部 导电材料和由绝缘材料构成的包层（150）。 具有以下步骤的电子芯片封装的制造方法： - 在包括第二键合焊盘（140）的载体（130）的顶部上放置包括第一键合焊盘（120）的半导体芯片（110）; - 在两个键合焊盘之间实施引线键合步骤; 其中键合线首先键合到载体（130）的第二键合焊盘（140），然后键合到半导体芯片（130）的第一键合焊盘（120）。

公开(公告)号：WO1998026452A1

公开(公告)日：1998-06-18

申请号：PCT/CA1997000946

申请日：1997-12-09

Applicant: MICROBONDS, INC.

Inventor： MICROBONDS, INC. ,  WANG, Daniel

IPC: H01L23/49

CPC classification number: H01L24/49 ,  H01L24/03 ,  H01L24/05 ,  H01L24/06 ,  H01L24/45 ,  H01L24/48 ,  H01L24/85 ,  H01L25/0655 ,  H01L2224/04042 ,  H01L2224/05554 ,  H01L2224/05624 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/45565 ,  H01L2224/45686 ,  H01L2224/4569 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/48463 ,  H01L2224/48507 ,  H01L2224/48624 ,  H01L2224/48724 ,  H01L2224/48799 ,  H01L2224/48824 ,  H01L2224/4917 ,  H01L2224/49171 ,  H01L2224/4943 ,  H01L2224/85207 ,  H01L2924/00011 ,  H01L2924/01005 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01029 ,  H01L2924/0105 ,  H01L2924/01076 ,  H01L2924/01079 ,  H01L2924/01203 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/013 ,  H01L2924/0665 ,  H01L2224/45688 ,  H01L2924/05432

Abstract: A method of increasing the packaging density of input/output interconnections on a semiconductor chip (10) includes creating a plurality of terminal pads on a substrate of the chip (10), providing an array of a plurality of bonding pads (11) on the surface of such chip (10) and connecting the bonding pads (11) and the terminal pads by means of insulated bond wires (13). The bonding pads are not limited to the periphery of the chip. The connections for the bond wires (13) are preferably made using the ball bonding process. Preferably, the bond wires (13) are made of aluminum and are coated with an aluminum oxide insulation (14).

Abstract translation: 一种增加半导体芯片（10）上的输入/输出互连的封装密度的方法包括在芯片（10）的衬底上形成多个端子焊盘，提供多个焊盘（11）的阵列 （10）的表面，并且通过绝缘接合线（13）连接接合焊盘（11）和端子焊盘。 接合焊盘不限于芯片的外围。 接合线（13）的连接优选使用球接合工艺制成。 优选地，接合线（13）由铝制成并且涂覆有氧化铝绝缘体（14）。