公开(公告)号：WO2015000597A1

公开(公告)日：2015-01-08

申请号：PCT/EP2014/001826

申请日：2014-07-02

申请人： ROSENBERGER HOCHFREQUENZTECHNIK GMBH & CO. KG

发明人： CAHILL, Sean S. ,  SANJUAN, Eric A.

IPC分类号： H01L23/40 ,  H01L23/66 ,  H01L23/50

CPC分类号： H01L23/4952 ,  H01L23/49861 ,  H01L23/50 ,  H01L23/66 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/85 ,  H01L2223/6611 ,  H01L2224/05554 ,  H01L2224/45015 ,  H01L2224/45565 ,  H01L2224/4569 ,  H01L2224/48011 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/4903 ,  H01L2224/8501 ,  H01L2224/85444 ,  H01L2224/8592 ,  H01L2224/8593 ,  H01L2224/85931 ,  H01L2924/00014 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/30111 ,  H01L2924/20751 ,  H01L2924/20752 ,  H01L2224/45099 ,  H01L2924/00

摘要： A die package having mixed impedance leads where a first lead has a first metal core (130), and a dielectric layer surrounding the first metal core (130), and a second lead has a second metal core, and a second dielectric layer (132) surrounding the second metal core, with the dielectric thicknesses differing from each other. A method of making a die package having leads with different impedances formed by cleaning die substrate connection pads (162), connecting the die package to the die substrate connection pads via a first wirebond having a first diameter metal core (164), depositing at least one layer of dielectric on the wirebond metal core (170), metalizing the at least one layer of dielectric (174), connecting the die package to the die substrate connection pads via a second wirebond having a second diameter metal core, depositing at least one layer of dielectric on the second wirebond second diameter metal core, and metalizing the at least one layer of dielectric on the second diameter metal core, such that the first wirebond has a different impedance than the second wirebond.

摘要翻译： 具有混合阻抗引线的管芯封装，其中第一引线具有第一金属芯（130）和围绕第一金属芯（130）的介电层，并且第二引线具有第二金属芯 以及围绕第二金属芯的第二介电层（132），其中介电层厚度彼此不同。 一种制造具有不同阻抗的引线的管芯封装的方法，所述管芯通过清洁管芯衬底连接焊盘（162）而形成，经由具有第一直径金属芯（164）的第一引线键将管芯封装连接到管芯衬底连接焊盘，至少沉积 在引线键合金属核心（170）上形成一层电介质，将至少一层电介质（174）金属化，通过具有第二直径金属核心的第二引线键合将管芯封装连接至管芯衬底连接焊盘，沉积至少一个 在第二引线键合的第二直径金属芯上形成电介质层，并且使第二直径金属芯上的至少一层电介质金属化，使得第一引线键合具有与第二引线键合不同的阻抗。

公开(公告)号：WO2007107964A1

公开(公告)日：2007-09-27

申请号：PCT/IB2007/050997

申请日：2007-03-23

申请人： NXP B.V. ,  WYLAND, Chris

发明人： WYLAND, Chris

IPC分类号： H01L23/49 ,  H01L21/60

CPC分类号： H01L24/49 ,  H01L23/3128 ,  H01L23/3135 ,  H01L23/49517 ,  H01L23/4952 ,  H01L23/49558 ,  H01L23/49816 ,  H01L23/5389 ,  H01L24/19 ,  H01L24/24 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L24/82 ,  H01L24/91 ,  H01L2223/6611 ,  H01L2224/24226 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/4556 ,  H01L2224/45565 ,  H01L2224/4569 ,  H01L2224/48091 ,  H01L2224/484 ,  H01L2224/48599 ,  H01L2224/48699 ,  H01L2224/4903 ,  H01L2224/49051 ,  H01L2224/49175 ,  H01L2224/73277 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01031 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/10329 ,  H01L2924/1305 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19043 ,  H01L2924/3011 ,  H01L2924/01004 ,  H01L2924/00011 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/85399 ,  H01L2224/05599

摘要： Consistent with an example embodiment, there is an integrated circuit (IC) device in a packaging having electrically insulated connections. The IC device comprises a semiconductor device (100) mounted onto a die attachment area (10); the semiconductor device has a plurality of bonding pads (20a, 25a, 30a, 35a). A lead frame having a plurality of bonding fingers (20b, 25b, 30b, 35b) surrounds the die attachment area. A plurality of mutually isolated connection conductors (25d, 30d, 40, 50) having respective first ends are attached to respective bonding pads on the semiconductor device and the plurality of mutually isolated connection conductors having respective second respective second ends are attached to respective bonding fingers of the lead frame. An insulating material (45) coats at least a portion of the plurality of mutually isolated connection conductors. The mutually isolated connection conductors may include a bond wire (40,50) for the signal connection and a conductive strap (25d,30d) for the voltage reference connection. The insulating material (45) coating the bond wires reduces the likelihood of short circuits during encapsulation.

摘要翻译： 与示例性实施例一致，在具有电绝缘连接的封装中存在集成电路（IC）装置。 IC器件包括安装在管芯附接区域（10）上的半导体器件（100）。 半导体器件具有多个接合焊盘（20a，25a，30a，35a）。 具有多个接合指（20b，25b，30b，35b）的引线框围绕管芯附接区域。 具有各自的第一端的多个相互隔离的连接导体（25d，30d，40,50）附接到半导体器件上的各个焊盘，并且具有各自的第二相应的第二端的多个相互隔离的连接导体被附接到相应的接合指 的引线框架。 绝缘材料（45）涂覆多个相互隔离的连接导体的至少一部分。 相互隔离的连接导体可以包括用于信号连接的接合线（40,50）和用于电压参考连接的导电带（25d，30d）。 涂覆接合线的绝缘材料（45）降低了封装期间短路的可能性。

公开(公告)号：WO1990011617A1

公开(公告)日：1990-10-04

申请号：PCT/JP1990000405

申请日：1990-03-27

申请人： NIPPON STEEL CORPORATION ,  KIMURA, Masao

发明人： NIPPON STEEL CORPORATION

IPC分类号： H01L21/60

CPC分类号： H01L24/43 ,  H01B3/30 ,  H01B3/301 ,  H01B3/305 ,  H01B3/306 ,  H01B3/423 ,  H01L23/4952 ,  H01L24/45 ,  H01L24/48 ,  H01L24/745 ,  H01L2224/43 ,  H01L2224/43822 ,  H01L2224/45015 ,  H01L2224/45123 ,  H01L2224/45124 ,  H01L2224/45138 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/45149 ,  H01L2224/4556 ,  H01L2224/45565 ,  H01L2224/4569 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48463 ,  H01L2224/4847 ,  H01L2224/48599 ,  H01L2224/48699 ,  H01L2224/48799 ,  H01L2224/745 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01012 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01023 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01075 ,  H01L2924/01079 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/15165 ,  H01L2924/16152 ,  H01L2924/20753 ,  Y10T428/31681 ,  H01L2924/00 ,  H01L2924/01025 ,  H01L2924/013 ,  H01L2924/0002 ,  H01L2924/0675 ,  H01L2924/07025 ,  H01L2924/0685 ,  H01L2924/0695 ,  H01L2924/0705 ,  H01L2224/48 ,  H01L2224/05599 ,  H01L2224/85399

摘要： An electrically conductive base wire is coated with an insulating film of a polymeric material such as aromatic polyester, polyimide, polyether ether ketone, polyamide, polysulfone, or liquid crystalline polymer. The obtained insulator-coated bonding wire is characterized in that no crack develops in the insulation film when an impact of 1cm.gf is given thereto using a falling weight. Further, a method of producing this wire and a semiconductor device using the wire are disclosed.

摘要翻译： 导电基线涂覆有聚合材料如芳族聚酯，聚酰亚胺，聚醚醚酮，聚酰胺，聚砜或液晶聚合物的绝缘膜。 获得的绝缘体涂覆的接合线的特征在于，当使用落锤施加1cm.gf的冲击时，在绝缘膜中不产生裂纹。 此外，公开了一种制造该线材的方法和使用该线材的半导体器件。

公开(公告)号：WO2015000595A1

公开(公告)日：2015-01-08

申请号：PCT/EP2014/001824

申请日：2014-07-02

申请人： ROSENBERGER HOCHFREQUENZTECHNIK GMBH & CO. KG

发明人： CAHILL, Sean S. ,  SANJUAN, Eric A.

IPC分类号： H01L23/49 ,  H01L23/50 ,  H01L23/66

CPC分类号： H01L23/49541 ,  H01L21/4821 ,  H01L21/4846 ,  H01L23/49506 ,  H01L23/49827 ,  H01L23/49838 ,  H01L23/50 ,  H01L23/64 ,  H01L23/645 ,  H01L23/66 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/85 ,  H01L2223/6611 ,  H01L2224/45541 ,  H01L2224/4555 ,  H01L2224/4556 ,  H01L2224/45565 ,  H01L2224/4569 ,  H01L2224/48011 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/4903 ,  H01L2224/49052 ,  H01L2224/85444 ,  H01L2224/8592 ,  H01L2224/8593 ,  H01L2224/85931 ,  H01L2224/85935 ,  H01L2224/85939 ,  H01L2224/85947 ,  H01L2924/00014 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/30111 ,  H01L2924/20654 ,  H01L2224/45099 ,  H01L2924/00

摘要： The present invention relates to a die package comprising a die having a plurality of connection pads, a die substrate supporting a plurality of connection elements, a first lead having a first metal core (10) with a first core diameter, and a dielectric layer (20,30) surrounding the first metal core (S1), the dielectric layer (20,30) having a first dielectric thickness that varies along its length and/ or the dielectric layer having an outer metal layer (40, S4) at least partially surrounding the dielectric layer (20,30), for selectively modifying the electrical characteristics of the lead

摘要翻译： 本发明涉及包括具有多个连接焊盘的模具的模具封装，支撑多个连接元件的模具基板，具有第一芯直径的第一金属芯（10）的第一引线和介电层（ 20,30）围绕第一金属芯（S1），具有沿着其长度变化的第一电介质厚度的介电层（20,30）和/或具有至少部分地具有外部金属层（40,44）的电介质层 围绕介电层（20,30），用于选择性地修改引线的电特性

公开(公告)号：WO2015000592A1

公开(公告)日：2015-01-08

申请号：PCT/EP2014/001821

申请日：2014-07-02

申请人： ROSENBERGER HOCHFREQUENZTECHNIK GMBH & CO. KG

发明人： CAHILL, Sean S. ,  SANJUAN, Eric A.

IPC分类号： H01L23/49 ,  H01L23/66 ,  H01L23/31 ,  H01L23/50 ,  H01L23/00

CPC分类号： H01L24/46 ,  H01L23/3142 ,  H01L23/50 ,  H01L23/564 ,  H01L23/66 ,  H01L24/43 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/85 ,  H01L2223/6611 ,  H01L2224/4382 ,  H01L2224/4556 ,  H01L2224/45565 ,  H01L2224/45572 ,  H01L2224/45573 ,  H01L2224/45639 ,  H01L2224/45644 ,  H01L2224/45647 ,  H01L2224/4569 ,  H01L2224/46 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48235 ,  H01L2224/48247 ,  H01L2224/4903 ,  H01L2224/4917 ,  H01L2224/85444 ,  H01L2224/8592 ,  H01L2924/00014 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2224/45099 ,  H01L2924/00 ,  H01L2224/05599

摘要： The present invention relates to a bond wire having a metal core (202), a dielectric layer (200, 204), and a ground connectable metallization (206), wherein the bond wire has one or more vapor barrier coatings. Further, the present invention relates to a die package with at least one bond wire according to the invention.

摘要翻译： 本发明涉及具有金属芯（202），电介质层（200,204）和接地连接金属化层（206）的接合线，其中所述接合线具有一个或多个蒸气阻挡涂层。 此外，本发明涉及具有根据本发明的至少一个接合线的管芯封装。

公开(公告)号：WO2010020753A3

公开(公告)日：2010-06-24

申请号：PCT/GB2009001966

申请日：2009-08-11

申请人： SEMBLANT LTD ,  HUMPHRIES MARK ROBSON ,  FERDINANDI FRANK ,  SMITH RODNEY EDWARD

发明人： HUMPHRIES MARK ROBSON ,  FERDINANDI FRANK ,  SMITH RODNEY EDWARD

IPC分类号： H05K3/28 ,  C12Q1/00 ,  H01H13/70 ,  H01L23/485 ,  H05K3/34

CPC分类号： H05K3/282 ,  H01H13/78 ,  H01H2215/004 ,  H01H2229/012 ,  H01L24/45 ,  H01L24/48 ,  H01L24/85 ,  H01L2224/06 ,  H01L2224/45014 ,  H01L2224/45015 ,  H01L2224/45105 ,  H01L2224/45109 ,  H01L2224/45111 ,  H01L2224/45113 ,  H01L2224/45116 ,  H01L2224/4512 ,  H01L2224/45124 ,  H01L2224/45138 ,  H01L2224/45139 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/45149 ,  H01L2224/45155 ,  H01L2224/45157 ,  H01L2224/4516 ,  H01L2224/45164 ,  H01L2224/45166 ,  H01L2224/45169 ,  H01L2224/4517 ,  H01L2224/45171 ,  H01L2224/45173 ,  H01L2224/45178 ,  H01L2224/4518 ,  H01L2224/45184 ,  H01L2224/45565 ,  H01L2224/45599 ,  H01L2224/45644 ,  H01L2224/4569 ,  H01L2224/48091 ,  H01L2224/48455 ,  H01L2224/48463 ,  H01L2224/48464 ,  H01L2224/48599 ,  H01L2224/48699 ,  H01L2224/8502 ,  H01L2224/85201 ,  H01L2224/85205 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01007 ,  H01L2924/01011 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01016 ,  H01L2924/01018 ,  H01L2924/01019 ,  H01L2924/01021 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01025 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01031 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/0104 ,  H01L2924/01042 ,  H01L2924/01045 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01051 ,  H01L2924/01072 ,  H01L2924/01074 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01083 ,  H01L2924/01087 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19107 ,  H01L2924/2075 ,  H01L2924/20751 ,  H01L2924/20752 ,  H01L2924/20753 ,  H01L2924/20754 ,  H01L2924/20755 ,  H01L2924/20756 ,  H01L2924/20757 ,  H01L2924/3011 ,  H05K3/222 ,  H05K3/284 ,  H05K3/328 ,  H05K2201/015 ,  H05K2201/0179 ,  H05K2201/0195 ,  H05K2203/049 ,  Y10T29/49155 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/20759 ,  H01L2924/2076 ,  H01L2924/20758

摘要： In some embodiments, a printed circuit board (PCB) comprises a substrate comprising an insulating material. The PCB further comprises a plurality of conductive tracks attached to at least one surface of the substrate. The PCB further comprises a multi-layer coating deposited on the at least one surface of the substrate. The multi-layer coating (i) covers at least a portion of the plurality of conductive tracks and (ii) comprises at least one layer formed of a halo-hydrocarbon polymer. The PCB further comprises at least one electrical component connected by a solder joint to at least one conductive track, wherein the solder joint is soldered through the multi-layer coating such that the solder joint abuts the multi-layer coating.

摘要翻译： 在一些实施例中，印刷电路板（PCB）包括包含绝缘材料的基板。 PCB进一步包括附着到衬底的至少一个表面的多个导电迹线。 PCB还包括沉积在基底的至少一个表面上的多层涂层。 多层涂层（i）覆盖多个导电轨道的至少一部分，并且（ii）包括至少一个由卤代烃聚合物形成的层。 所述PCB还包括至少一个电子部件，所述至少一个电子部件通过焊点连接到至少一个导电轨道，其中所述焊点焊接穿过所述多层涂层，使得所述焊点邻接所述多层涂层。

公开(公告)号：WO2006047028A3

公开(公告)日：2007-04-05

申请号：PCT/US2005034261

申请日：2005-09-27

申请人： FREESCALE SEMICONDUCTOR INC ,  FOONG CHEE SENG

发明人： FOONG CHEE SENG

IPC分类号： H01L21/00 ,  H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC分类号： H01L24/97 ,  H01L21/486 ,  H01L21/565 ,  H01L23/3128 ,  H01L23/49816 ,  H01L23/49861 ,  H01L24/45 ,  H01L24/48 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45139 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/45164 ,  H01L2224/45169 ,  H01L2224/45565 ,  H01L2224/48091 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/0102 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01076 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/18165 ,  H01L2924/01004 ,  H01L2224/85 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/20751 ,  H01L2924/20752 ,  H01L2924/20753 ,  H01L2924/20754 ,  H01L2924/20755 ,  H01L2224/4569

摘要： A method of packaging an integrated circuit die (12) includes the steps of loading an array of soft conductive balls (12) into recesses formed in a platen (50) and locating the platen (50) in a first part of a mold cavity. A second part of the mold is pressed against the balls (12) to flatten a surface of the balls. A first mold compound (18) then is injected into the mold cavity such that the mold compound (18) surrounds exposed portions of the balls (12). The balls are removed from the platen and a first side of an integrated circuit die (20) is attached to the balls (12). Die bonding pads (28) on a second side of the die are electrically connected to respective ones of the balls (12) surrounding the die (20), and then the die (20), the electrical connections (30), and a top portion of the conductive balls (12) is encapsulated with a second mold compound (24).

摘要翻译： 封装集成电路管芯（12）的方法包括将软导电球（12）的阵列装载到形成在压板（50）中的凹槽中并将压板（50）定位在模腔的第一部分中的步骤。 模具的第二部分被压在球（12）上以使球的表面变平。 然后将第一模具化合物（18）注入模腔中，使得模具化合物（18）围绕球（12）的暴露部分。 球从压板移除，并且集成电路模具（20）的第一侧附接到球（12）。 在模具的第二侧上的焊盘（28）电连接到围绕模具（20）的相应的一个（12），然后模具（20），电连接（30）和顶部 导电球（12）的一部分用第二模具化合物（24）封装。

公开(公告)号：WO2005057653A1

公开(公告)日：2005-06-23

申请号：PCT/CA2004/002140

申请日：2004-12-15

申请人： MICROBONDS, INC. ,  WANG, Daniel ,  LYN, Robert, J. ,  PERSIC, John, I.

发明人： WANG, Daniel ,  LYN, Robert, J. ,  PERSIC, John, I.

IPC分类号： H01L23/48

CPC分类号： H01L24/85 ,  H01L21/485 ,  H01L23/49838 ,  H01L23/50 ,  H01L23/5382 ,  H01L24/05 ,  H01L24/06 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L25/0655 ,  H01L2224/04042 ,  H01L2224/05554 ,  H01L2224/05556 ,  H01L2224/05624 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/45565 ,  H01L2224/4569 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/48227 ,  H01L2224/48235 ,  H01L2224/48463 ,  H01L2224/48624 ,  H01L2224/48644 ,  H01L2224/48647 ,  H01L2224/48724 ,  H01L2224/48744 ,  H01L2224/48747 ,  H01L2224/48824 ,  H01L2224/48844 ,  H01L2224/48847 ,  H01L2224/4917 ,  H01L2224/49171 ,  H01L2224/4943 ,  H01L2224/85045 ,  H01L2224/85201 ,  H01L2224/85203 ,  H01L2224/85205 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01029 ,  H01L2924/01039 ,  H01L2924/01079 ,  H01L2924/01203 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/15312 ,  H01L2924/20752 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2924/00015 ,  H01L2224/78 ,  H01L2924/00 ,  H01L2924/01202 ,  H01L2924/01201 ,  H01L2924/01006

摘要： An integrated circuit package comprising a substrate having terminal pads arranged in at least one row along a perimeter of a surface of the substrate, vias connecting the terminal pads directly to connectors on an opposite side of the substrate, a semiconductor chip mounted on the substrate, inside the perimeter, the chip having bond pads located on a surface of the chip, and a plurality of insulated bond wires, each of the bond wires extending from a bond pad on the chip to a terminal pad on the substrate, the substrate being sized and shaped to provide a sufficient number of rows of terminal pads and associated vias so that horizontal traces through the substrate are not required.

摘要翻译： 一种集成电路封装，包括：衬底，具有沿着衬底的表面的周边排列成至少一行的端子焊盘，将端子焊盘直接连接到衬底相对侧上的连接器的通孔;安装在衬底上的半导体芯片; 在周边内，芯片具有位于芯片表面上的接合焊盘，以及多个绝缘接合线，每个接合线从芯片上的接合焊盘延伸到衬底上的端子焊盘，衬底的尺寸 并且成形为提供足够数量的端子焊盘和相关通孔的行，使得不需要穿过基板的水平迹线。

公开(公告)号：WO2004075347A2

公开(公告)日：2004-09-02

申请号：PCT/US2004003493

申请日：2004-02-06

申请人： FREESCALE SEMICONDUCTOR INC ,  HARUN FUAIDA ,  TIU KONG BEE

发明人： HARUN FUAIDA ,  TIU KONG BEE

IPC分类号： B23K20/00 ,  H01R

CPC分类号： H01L24/48 ,  B23K20/004 ,  B23K2201/38 ,  H01L24/45 ,  H01L24/85 ,  H01L2224/45015 ,  H01L2224/45016 ,  H01L2224/45124 ,  H01L2224/45139 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/45164 ,  H01L2224/45169 ,  H01L2224/4556 ,  H01L2224/45565 ,  H01L2224/4569 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/48471 ,  H01L2224/48599 ,  H01L2224/48699 ,  H01L2224/78301 ,  H01L2224/85043 ,  H01L2224/85205 ,  H01L2224/85951 ,  H01L2224/85986 ,  H01L2924/00011 ,  H01L2924/00015 ,  H01L2924/01005 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/20752 ,  H01L2924/20754 ,  H01L2224/85181 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2224/78 ,  H01L2224/48227 ,  H01L2924/00 ,  H01L2924/20755 ,  H01L2924/20756 ,  H01L2924/2075 ,  H01L2924/01049 ,  H01L2924/01006

摘要： An electrical connection for connecting a bond pad of a first device and a bond pad of a second device with an insulated or coated wire. The electrical connection includes a first wirebond securing a first portion of the insulated bond wire to the first device bond pad. A second wirebond secures a second portion of the insulated bond wire to the second device bond pad. A bump is formed over the second wirebond, and the bump is offset from the second wirebond. The offset bump enhances the second bond, providing it with increased wire peel strength.

摘要翻译： 一种用于连接第一装置的接合焊盘和第二装置的焊盘与绝缘或涂覆电线的电连接。 电连接包括将绝缘接合线的第一部分固定到第一器件接合焊盘的第一引线键。 第二引线键将绝缘接合线的第二部分固定到第二器件接合焊盘。 凸起形成在第二引线键上，并且凸块与第二引线键偏移。 偏移凸块增强了第二粘结，提供了增加的线剥离强度。

公开(公告)号：WO1995003624A1

公开(公告)日：1995-02-02

申请号：PCT/US1994005637

申请日：1994-05-20

申请人： NATIONAL SEMICONDUCTOR CORPORATION

发明人： NATIONAL SEMICONDUCTOR CORPORATION ,  WEILER, Peter, M. ,  BURKE, Thomas, S.

IPC分类号： H01L23/495

CPC分类号： H01L24/49 ,  H01L21/56 ,  H01L24/48 ,  H01L2224/05554 ,  H01L2224/45565 ,  H01L2224/4569 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/49171 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01039 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/181 ,  Y10T29/49121 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/05599

摘要： A transfer molded high lead count plastic semiconductor package is described. The packaged IC chip (137) is mounted upon a suitable leadframe (140) and the bonding pads (138) wire bonded to the leadframe fingers. To avoid wire shorting, due to wire sweep during transfer molding, the wires (143) are first coated with an insulative material.

摘要翻译： 描述了传输模塑的高引线数量的塑料半导体封装。 封装的IC芯片（137）安装在合适的引线框架（140）上，并且引线键合到引线框架指状物上。 为了避免电线短路，由于在传送成型期间的电线扫描，电线（143）首先被涂覆有绝缘材料。