公开(公告)号：WO2015029806A1

公开(公告)日：2015-03-05

申请号：PCT/JP2014/071507

申请日：2014-08-11

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： KUMAKURA, Kayo ,  AOYAMA, Tomoya ,  CHIDA, Akihiro ,  YOKOYAMA, Kohei ,  OHNO, Masakatsu ,  IDOJIRI, Satoru ,  IKEDA, Hisao ,  ADACHI, Hiroki ,  HIRAKATA, Yoshiharu ,  EGUCHI, Shingo ,  JINBO, Yasuhiro

IPC: H05B33/10 ,  B65G49/06 ,  H01L21/677 ,  H01L51/50 ,  H05B33/14

CPC classification number: B32B43/006 ,  B26D1/04 ,  B26D2001/006 ,  B32B38/10 ,  B32B2457/00 ,  G02B6/00 ,  H01L21/67092 ,  H01L27/1248 ,  H01L27/3258 ,  H01L27/3262 ,  H01L51/56 ,  H01L2221/68327 ,  H01L2227/323 ,  H01L2251/5338 ,  Y10T156/1126 ,  Y10T156/1132 ,  Y10T156/1168 ,  Y10T156/1184 ,  Y10T156/1933 ,  Y10T156/1944 ,  Y10T156/1961 ,  Y10T156/1967

Abstract: A processing apparatus of a stack is provided. The stack includes two substrates attached to each other with a gap provided between their end portions. The processing apparatus includes a fixing mechanism that fixes part of the stack, a plurality of adsorption jigs that fix an outer peripheral edge of one of the substrates of the stack, and a wedge-shaped jig that is inserted into a corner of the stack. The plurality of adsorption jigs include a mechanism that allows the adsorption jigs to move separately in a vertical direction and a horizontal direction. The processing apparatus further includes a sensor sensing a position of the gap between the end portion in the stack. A tip of the wedge-shaped jig moves along a chamfer formed on an end surface of the stack. The wedge-shaped jig is inserted into the gap between the end portions in the stack.

Abstract translation: 提供堆叠的处理装置。 堆叠包括彼此附接的两个基板，其间隙设置在它们的端部之间。 处理装置包括：固定机构，其固定堆叠的一部分;多个吸附夹具，其固定堆叠的一个基板的外周边缘;以及楔形夹具，其插入到堆叠的角部。 多个吸附夹具包括允许吸附夹具在垂直方向和水平方向上分开移动的机构。 处理装置还包括传感器，其感测堆叠中的端部之间的间隙的位置。 楔形夹具的尖端沿着形成在堆叠的端表面上的倒角移动。 楔形夹具插入到堆叠中的端部之间的间隙中。

公开(公告)号：WO2011142443A1

公开(公告)日：2011-11-17

申请号：PCT/JP2011/061007

申请日：2011-05-06

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD. ,  TEZUKA, Sachiaki ,  JINBO, Yasuhiro ,  SASAKI, Toshinari ,  MIYAIRI, Hidekazu ,  KANZAKI, Yosuke ,  MORIGUCHI, Masao ,  Sharp Kabushiki Kaisha

Inventor： TEZUKA, Sachiaki ,  JINBO, Yasuhiro ,  SASAKI, Toshinari ,  MIYAIRI, Hidekazu ,  KANZAKI, Yosuke ,  MORIGUCHI, Masao

IPC: H01L21/205 ,  C23C16/24 ,  H01L21/336 ,  H01L29/786

CPC classification number: H01L21/02513 ,  C23C16/24 ,  C23C16/45523 ,  C23C16/50 ,  H01L21/02422 ,  H01L21/0245 ,  H01L21/02488 ,  H01L21/02502 ,  H01L21/02532 ,  H01L21/02595 ,  H01L21/0262 ,  H01L29/04 ,  H01L29/66765 ,  H01L29/78696

Abstract: A manufacturing method of a microcrystalline silicon film includes the steps of forming a first microcrystalline silicon film over an insulating film by a plasma CVD method under a first condition; and forming a second microcrystalline silicon film over the first microcrystalline silicon film under a second condition. As a source gas supplied to a treatment chamber, a deposition gas containing silicon and a gas containing hydrogen are used. In the first condition, a flow rate of hydrogen is set at a flow rate 50 to 1000 times inclusive that of the deposition gas, and the pressure inside the treatment chamber is set 67 to 1333 Pa inclusive. In the second condition, a flow rate of hydrogen is set at a flow rate 100 to 2000 times inclusive that of the deposition gas, and the pressure inside the treatment chamber is set 1333 to 13332 Pa inclusive.

Abstract translation: 微晶硅膜的制造方法包括以下步骤：在第一条件下通过等离子体CVD法在绝缘膜上形成第一微晶硅膜; 以及在第二条件下在所述第一微晶硅膜上形成第二微晶硅膜。 作为供给到处理室的源气体，使用含有硅和含氢气体的沉积气体。 在第一条件下，将氢的流量设定为包含沉积气体的流量的50〜1000倍，处理室内的压力为67〜1333Pa。 在第二条件下，将氢的流量设定为包含沉积气体的流量的100〜2000倍，处理室内的压力为1333〜13332Pa。

公开(公告)号：WO2017103737A1

公开(公告)日：2017-06-22

申请号：PCT/IB2016/057396

申请日：2016-12-07

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： JINBO, Yasuhiro ,  EGUCHI, Shingo ,  IKEDA, Hisao ,  ISHITANI, Tetsuji ,  KAMADA, Taisuke

IPC: G09F9/30 ,  G02F1/1333 ,  G02F1/1368 ,  G09F9/00 ,  G09F9/46 ,  H01L51/50 ,  H05B33/02 ,  H05B33/04 ,  H05B33/10 ,  H05B33/12 ,  H05B33/14 ,  H05B33/22

CPC classification number: G06F3/044 ,  G06F2203/04102 ,  G06F2203/04103 ,  G09G3/3225 ,  G09G3/3648 ,  G09G2300/0426 ,  G09G2300/046 ,  G09G2360/144

Abstract: To provide a novel display panel that is highly convenient or reliable. To provide a novel input and output device that is highly convenient or reliable. To provide a novel data processing device that is highly convenient or reliable. To provide a method for manufacturing a novel display panel that is highly convenient or reliable. The display panel includes a pixel (702 (i,j)), a third conductive film (511B) electrically connected to the pixel (702 (i,j)), an insulating film (501C) including an opening portion (591B) overlapping with the third conductive film (511B), and an electrode (519B) including a first region (519B1) in contact with the third conductive film (511B) and a second region (519B2) functioning as a contact point.

Abstract translation:

提供一种非常方便或可靠的新型显示面板。 提供一种非常方便或可靠的新型输入和输出设备。 提供一种非常方便或可靠的新型数据处理设备。 提供一种高度方便或可靠的新型显示面板的制造方法。 显示面板包括像素（702（i，j）），电连接到像素（702（i，j））的第三导电膜（511B），包括重叠的开口部分（591B）的绝缘膜（501C） 与第三导电膜（511B）以及包括与第三导电膜（511B）接触的第一区域（519B1）和用作接触点的第二区域（519B2）的电极（519B）。

公开(公告)号：WO2017064593A1

公开(公告)日：2017-04-20

申请号：PCT/IB2016/055972

申请日：2016-10-06

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： NAKAMURA, Daiki ,  YOKOYAMA, Kohei ,  JINBO, Yasuhiro ,  SASAKI, Toshiki ,  NAKADA, Masataka ,  GOTO, Naoto ,  IGUCHI, Takahiro

IPC: G09F9/46 ,  G02F1/1368 ,  G09F9/30 ,  H01L27/32 ,  H01L29/786 ,  H01L51/50 ,  H05B33/02 ,  H05B33/12 ,  H05B33/22 ,  H05B33/24 ,  H05B33/26

CPC classification number: H01L27/3267 ,  G02F1/133345 ,  G02F1/133553 ,  G02F1/134309 ,  G02F1/1368 ,  H01L27/124 ,  H01L27/3232 ,  H01L29/7869

Abstract: A novel display device that is highly convenient with low power consumption is provided. The display device includes a display element including a liquid crystal layer, a display element including a light-emitting layer, and a pixel circuit. Electrodes of the display element including the liquid crystal layer and the display element including the light-emitting layer are electrically connected to the pixel circuit. The electrode of the display element including the liquid crystal layer includes a reflective film including an opening. The pixel circuit includes a transistor including a semiconductor film. The number of insulating films in a region overlapping with the opening is smaller than that of insulating films overlapping with the semiconductor film. In addition, the display element including the light-emitting layer includes two light-emitting elements. The number of optical elements overlapping with one light-emitting element is smaller than that of optical elements overlapping with the other light-emitting element.

Abstract translation: 提供了一种低功耗高度便利的新型显示装置。 显示装置包括具有液晶层的显示元件，包括发光层的显示元件以及像素电路。 包括液晶层的显示元件的电极和包括发光层的显示元件电连接到像素电路。 包括液晶层的显示元件的电极包括具有开口的反射膜。 像素电路包括包含半导体膜的晶体管。 与开口重叠的区域中的绝缘膜的数量小于与半导体膜重叠的绝缘膜的数量。 另外，包括发光层的显示元件包括两个发光元件。 与一个发光元件重叠的光学元件的数量小于与另一个发光元件重叠的光学元件的数量。

公开(公告)号：WO2013008765A1

公开(公告)日：2013-01-17

申请号：PCT/JP2012/067401

申请日：2012-06-29

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD. ,  YAMAZAKI, Shunpei ,  SEO, Satoshi ,  OHNUMA, Hideto ,  KIMURA, Hajime ,  JINBO, Yasuhiro

Inventor： YAMAZAKI, Shunpei ,  SEO, Satoshi ,  OHNUMA, Hideto ,  KIMURA, Hajime ,  JINBO, Yasuhiro

IPC: H05B33/04 ,  G09F9/30 ,  H01L27/32 ,  H01L51/50 ,  H05B33/02 ,  H05B33/10 ,  H05B33/12 ,  H05B33/22

CPC classification number: H01L51/5246 ,  G02F1/133514 ,  G02F1/133603 ,  G02F1/1339 ,  G02F1/1368 ,  H01L27/322 ,  H01L27/3246 ,  H01L51/0096 ,  H01L51/524 ,  H01L51/5253 ,  H01L2251/5315

Abstract: A highly reliable light-emitting module or light-emitting device is provided. A method for manufacturing a highly reliable light-emitting module is provided. The light-emitting module includes, between a first substrate and a second substrate, a first electrode provided over the first substrate, a second electrode provided over the first electrode with a layer containing a light-emitting organic compound interposed therebetween, and a sacrifice layer formed using a liquid material provided over the second electrode.

Abstract translation: 提供了高度可靠的发光模块或发光装置。 提供一种用于制造高度可靠的发光模块的方法。 发光模块在第一基板和第二基板之间包括设置在第一基板上的第一电极，设置在第一电极上的第二电极，其间插入有发光有机化合物的层，牺牲层 使用设置在第二电极上的液体材料形成。

公开(公告)号：WO2009128553A1

公开(公告)日：2009-10-22

申请号：PCT/JP2009/057816

申请日：2009-04-14

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD. ,  MIYAIRI, Hidekazu ,  DAIRIKI, Koji ,  EGI, Yuji ,  JINBO, Yasuhiro ,  ISA, Toshiyuki

Inventor： MIYAIRI, Hidekazu ,  DAIRIKI, Koji ,  EGI, Yuji ,  JINBO, Yasuhiro ,  ISA, Toshiyuki

IPC: H01L21/336 ,  H01L21/205 ,  H01L29/786

CPC classification number: H01L27/1288 ,  H01L27/1214 ,  H01L29/04 ,  H01L29/41733 ,  H01L29/66765 ,  H01L29/78621 ,  H01L29/78669 ,  H01L29/78678 ,  H01L29/78696

Abstract: A thin film transistor includes, over a substrate having an insulating surface, a gate insulating layer covering a gate electrode; a semiconductor layer which includes a plurality of crystalline regions in an amorphous structure and which forms a channel formation region, in contact with the gate insulating layer; a semiconductor layer including an impurity element imparting one conductivity type, which forms source and drain regions; and a buffer layer including an amorphous semiconductor between the semiconductor layer and the semiconductor layer including an impurity element imparting one conductivity type. The crystalline regions have an inverted conical or inverted pyramidal crystal particle which grows approximately radially in a direction in which the semiconductor layer is deposited, from a position away from an interface between the gate insulating layer and the semiconductor layer.

Abstract translation: 薄膜晶体管包括在具有绝缘表面的衬底上，覆盖栅电极的栅绝缘层; 半导体层，其包括与所述栅极绝缘层接触的非晶结构中的多个结晶区域，并形成沟道形成区域; 包含赋予一种导电类型的杂质元素的半导体层，其形成源区和漏区; 以及包括在半导体层和半导体层之间的非晶半导体的缓冲层，其包括赋予一种导电类型的杂质元素。 晶体区域具有从远离栅极绝缘层和半导体层之间的界面的位置沿着沉积半导体层的方向大致径向生长的倒锥形或倒棱锥晶体颗粒。

公开(公告)号：WO2017098375A1

公开(公告)日：2017-06-15

申请号：PCT/IB2016/057234

申请日：2016-12-01

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： IKEDA, Hisao ,  TOYOTAKA, Kouhei ,  SHISHIDO, Hideaki ,  MIYAKE, Hiroyuki ,  YOKOYAMA, Kohei ,  JINBO, Yasuhiro ,  DOZEN, Yoshitaka ,  NAGATA, Takaaki ,  HIRASA, Shinichi

IPC: G09F9/302 ,  G09F9/30 ,  H01L29/786 ,  H01L51/50 ,  H05B33/12

CPC classification number: H01L27/124 ,  G09G3/2003 ,  G09G3/3233 ,  G09G3/3648 ,  G09G5/391 ,  G09G2300/0426 ,  G09G2300/0443 ,  G09G2300/0452 ,  G09G2300/0465 ,  G09G2300/0809 ,  G09G2300/0842 ,  G09G2320/0295 ,  G09G2320/043 ,  G09G2320/0693 ,  H01L27/3216 ,  H01L27/3218 ,  H01L27/3276

Abstract: Provided is a display device with extremely high resolution, a display device with higher display quality, a display device with improved viewing angle characteristics, or a flexible display device. Same-color subpixels are arranged in a zigzag pattern in a predetermined direction. In other words, when attention is paid to a subpixel, another two subpixels exhibiting the same color as the subpixel are preferably located upper right and lower right or upper left and lower left. Each pixel includes three subpixels arranged in an L shape. In addition, two pixels are combined so that pixel units including subpixel are arranged in matrix of 3 x 2.

Abstract translation: 提供了具有极高分辨率的显示装置，具有更高显示质量的显示装置，具有改善的视角特性的显示装置或柔性显示装置。 相同颜色的子像素在预定方向上以锯齿形图案排列。 换句话说，当关注子像素时，显示与子像素相同颜色的另外两个子像素优选位于右上和右下或左上和左下。 每个像素包括三个排列成L形的子像素。 另外，组合两个像素，使得包括子像素的像素单元以3×2的矩阵排列。

公开(公告)号：WO2017072634A1

公开(公告)日：2017-05-04

申请号：PCT/IB2016/056302

申请日：2016-10-20

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： SASAKI, Toshiki ,  SEO, Satoshi ,  OHSAWA, Nobuharu ,  YOKOYAMA, Kohei ,  JINBO, Yasuhiro

IPC: G09F9/30 ,  G02F1/1333 ,  G02F1/1368 ,  H01L21/28 ,  H01L21/336 ,  H01L21/8234 ,  H01L21/8242 ,  H01L27/088 ,  H01L27/105 ,  H01L27/108 ,  H01L27/115 ,  H01L27/32 ,  H01L29/417 ,  H01L29/423 ,  H01L29/49 ,  H01L29/786 ,  H01L29/788 ,  H01L29/792

CPC classification number: G02F1/133553 ,  G02F1/1336 ,  G02F1/134309 ,  G02F2201/122 ,  G02F2202/16 ,  G02F2203/02 ,  H01L27/15 ,  H01L27/3232 ,  H01L27/3267 ,  H01L29/45 ,  H01L29/7869 ,  H01L33/405 ,  H01L51/5218 ,  H01L51/5231

Abstract: A novel display device that is highly convenient with low power consumption is provided. The display device includes a display element including a liquid crystal layer, a display element including a light-emitting layer, a first transistor, and a second transistor. The first transistor is electrically connected to an electrode of the display element including the liquid crystal layer, and the second transistor is electrically connected to an electrode of the display element including the light-emitting layer. The electrode of the display element including the liquid crystal layer and the electrode of the display element including the light-emitting layer each include a reflective film and a conductive film. The reflective film of the display element including the liquid crystal layer has a region containing a metal contained in the reflective film of the display element including the light-emitting layer.

Abstract translation: 提供了一种低功耗高度便利的新型显示装置。 该显示装置包括显示元件，该显示元件包括液晶层，包括发光层的显示元件，第一晶体管和第二晶体管。 第一晶体管电连接到包括液晶层的显示元件的电极，并且第二晶体管电连接到包括发光层的显示元件的电极。 包括液晶层的显示元件的电极和包括发光层的显示元件的电极各自包括反射膜和导电膜。 包括液晶层的显示元件的反射膜具有包含包含发光层的显示元件的反射膜中包含的金属的区域。

公开(公告)号：WO2015033944A1

公开(公告)日：2015-03-12

申请号：PCT/JP2014/073117

申请日：2014-08-27

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： OHNO, Masakatsu ,  HIRAKATA, Yoshiharu ,  EGUCHI, Shingo ,  JINBO, Yasuhiro ,  IKEDA, Hisao ,  YOKOYAMA, Kohei ,  ADACHI, Hiroki ,  IDOJIRI, Satoru

IPC: H01L21/02 ,  G02F1/13 ,  H01L21/683 ,  H01L51/50 ,  H05B33/02 ,  H05B33/10

CPC classification number: B32B37/0046 ,  B32B17/10431 ,  B32B27/08 ,  B32B27/20 ,  B32B27/36 ,  B32B37/0015 ,  B32B37/003 ,  B32B37/1284 ,  B32B38/0008 ,  B32B38/18 ,  B32B38/1841 ,  B32B38/1858 ,  B32B2264/102 ,  B32B2264/105 ,  B32B2309/68 ,  B32B2457/14 ,  B32B2457/20 ,  H01L2224/01 ,  Y10T156/15 ,  Y10T156/1798

Abstract: A yield in the step of bonding two members together is improved. A bonding apparatus includes a stage capable of supporting a first member having a sheet-like shape, a fixing mechanism capable of fixing one end portion of a second member having a sheet-like shape so that the second member overlaps with the first member, and a pressurizing mechanism capable of moving from a side of the one end portion of the second member to a side of the other end portion and spreading a bonding layer under pressure between the first member and the second member. The first member and the second member are bonded to each other.

Abstract translation: 提高了将两个部件结合在一起的步骤中的产量。 接合装置包括能够支撑具有片状形状的第一构件的台，能够固定具有片状形状的第二构件的一个端部以使第二构件与第一构件重叠的固定机构，以及 加压机构能够从所述第二部件的一个端部的一侧移动到所述另一个端部的一侧，并且在所述第一部件和所述第二部件之间在压力下铺展粘合层。 第一构件和第二构件彼此结合。

公开(公告)号：WO2009157574A1

公开(公告)日：2009-12-30

申请号：PCT/JP2009/061795

申请日：2009-06-22

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD. ,  ISA, Toshiyuki ,  JINBO, Yasuhiro ,  TEZUKA, Sachiaki ,  DAIRIKI, Koji ,  MIYAIRI, Hidekazu ,  YAMAZAKI, Shunpei ,  HIROHASHI, Takuya

Inventor： ISA, Toshiyuki ,  JINBO, Yasuhiro ,  TEZUKA, Sachiaki ,  DAIRIKI, Koji ,  MIYAIRI, Hidekazu ,  YAMAZAKI, Shunpei ,  HIROHASHI, Takuya

IPC: H01L21/336 ,  H01L29/786

CPC classification number: H01L27/1288 ,  H01L27/1214 ,  H01L29/04 ,  H01L29/66765 ,  H01L29/78696

Abstract: A thin film transistor includes, as a buffer layer, a semiconductor layer which contains nitrogen and includes crystal regions in an amorphous structure between a gate insulating layer and source and drain regions, at least on the source and drain regions side. As compared to a thin film transistor in which an amorphous semiconductor is included in a channel formation region, on-current of a thin film transistor can be increased. In addition, as compared to a thin film transistor in which a microcrystalline semiconductor is included in a channel formation region, off-current of a thin film transistor can be reduced.

Abstract translation: 至少在源区和漏区侧，薄膜晶体管包括作为缓冲层的半导体层，该半导体层含有氮并且包括在栅极绝缘层和源极和漏极区之间的非晶结构中的晶体区域。 与在沟道形成区域中包含非晶半导体的薄膜晶体管相比，可以提高薄膜晶体管的导通电流。 此外，与在沟道形成区域中包含微晶半导体的薄膜晶体管相比，可以减小薄膜晶体管的截止电流。