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    Printed wiring board fabrication method
    145.
    发明公开
    Printed wiring board fabrication method 失效
    Verfahren zur Herstellung einer gedruckten Leiterplatte。

    公开(公告)号：EP0349161A2

    公开(公告)日：1990-01-03

    申请号：EP89306060.8

    申请日：1989-06-15

    Applicant: AT&T Corp.

    Inventor： Blumenstock, Brent J. ,  Ors, Jose Alberto

    IPC: H05K3/10

    CPC classification number: H05K3/428 ,  H05K3/0023 ,  H05K3/064 ,  H05K3/108 ,  H05K3/28 ,  H05K3/465 ,  H05K2201/0355 ,  H05K2201/0394 ,  H05K2201/09509 ,  H05K2201/09881 ,  H05K2203/0582 ,  H05K2203/0588 ,  H05K2203/072 ,  H05K2203/1394

    Abstract: The specification described a process for making a plating mask 17, for use in printed wiring board fabrication, with greater precision and definition that has previously been possible. An insulative substrate 11 includes on one surface a thin metal film (13). The film is covered with a relatively thick first mask layer (16) which is selectively removed to expose portions of the metal film, which are in turn removed to expose portions of the insulative substrate (11). The exposed portions of the insulative substrate are covered with a relatively thick plating mask layer (17) which abuts against the first mask layer (16). The first mask layer is then removed, leaving the remaining plating mask layer as a patterned plating mask which is then used as a mask for deposited metal (19) which defines a printed circuit.

    Abstract translation: 该说明书描述了用于制造用于印刷线路板制造的电镀掩模17的方法，其具有先前可能的更高的精度和定义。 绝缘基板11在一个表面上包括薄金属薄膜（13）。 膜被相当厚的第一掩模层（16）覆盖，第一掩模层（16）被选择性地去除以暴露部分金属膜，这些部分又被去除以暴露绝缘基板（11）的部分。 绝缘基板的露出部分用与第一掩模层（16）抵接的较厚的电镀掩模层（17）覆盖。 然后去除第一掩模层，留下剩余的电镀掩模层作为图案化电镀掩模，然后将其用作限定印刷电路的沉积金属（19）的掩模。

    Method for manufacture of printed wiring board
    146.
    发明公开
    Method for manufacture of printed wiring board 失效
    Verfahren zur Herstellung einer gedruckten Leiterplatte。

    公开(公告)号：EP0152634A2

    公开(公告)日：1985-08-28

    申请号：EP84116514.5

    申请日：1984-12-31

    Applicant: HITACHI, LTD.

    Inventor： Murakami, Kanji ,  Akahoshi, Haruo ,  Kawamoto, Mineo ,  Wajima, Motoyo ,  Matsuda, Yoichi ,  Kawakubo, Kyoji ,  Kanechiku, Minoru ,  Yoshimura, Toyofusa ,  Matsunaga, Makoto

    IPC: H05K3/20 ,  H01F41/04 ,  H05K1/16

    CPC classification number: H05K1/165 ,  H01F41/042 ,  H01L2221/68345 ,  H05K1/0393 ,  H05K3/205 ,  H05K2201/09881 ,  H05K2203/0152 ,  H05K2203/0726 ,  Y10T29/49155

    Abstract: A method for the manufacture of a printing wiring board, which proves particularly useful as a printed coil, is characterized by the fact that in the work in process which has undergone the step for fomation of a conductor circuit and which has not undergone the step for separation of a plating resist, the plating resist and other insulating substratal material are separated for transfer from the surface of the substrate having the conductor circuit formed thereon. Since this method permits formation of an extremely thin insulating layer and a conductor circuit layer thicker than the insulating layer, it enables production of very thin printed wiring board and printed coil (8) having high circuit density in the surfaces of component layers as well as in the direction of superposition of component layers.

    Abstract translation: 制造印刷线路板的方法，其特别用作印刷线圈，其特征在于，在已经经历了用于形成导体电路的步骤的工作中，并且没有经历步骤 分离电镀抗蚀剂，电镀抗蚀剂和其它绝缘衬底材料被分离以从其上形成有导体电路的衬底的表面转移。 由于该方法可以形成比绝缘层厚的绝缘层和导体电路层，所以能够在元件层的表面上制造非常薄的印刷电路板和具有高电路密度的印刷线圈（8），以及 在组件层叠的方向上。

    WIRING BOARD, ELECTRONIC DEVICE PACKAGE, AND METHODS OF PRODUCTION OF THE SAME
    147.
    发明公开
    WIRING BOARD, ELECTRONIC DEVICE PACKAGE, AND METHODS OF PRODUCTION OF THE SAME 审中-公开
    LELERPLATTE，ELEKTRONISCHESGERÄTEPAKETUND HERSTELLUNGSVERFAHRENDAFÜR

    公开(公告)号：EP2403325A1

    公开(公告)日：2012-01-04

    申请号：EP10746157.6

    申请日：2010-02-22

    Applicant: Hitachi Chemical Company, Ltd.

    Inventor： YOSHIDA Hideki ,  ISODA Satoshi ,  URASAKI Naoyuki ,  KOTANI Hayato

    IPC: H05K3/28 ,  G02F1/13357 ,  H05K1/02 ,  H05K1/05

    CPC classification number: G02B5/12 ,  G02F1/133553 ,  G02F1/136286 ,  G02F2203/12 ,  H05K1/0274 ,  H05K3/244 ,  H05K3/28 ,  H05K3/285 ,  H05K3/4652 ,  H05K2201/0209 ,  H05K2201/0376 ,  H05K2201/09881 ,  H05K2201/10106 ,  H05K2201/2054 ,  H05K2203/025 ,  Y10T29/49156

    Abstract: A wiring board which uses both conductor patterns and reflection members provided at gaps therebetween to suppress unevenness in the reflection rate so as to raise the overall reflection rate and provide a reflection function on the surface of the wiring board at the side where an electronic device is mounted; facilitates shaping of the reflection members, controlling of the thickness of the reflection members, and controlling of the surface shape of the reflection members so as to stabilize the reflection rate; and secures close contact between the reflection members and sealing members so as to improve reliability. The wiring board comprises a plurality of wiring layers provided with conductor patterns disposed on base members, and base members which electrically insulate the plurality of wiring layers. At the outermost wiring layer among the plurality of wiring layers, reflection members are formed on the portions of the base member where there are no conductor patterns, the surface of these reflection members and the surface of the conductor patterns are made level and the surface of the conductor patterns are exposed from the reflection members.

    Abstract translation: 一种布线板，其使用两个导体图案和设置在其间的间隙的反射构件，以抑制反射率的不均匀性，从而提高整体反射率，并且在布线板的电子设备的一侧的表面上提供反射功能 安装; 促进反射构件的成形，反射构件的厚度的控制，反射构件的表面形状的控制，使反射率稳定化。 并且确保反射构件和密封构件之间的紧密接触，从而提高可靠性。 布线基板包括设置在基体上的导体图案的多个布线层和使多个布线层电绝缘的基底构件。 在多个布线层中的最外面布线层处，反射部件形成在不存在导体图案的基底部件的部分上，这些反射部件的表面和导体图案的表面形成为水平面， 导体图案从反射构件露出。

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