公开(公告)号：EP0485790A2

公开(公告)日：1992-05-20

申请号：EP91118290.5

申请日：1991-10-26

Applicant: Löhr & Herrmann GmbH

Inventor： Löhr, Hans-Günter, Dr.-Ing. ,  Herrmann, Gunter, Dr.-Ing. ,  Mozzi, Josef

IPC: H05K3/00 ,  B23D45/10 ,  B27B33/20

CPC classification number: B23D45/105 ,  B27B33/20 ,  H05K3/0052 ,  H05K2201/09154 ,  H05K2203/0228

Abstract: Die Vorrichtung zum Trennen und Besäumen, insbes. von dünnen Leiterplatten, aber auch mehrlagigen Leiterplatten arbeitet mit zwei in einer Ebene einander gegenüberliegend angeordnete Kreissägeblätter (10a,10b), vorzugsweise mit Diamantschneiden, deren Sägezähne (21) jeweils in die Oberfläche der Leiterplatten (8) eintauchen und diese von beiden Seiten ankerben ohne sie vollständig durchzuschneiden. Der verbliebene "Reststeg" (22) wird möglichst dünn gewählt, jedoch ausreichend groß, damit die beiden Sägeblätter (10a,10b) so eingestellt werden können, daß ihre Zähne (21) Spitze gegen Spitze gestellt werden können ohne sich im Betrieb zu berühren. Das vollständige Durchtrennen der Leiterplatte (8) erfolgt in einem zweiten Bearbeitungsschritt mit einer dünnen Trennscheibe (16), die mit hoher Umfangsgeschwindigkeit umläuft und den Reststeg (22) durchtrennt.

Abstract translation: 用于特别是薄印刷电路板，以及多层印刷电路板的分离和加工的装置使用两个在一个平面上彼此相对布置的圆形锯片进行操作，并且优选地具有金刚石切割器，锯片在每种情况下都接合 在印刷电路板的表面上并切入其中，而不会从两侧彻底切割它们。 剩余的“残余网”被选择为尽可能薄，但是足够大，使得两个锯片可以被设置成使得它们的齿可以在操作期间被顶靠在尖端而不接触。 印刷电路板的完全分离在第二步骤中进行，使用以高圆周速度旋转的薄分离盘并分离残留的网。

公开(公告)号：EP0126333B1

公开(公告)日：1988-03-16

申请号：EP84104694.9

申请日：1984-04-26

Applicant: Rockwell International Corporation

Inventor： Anderson, Eric G.

IPC: G06K19/06

CPC classification number: H05K1/117 ,  G06K19/067 ,  H05K1/029 ,  H05K2201/09154 ,  H05K2201/09227 ,  H05K2201/094 ,  H05K2203/175

公开(公告)号：EP0231090A2

公开(公告)日：1987-08-05

申请号：EP87300443.6

申请日：1987-01-20

Applicant: ITT INDUSTRIES INC.

Inventor： Ohkubo, Isao ,  Aiba, Shintaro

IPC: G06K19/06 ,  G06K7/06

CPC classification number: H05K1/117 ,  G06K7/0047 ,  G06K19/07743 ,  H05K3/403 ,  H05K2201/09154 ,  H05K2201/09645 ,  H05K2201/098 ,  H05K2203/0346 ,  H05K2203/1327

Abstract: A credit card type small thin rectangular IC card (10) includes a battery (14) and an IC comprising a CPU (15), a ROM (15ʺ) and a RAM (15ʹ) mounted on a flexible printed circuit (11) and bonded within an insulative plastic material (12). The printed circuit of the card includes a plurality of electrode terminals (13) exposed in a parallel array along at least one edge of the card which are adapted to engage electrodes of a mating contact. The printed circuit terminals are manufactured by coating copper, nickel and gold over polyamide resin and squeeze finishing the leading edge. The mating socket comprises a generally U-shaped frame having a U-shaped channel adapted to receive the IC card and having internal recessed contacts adapted to engage the terminals of the IC card. The contacts extend from an exterior surface of the frame for interconnection with the circuits of the mating device. Downwardly projecting portions thereof are bent at least twice in the portion penetrating the bottom of the frame.

公开(公告)号：EP0126333A3

公开(公告)日：1985-03-27

申请号：EP84104694

申请日：1984-04-26

Applicant: Rockwell International Corporation

Inventor： Anderson, Eric G.

IPC: G06K19/06

CPC classification number: H05K1/117 ,  G06K19/067 ,  H05K1/029 ,  H05K2201/09154 ,  H05K2201/09227 ,  H05K2201/094 ,  H05K2203/175

Abstract: @ A series of first parallel printed contacts extends inward from a beveled first end of a card. Conductors extend over the surface on ends of the contact and are electrically connected together and with large contact terminals at the ends of the parallel series of contacts. A second parallel series of contacts extends inward from the beveled first edge on the second side of the card, and conductors are looped around each other and individually terminate in a triangular array of connectors which extend through the card to make electrical contact with the first conductors on the first surface. Large end contact terminals are provided at ends of the second series of contact. Adhesive-backed covers cover the conductors and connectors and inner portions of the contacts and terminals. The first conductors and second conductors are so arranged that large sections of each conductor in one group of conductors do not overlie conductors on the opposite side of the card. Holes can be punched through the card in selected locations to selectively interrupt conductors on one side of the card without interrupting conductors on the opposite side of the card.

公开(公告)号：EP3073523A1

公开(公告)日：2016-09-28

申请号：EP14864041.0

申请日：2014-11-19

Applicant: Dai Nippon Printing Co., Ltd.

Inventor： KURAMOCHI Satoru ,  KOIWA Sumio ,  YOSHIOKA Hidenori

IPC: H01L23/32 ,  H01L21/3205 ,  H01L21/768 ,  H01L23/522 ,  H01L25/065 ,  H01L25/07 ,  H01L25/18 ,  H05K1/11

CPC classification number: H01L23/49827 ,  H01L23/13 ,  H01L23/15 ,  H01L23/481 ,  H01L23/49894 ,  H01L24/13 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L25/065 ,  H01L25/18 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/13109 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/16145 ,  H01L2224/16146 ,  H01L2224/16165 ,  H01L2224/16227 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73257 ,  H01L2224/81805 ,  H01L2224/8385 ,  H01L2225/0651 ,  H01L2225/06517 ,  H01L2225/06572 ,  H01L2924/14 ,  H01L2924/1432 ,  H01L2924/1434 ,  H01L2924/1461 ,  H01L2924/15787 ,  H01L2924/15788 ,  H01L2924/1579 ,  H01L2924/381 ,  H05K1/115 ,  H05K3/28 ,  H05K3/445 ,  H05K2201/09154 ,  H05K2201/09563 ,  H05K2201/09581 ,  H05K2201/0959 ,  H05K2201/09854 ,  H05K2203/0594 ,  H01L2924/00014 ,  H01L2924/05432 ,  H01L2924/0665 ,  H01L2924/07025

Abstract: A through-hole electrode substrate includes a substrate including a through-hole extending from a first aperture of a first surface to a second aperture of a second surface, an area of the second aperture being larger than that of the first aperture, the through-hole having a minimum aperture part between the first aperture and the second aperture, wherein an area of the minimum aperture part in a planer view is smallest among a plurality of areas of the through-hole in a planer view, a filler arranged within the through-hole, and at least one gas discharge member contacting the filler exposed to one of the first surface and the second surface.

Abstract translation: 通孔电极基板包括基板，该基板包括从第一表面的第一孔到第二表面的第二孔的通孔，第二孔的面积大于第一孔的面积， 所述孔在所述第一孔和所述第二孔之间具有最小孔径部分，其中在平面视图中，所述通孔中的所述最小孔径部分的面积在所述通孔的多个区域中最小， 并且与暴露于第一表面和第二表面之一的填料接触的至少一个气体排出构件。

公开(公告)号：EP2914072A1

公开(公告)日：2015-09-02

申请号：EP15156919.1

申请日：2015-02-27

Applicant: Nissin Kogyo Co., Ltd.

Inventor： Miyasaka, Sakae

IPC: H05K3/30 ,  H05K3/34

CPC classification number: B60T15/028 ,  H05K3/325 ,  H05K3/4015 ,  H05K2201/09154 ,  H05K2201/09381 ,  H05K2201/10151 ,  H05K2203/048

Abstract: One embodiment provides a circuit board having a substrate and an electrode portion which is provided on the substrate. The electrode portion includes: a quadrangular land which is provided on a front surface of the substrate; a solder layer which is laminated on the whole of a front surface of the land; and a pad which is joined to a front surface of the solder layer. When the electrode portion is seen from thereabove, an outer circumferential line of the pad touches each of four sides of the land. Exposed portions where the solder layer is exposed are formed individually at four corners of a front surface of the electrode portion. And, the exposed portions are formed to have the same shape.

Abstract translation: 一个实施例提供一种具有基板和设置在基板上的电极部分的电路板。 所述电极部包括：设置在所述基板的前表面上的四边形区域; 焊料层，其层叠在所述焊盘的整个前表面上; 以及与焊料层的前表面接合的焊盘。 当从上方观察电极部分时，焊盘的外周线接触焊盘四面中的每一侧。 焊料层露出的露出部分分别形成在电极部分的前表面的四个角处。 并且，露出部分形成为具有相同的形状。

公开(公告)号：EP2903399A1

公开(公告)日：2015-08-05

申请号：EP12885910.5

申请日：2012-09-26

Applicant: Meiko Electronics Co., Ltd.

Inventor： SHIMIZU, Ryoichi ,  IWAMOTO, Mitsuo ,  TODA, Mitsuaki

IPC: H05K3/46 ,  H05K1/02

CPC classification number: H05K1/188 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/544 ,  H01L24/19 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/82 ,  H01L24/83 ,  H01L24/92 ,  H01L2221/68359 ,  H01L2223/54426 ,  H01L2223/54486 ,  H01L2224/04105 ,  H01L2224/2741 ,  H01L2224/27436 ,  H01L2224/2919 ,  H01L2224/2929 ,  H01L2224/29387 ,  H01L2224/32245 ,  H01L2224/82039 ,  H01L2224/82132 ,  H01L2224/83005 ,  H01L2224/83132 ,  H01L2224/8314 ,  H01L2224/83192 ,  H01L2224/92144 ,  H01L2924/14 ,  H05K1/0269 ,  H05K1/0284 ,  H05K1/09 ,  H05K1/115 ,  H05K3/305 ,  H05K3/4007 ,  H05K2201/0335 ,  H05K2201/09154 ,  H05K2201/0939 ,  H05K2201/09472 ,  H05K2201/09918 ,  H05K2203/0353 ,  H05K2203/0361 ,  H05K2203/063 ,  Y02P70/613 ,  Y10T29/49131

Abstract: In the present invention, in a mark forming step in a manufacturing method for a component incorporated substrate in which an electronic component (14) is positioned with reference to a mark (12) formed in a copper layer (4), when an imaginary line extending from a search center (74), which is a center of a search range (72) of a sensor, to an edge side (78) of the search range (72) is represented as a search reference line (80) and an imaginary line extending, in a state in which a mark center (76), which is the center of the mark (12), is matched with the search center (74), from the mark center (76) in the same direction as the search reference line (80) and to an outer ridgeline (25) of the mark (12) is represented as a mark reference line (82), the mark (12) is formed in a shape in which the outer ridgeline (25) of the mark (12) is present in a position where a length of the mark reference line (82) is in a range of 30% or more of the search reference line (80).

Abstract translation: 在本发明中，在制造方法的标记形成工序的元件基板并入在其中的铜层（4）当虚线形成电子部件（14）被定位成与参考标记（12） 从搜索中心（74），所有这些是一个传感器的搜索范围（72）的中心，在搜索范围的边缘侧（78）延伸（72）被表示为搜索基准线（80）和在 假想延长线，在其中的状态下的标记中心（76），所有这些是标记的中心（12）与搜索中心（74）匹配时，来自在相同的方向上的中心标记（76） 搜索基准线（80）和在所述标记（12）的外脊线（25）被表示为标记参考线（82），标记（12）的形状被形成，其中所述外棱线（25）的 标记（12）是存在于一个位置，其中标记参考线（82）的长度的范围内的搜索基准线（80）的30％或更多。

公开(公告)号：EP2766955A4

公开(公告)日：2015-07-08

申请号：EP12840476

申请日：2012-10-04

Applicant: FCI ASIA PTE LTD

Inventor： ELLISON JASON J

IPC: H01R12/71 ,  H01R13/648 ,  H05K1/02 ,  H05K1/11

CPC classification number: H05K1/117 ,  H01R12/523 ,  H01R13/6471 ,  H05K1/0218 ,  H05K1/0219 ,  H05K1/0245 ,  H05K2201/09154 ,  H05K2201/09354 ,  H05K2201/09618 ,  H05K2201/09781

公开(公告)号：EP2701469A4

公开(公告)日：2015-03-18

申请号：EP12773834

申请日：2012-02-01

Applicant: NGK SPARK PLUG CO

Inventor： HASEGAWA MASAMI ,  HIRAYAMA SATOSHI ,  KITO NAOKI

IPC: H05K1/02 ,  H05K3/00

CPC classification number: H05K1/0298 ,  H05K1/0306 ,  H05K3/0029 ,  H05K3/0052 ,  H05K3/403 ,  H05K3/46 ,  H05K2201/0909 ,  H05K2201/09154 ,  H05K2201/09181 ,  H05K2203/0346 ,  Y10T29/49155

Abstract: Provided are a ceramic wiring substrate having few burrs in the vicinity of a notch provided on a side surface of a substrate main body, in which a conductor layer provided on the inner wall of the notch exhibits excellent solderability; a multi-piece ceramic wiring substrate array for providing a plurality of the wiring substrates; and a method for reliably producing the wiring substrate array. The ceramic wiring substrate 1a includes a substrate main body 2a which has a rectangular shape in plan view, and which has a front surface 3 and a back surface 4 and has side surfaces 5, each being located between the front surface 3 and the back surface 4, and having a groove surface 8a located on a side toward the front surface 3 and a fracture surface 7 located on a side toward the back surface 4; and a notch 6 which has a concave shape in plan view, and which is provided on at least one of the side surfaces 5 so as to extend between the front surface 3 and the back surface 4, wherein, in the side surface 5 having the notch 6, the boundary 11 between the groove surface 8a and the fracture surface 7 has curved portions 11r on opposite sides of the notch 6, the curved portions 11r being convex toward the front surface 3 of the substrate main body 2a in side view.

公开(公告)号：EP2701470A4

公开(公告)日：2015-01-14

申请号：EP12774076

申请日：2012-02-01

Applicant: NGK SPARK PLUG CO

Inventor： HASEGAWA MASAMI ,  HIRAYAMA SATOSHI ,  KITO NAOKI

IPC: H05K1/02 ,  H05K3/00

CPC classification number: H05K1/02 ,  H05K1/0306 ,  H05K3/0029 ,  H05K3/0052 ,  H05K3/10 ,  H05K2201/0909 ,  H05K2201/09154 ,  H05K2203/1476 ,  Y10T29/49162

Abstract: Provided are a ceramic wiring substrate having a side surface which realizes reliable chucking or hooking; a multi-piece wiring substrate array for providing a plurality of the wiring substrates; and a method for reliably producing the multi-piece wiring substrate array. The wiring substrate 1a is formed of a ceramic material S, has a square (rectangular) shape in plan view, and which has a front surface 2, a back surface 3, and side surfaces 4 each being located between the front surface 2 and the back surface 3, wherein each side surface 4 has a belt-like uneven surface 5 including a plurality of alternate and parallel convex portions 7 and concave portions 6 which are formed so as to extend along the front surface 2, and also has a fracture surface 8 located on a side toward the back surface 3.