Techniques for reducing the number of layers in a multilayer signal routing device.
    32.
    发明公开
    Techniques for reducing the number of layers in a multilayer signal routing device. 审中-公开
    用于减少在多层Signalleitvorrichtung层的数量的技术

    公开(公告)号:EP1467604A2

    公开(公告)日:2004-10-13

    申请号:EP04252038.7

    申请日:2004-04-06

    Abstract: Techniques for reducing the number of layers in a multilayer signal routing device (10) are disclosed. In one particular exemplary embodiment, the techniques may be realized as a method wherein the multilayer signal routing device (10) has a plurality of electrically conductive signal path layers (16) for routing a plurality of electrical signals thereon. The method may comprise forming a plurality of electrically conductive vias (26) in the multilayer signal routing device for electrically connecting at least two of the plurality of electrically conductive signal path layers (16), wherein the plurality of vias (26) are arranged so as to form at least one channel in at least one other of the plurality of electrically conductive signal path layers (16). The method may also comprise grouping at least a portion of the plurality of electrical signals based at least in part upon their proximity to the at least one channel so that they may be efficiently routed therein.

    Abstract translation: 用于减少在多层信号路由装置(10)的层的数量的技术是游离缺失盘。 在一个特定的示例性实施方式,所述技术可被实现为worin多层信号路由装置(10)具有导电信号路径的层(16),用于在其上的路由的电信号的多个的多个方法。 该方法可以包括形成在用于电多层信号路由装置导电过孔(26)的连接的至少两个导电信号路径的层(16)的多个复数,worin通孔的多元性(26)被布置成 以在至少一个其它导电信号路径的层(16)的所述多个形成至少一个通道。 因此,该方法可以包括在它们靠近所述至少一个信道分组的至少一个在至少部分地基于电信号的多个部分,从而thatthey可以有效地。其中路由。

    Apparatus and method for providing a network connection path
    35.
    发明公开
    Apparatus and method for providing a network connection path 审中-公开
    Gerätund Verfahren zur Bereitstellung von einem Netzwerkverbindungspfad

    公开(公告)号:EP1300768A2

    公开(公告)日:2003-04-09

    申请号:EP02256552.7

    申请日:2002-09-20

    Abstract: An apparatus comprises a first plane adapted to receive a first voltage level and a second plane adapted to receive a second voltage level. The apparatus further comprises a path asymmetrically positioned between the first plane and the second plane. The path is capable of providing the network connection to one or more devices within a processor-based system, typically for the purpose of management of one or more domains in the system.

    Abstract translation: 一种装置包括适于接收第一电压电平的第一平面和适于接收第二电压电平的第二平面。 该装置还包括不对称地定位在第一平面和第二平面之间的路径。 该路径能够提供到基于处理器的系统内的一个或多个设备的网络连接,通常用于管理系统中的一个或多个域。

    Schutzschaltung für Kommunikationseinrichtungen
    36.
    发明公开
    Schutzschaltung für Kommunikationseinrichtungen 审中-公开
    SchutzschaltungfürKommunikationseinrichtungen

    公开(公告)号:EP1288991A2

    公开(公告)日:2003-03-05

    申请号:EP02102241.3

    申请日:2002-08-29

    Abstract: Zwischen den zweidrahtigen Anschluss (2) und der Kommunikationseinrichtung (3) ist jeweils ein als Überstrom-Sicherung wirkendes, durch gedruckte Leiterbahnen gebildetes Längsglied (5) eingefügt, denen ein als Überspannungsschutz wirkendes Querglied (6) nachgeschaltet ist. Die geometrische Ausgestaltung der Längsglieder (5) und die Anordnung sowie die Eigenschaften des Quergliedes (6) sind derart aufeinander abgestimmt, dass eine möglichst hohe thermische Rückkopplung vom Querglied (6) auf die Längsglieder (5) erreicht wird. Die Schutzschaltung kann kostengünstig realisiert werden und ist für hohe Anforderung an Überspannungs- und Überstromschutz geeignet.

    Abstract translation: 两个保险丝(5)防止过电流。 每个由扩展的印刷电路轨道形成。 它们连接在通信单元(3)和双线输入(2)之间,每条线路中有一根保险丝。 在保险丝之后,跨过线连接过电压保护(6)。 几何形状,位置和特性被匹配和优化,使得在分流段(6)和串联保险丝(5)之间能够实现最大的热反馈。

    GAP-COUPLING BUS SYSTEM
    37.
    发明公开
    GAP-COUPLING BUS SYSTEM 失效
    GAP旁路母线系统

    公开(公告)号:EP1011039A4

    公开(公告)日:2001-08-22

    申请号:EP97909668

    申请日:1997-10-29

    Applicant: HITACHI LTD

    Abstract: A gap-coupling bus system in which data can be transferred between all modules connected to a bus. The gap-coupling bus system has at least three modules (11-16) which each have at least one transmission/reception circuit, at least three signal lines (21-16) whose one ends are connected to the modules (11-16) respectively, and terminating resistors (31-36) which are connected to the other ends of the signal lines (21-26) and whose resistance values are nearly the same as the characteristic impedances of the signal lines (21-26). The at least three signal lines (21-26) have portions (1-2, 1-3, 2-3, ...) where the signal lines of two different modules among the at least three modules (11-16) are in parallel with each other.

    Signaling improvement using extended transmission lines on 'DIMM'memory modules
    38.
    发明公开
    Signaling improvement using extended transmission lines on 'DIMM'memory modules 有权
    VerbesserteSignalübertragungdurchverlängerteÜbertragungsleitungenbei'DIMM'Speichermodulen

    公开(公告)号:EP0940850A1

    公开(公告)日:1999-09-08

    申请号:EP99102664.2

    申请日:1999-02-12

    Abstract: A circuit board (32) such as a memory module board mounts a plurality of memory modules (40) that are electrically connected to a module bus (36) on a first surface of the board (32). The module bus is coupled to a connector (34) at a first end thereof that permits an electrical coupling of a plurality of electrical conductors of the module bus to an external large integrated circuit board, and a terminating resistor device (42) at a second end thereof for properly terminating predetermined ones of the plurality of electrical conductors of the module bus. The module bus (36) is extended beyond the last memory module (40) along the bus by a length which is sufficient to substantially limit reflections and/or crosstalk between the conductors and thereby improve signaling along the module bus. In a first embodiment, the module bus (36) is extended around an edge of the board and for a predetermined distance over any unused portions of the backside of the board (32). In a second embodiment, the module bus is extended for a maximum predetermined distance along any unused portions of the front side of the board (32) when the backside of the board is unavailable for extending the module bus (36).

    Abstract translation: 诸如存储器模块板的电路板(32)安装电连接到板(32)的第一表面上的模块总线(36)的多个存储器模块(40)。 模块总线在其第一端处耦合到连接器(34),其允许模块总线的多个电导体与外部大型集成电路板的电耦合,以及在第二端处的终端电阻器设备(42) 其端部用于适当地终止模块总线的多个电导体中的预定的电导体。 模块总线(36)沿着总线延伸超过最后一个存储器模块(40),长度足以基本上限制导体之间的反射和/或串扰,从而改善沿着模块总线的信令。 在第一实施例中,模块总线(36)围绕板的边缘延伸并且在板(32)的背面的任何未使用部分上延伸预定距离。 在第二实施例中,当板的背面不可用于扩展模块总线(36)时,模块总线沿着板(32)的前侧的任何未使用部分延伸最大预定距离。

    Flat flexible cable with pseudo-twisted conductors
    39.
    发明公开
    Flat flexible cable with pseudo-twisted conductors 失效
    与假捻导体的柔性扁平电缆

    公开(公告)号:EP0809260A3

    公开(公告)日:1998-11-11

    申请号:EP97108249

    申请日:1997-05-21

    Applicant: MOLEX INC

    Abstract: A flat flexible electrical cable includes a pair of pseudo-twisted conductors (3a, 3b) on a flexible dielectric substrate (2, d). Each conductor includes alternate straight (4) and oblique (5) sections. The straight sections (4) of the conductors are generally parallel to each other and of uniform width. The oblique sections (5) of the conductors cross each other at a crossover point (8). Each oblique section (5) of each conductor is reduced in width uniformly in a direction from the straight-to-oblique transfer point (7) of the respective conductor to the crossover point (8) of the conductors (3a, 3b).

Patent Agency Ranking