Abstract:
The method for fabricating the board includes as a first step the fabrication of a first board panel (10) having a raised electrically conducting first circuit pattern (15) extending from a base layer (14) of conductive material and a raised electrically conducting second circuit pattern (20) extending from the first circuit pattern (15). A second board panel (30) is also fabricated, having a raised electrically conducting third circuit pattern (35) extending from another base layer (34) of conductive material. The first board panel (10) is laminated to the second board panel (30) with a laminate insulating material (40) disposed therebetween electrically insulating the first circuit pattern (15) from the third circuit pattern (35) and with the second circuit pattern (20) electrically contacting the first circuit pattern (15) at selected portions thereof. Finally, the base layers (14, 34) of conductive material are removed from the laminate insulating material (40).
Abstract:
An electronic parts loaded module comprises a circuit board having electronic parts connected thereto via a plurality of projecting electrodes (11), in which two or more of the plurality of projecting electrodes (11) for connecting the electronic parts have a narrowed portion (1102 between one end (1101) adjacent to the boundary for connection with the electronic parts and the other end (1103) adjacent to the boundary for connection with the board, the narrowed portion (1102) having a cross-section which has different dimensions in crossing directions, or a minor axis and a major axis different in length from each other. The projecting electrodes (11) are disposed in a manner as the larger dimension or the major axis being aligned along the periphery or the side of the electronic parts, or as surrounding the central area of the surface, on which the electronic parts are loaded. The module can be used in IC cards and liquid crystal display apparatuses and the like.
Abstract:
An electrical interconnection, which includes a method for fabricating the device, is disclosed. The interconnection comprises two contact surfaces, on at least one of which is disposed at least one solid metal conical projection in predetermined dimension and location. Rather than necessarily being permanently cojoined, the contact surfaces are attachable and detachable when desired. The conical projections on one contact surface make ohmic contact, either by wiping with an intermeshing like structure on a second contact surface or by contacting a second contact surface which is a substantially flat contact pad. An interconnection, in this invention, is the combination of at least one contact having individual conical projections and another contact, optionally having individual conical projections. The conical projections are formed in metal by electrochemical machining in neutral salt solution, optionally in a continuous foil. The conical projections are also optionally formed on the head of a contact pin.
Abstract:
A method of manufacturing a multilayer wiring board is provided in which interlayer connection is made between a first electric circuit and a second electric circuit, both electric circuits being formed on a substrate. Firstly a metal layer is applied onto the substrate and a photoresist is deposited onto the metal layer. Then the photoresist is partially removed to produce a resist hole and the remaining photoresist is selectively exposed in accordance with the desired pattern for the first electric circuit. Next a conductive pillar is formed in the resist hole, followed by the removal of the exposed remaining photoresist to reveal corresponding regions of the metal layer below. These regions of the metal layer are then etched to partly expose the substrate and to form said first electric circuit. All remaining photoresist is removed and an insulation layer is deposited on the first electric circuit, the exposed substrate, and the conductive pillar, such that only one end of the conductive pillar remains exposed. Then a second metal layer is deposited on the surface of the insulation layer and the exposed end of the conductive pillar to form the second electric layer cirrcuit. The above method facilitates accurate alignment between the first wiring circuit and the conductive pillar and hence enables high density circuits to be achieved. It also reduces the number of manufacturing steps required since the same photoresist layer is used in both the resist hole formation step and the circuit pattern formation step.
Abstract:
A raised metal connection feature (29) is created by forming a conductive pad (17) on a flexible substrate (11) and applying a flexible dielectric insulator (19) and photoresist layer (21) over the conductive pad (17). An excimer laser (25) is used to ablate a via (27) through the dielectric insulator (19) and photoresist (21) to the conductive pad (17). Gold or other metal is then plated up in the via (17), and the photoresist (21) is removed, leaving a metal feature (29) extending above the dielectric insulator (19).
Abstract:
An integrated circuit chip packaging structure comprising a substrate (10), preferably a semiconductor base substrate, a conductive layer (20) on said substrate in regions where connections to metallization layers of the substrate are formed, solder balls (36) and gold bumps (34) connected to said conductive layer in said regions of said conductive layer, and a solder stop layer (22) on said conductive layer at least around said solder balls. The conductive layer further comprises wiring lines (30). Further, a method of forming the structure is disclosed which uses only two masks for providing terminals for connecting the substrate to integrated circuits and to other substrates or to the printed circuit board and wiring lines. Thus one metallization layer is prevented. The method is applicable to 200 mm wafers and allows two different packaging technologies (C-4 and TAB or wire-bonding) on the same substrate. Thus packaging of VLSI circuits is improved.
Abstract:
A raised metal connection feature (29) is created by forming a conductive pad (17) on a flexible substrate (11) and applying a flexible dielectric insulator (19) and photoresist layer (21) over the conductive pad (17). An excimer laser (25) is used to ablate a via (27) through the dielectric insulator (19) and photoresist (21) to the conductive pad (17). Gold or other metal is then plated up in the via (17), and the photoresist (21) is removed, leaving a metal feature (29) extending above the dielectric insulator (19).
Abstract:
Zur Herstellung von mit Kontaktflächen versehenen Gedruckten Schaltungen werden Kupferfolien gegen eine mit erhabenen Flächen in einem vorgegebenen Muster versehene Schablone gepresst und das Innere der in den Kupferfolien entstandenen Prägeabdrücke mit einem aushärtenden Material ausgefüllt. Nach dem Vorpressen mit Prepregs werden aus diesen Vorlaminaten Gedruckte Schaltungen erzeugt. Die Kupferfolien müssen hierbei eine Bruchdehnung > 10% und eine Dicke von 10 bis 100 µm aufweisen.
Abstract:
Provided is a copper foil provided with a carrier in which the laser hole-opening properties of the ultrathin copper layer are good and which is suitable for producing a high-density integrated circuit substrate. A copper foil provided with a carrier having, in order, a carrier, an intermediate layer, and an ultrathin copper layer, wherein the specular gloss at 60° in an MD direction of the intermediate layer side surface of the ultrathin copper layer is 140 or less.