公开(公告)号：EP2884531A3

公开(公告)日：2015-08-26

申请号：EP13198417.1

申请日：2013-12-19

申请人： Chipmos Technologies Inc.

发明人： Cheng, Shih Jye ,  Lu, Tung Bao

IPC分类号： H01L23/485 ,  H01L23/48 ,  H01L21/60 ,  H01L21/768 ,  C25D3/64

CPC分类号： H01L24/13 ,  H01L21/76898 ,  H01L23/3192 ,  H01L23/488 ,  H01L23/49541 ,  H01L23/49572 ,  H01L23/49816 ,  H01L23/525 ,  H01L24/02 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/16 ,  H01L24/17 ,  H01L24/29 ,  H01L24/32 ,  H01L24/45 ,  H01L24/742 ,  H01L24/81 ,  H01L25/0657 ,  H01L2224/02311 ,  H01L2224/02313 ,  H01L2224/02331 ,  H01L2224/02379 ,  H01L2224/0239 ,  H01L2224/0345 ,  H01L2224/03452 ,  H01L2224/03462 ,  H01L2224/03464 ,  H01L2224/0361 ,  H01L2224/03912 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05005 ,  H01L2224/05022 ,  H01L2224/05027 ,  H01L2224/05139 ,  H01L2224/05144 ,  H01L2224/05155 ,  H01L2224/05164 ,  H01L2224/05166 ,  H01L2224/05541 ,  H01L2224/05548 ,  H01L2224/05572 ,  H01L2224/05639 ,  H01L2224/1132 ,  H01L2224/11462 ,  H01L2224/11464 ,  H01L2224/1147 ,  H01L2224/11825 ,  H01L2224/11848 ,  H01L2224/11849 ,  H01L2224/11901 ,  H01L2224/13005 ,  H01L2224/13025 ,  H01L2224/13082 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13562 ,  H01L2224/13564 ,  H01L2224/1357 ,  H01L2224/13644 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16235 ,  H01L2224/16238 ,  H01L2224/16245 ,  H01L2224/17181 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/48639 ,  H01L2224/48839 ,  H01L2224/73204 ,  H01L2224/81191 ,  H01L2224/81193 ,  H01L2224/81203 ,  H01L2224/814 ,  H01L2224/8159 ,  H01L2224/8169 ,  H01L2224/81744 ,  H01L2224/81815 ,  H01L2224/8185 ,  H01L2224/81862 ,  H01L2224/81948 ,  H01L2224/83104 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2924/00011 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/15788 ,  H01L2924/181 ,  H01L2924/381 ,  H01L2924/01079 ,  H01L2924/00012 ,  H01L2924/01046 ,  H01L2924/206 ,  H01L2924/00014 ,  H01L2924/01074 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/013 ,  H01L2924/01047 ,  H01L2924/00 ,  H01L2924/01033 ,  H01L2224/1146

摘要： A semiconductor structure includes a device (100), a conductive pad (102) over the device (100) and a Ag 1-x Y x alloy pillar (101) disposed on the conductive pad (102). Alternatively, a semiconductor structure (800) includes a device (801), a conductive pad (802) on the device (801), a passivation layer (803) disposed over the device (801) and covering a portion of the conductive pad (802) and a redistribution layer (RDL) (806) including Ag 1-x Y x alloy disposed over the passivation layer (803). Alternatively, a semiconductor structure includes a die (501) including a first surface (501A) and a second surface (501B) opposite to the first surface (501A) and a via (503) passing through the die (501) from the first surface (501A) to the second surface (501B), a Ag 1-x Y x alloy filling the via (503). The Y of the Ag 1-x Y x alloy comprises metals forming complete solid solution with Ag at arbitrary weight percentage (Au and/or Pd) and the x of the Ag 1-x Y x alloy is in a range of from about 0.005 to about 0.25. A method for manufacturing the semiconductor structure includes preparing a cyanide-base plating solution including at least one of KAg(CN) 2 , KAu(CN) 2 , K 2 Pd(CN) 4 , immersing the semiconductor structure into the plating solution, applying an electroplating current density of from about 0.1 ASD to about 1.0 ASD to the semiconductor structure to reduce silver ions, gold ions or palladium ions from the plating solution and forming the Ag 1-x Y x alloy structure (101, 806, 503) on the semiconductor structure.

摘要翻译： 一种半导体结构，包括设置在导电垫（102）的装置（100），导电垫（102）在所述装置（100）和形成Ag 1-x Y X合金支柱（101）。 可替代地，一个半导体结构（800）包括装置（801），所述设备（801）上的导电垫（802），设置在所述设备（801）的钝化层（803）和覆盖所述导电垫的一部分（ 802）和包括设置在所述钝化层（803）的Ag 1-x Y X合金的再分布层（RDL）（806）。 可替换地，半导体结构包括在（501）包括第一表面（501A）和第二面（501B）相对的第一表面（501A）和一个通孔（503）穿过从第一表面的模具（501） （501A）向第二面（501B），形成Ag 1-x Y X合金填充所述通孔（503）。 银1-X Y X合金的Y包括金属成形在任意的重量百分数（Au和/或Pd）有Ag完全固溶和银1-X Y X合金的x的范围为约0005 约12:25。 一种用于制造半导体结构的方法，包括：制备一个氰化物基镀溶液包含KAG（CN）2中的至少一个，考（CN）2，K 2的Pd（CN）4，浸渍所述半导体结构到电镀溶液中，施加 到约0.1 ASD上电镀的电流密度约1.0 ASD到半导体结构以减少从电镀溶液中的银离子，金离子，钯离子和形成的Ag 1-X Y X合金结构（101，806，503） 半导体结构。

公开(公告)号：EP2879173A2

公开(公告)日：2015-06-03

申请号：EP13194235.1

申请日：2013-11-25

申请人： Chipmos Technologies Inc.

发明人： Cheng, Shih Jye ,  Lu, Tung Bao

IPC分类号： H01L23/485 ,  H01L21/60 ,  C25D3/64 ,  C25D3/48

CPC分类号： H01L21/4825 ,  H01L23/15 ,  H01L23/49816 ,  H01L23/4985 ,  H01L23/49866 ,  H01L23/49894 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L2224/0345 ,  H01L2224/03452 ,  H01L2224/03462 ,  H01L2224/03464 ,  H01L2224/0361 ,  H01L2224/03912 ,  H01L2224/0401 ,  H01L2224/05005 ,  H01L2224/05027 ,  H01L2224/05139 ,  H01L2224/05144 ,  H01L2224/05155 ,  H01L2224/05164 ,  H01L2224/05166 ,  H01L2224/05541 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/11462 ,  H01L2224/11464 ,  H01L2224/1147 ,  H01L2224/11825 ,  H01L2224/11848 ,  H01L2224/11901 ,  H01L2224/13005 ,  H01L2224/13082 ,  H01L2224/13111 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13562 ,  H01L2224/13564 ,  H01L2224/1357 ,  H01L2224/13644 ,  H01L2224/13647 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16238 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/81191 ,  H01L2224/814 ,  H01L2224/8159 ,  H01L2224/8169 ,  H01L2224/81744 ,  H01L2224/81815 ,  H01L2224/8185 ,  H01L2224/81862 ,  H01L2224/83104 ,  H01L2924/01322 ,  H01L2924/15788 ,  H01L2924/351 ,  H01L2924/01079 ,  H01L2924/01046 ,  H01L2924/00014 ,  H01L2924/01074 ,  H01L2924/01082 ,  H01L2924/00012 ,  H01L2924/0665 ,  H01L2924/0655 ,  H01L2924/206 ,  H01L2924/014 ,  H01L2924/00 ,  H01L2224/1146

摘要： A semiconductor structure includes a semiconductor device (100), a conductive pad (102) on the semiconductor device (100), and a Ag 1-x Y x alloy bump (101) over the conductive pad (102). The Y of the Ag 1-x Y x bump (101) comprises metals forming complete solid solution with Ag at arbitrary weight percentage (Au and/or Pd), and the x of the Ag 1-x Y x alloy bump (101) is in a range of from about 0.005 to about 0.25. A difference between standard deviation and mean value of a grain size distribution of the Ag 1-x Y x alloy bump (101) is in a range of from about 0.2 µm to about 0.4 µm. An average grain size of the Ag 1-x Y x alloy bump (101) on a longitudinal cross sectional plane is in a range of from about 0.5 µm to about 1.5 µm. The alloy bump (101) is formed by electroplating.

摘要翻译： 一种半导体结构包括半导体器件（100），半导体器件（100）上的导电焊盘（102）和导电焊盘（102）上的Ag1-xYx合金凸点（101）。 Ag1-xYx凸块（101）的Y包含与Ag以任意重量百分比（Au和/或Pd）形成完全固溶体的金属，并且Ag1-xYx合金凸块（101）的x的范围为 约0.005至约0.25。 Ag1-xYx合金凸块（101）的标准偏差与晶粒尺寸分布的平均值之差在约0.2μm至约0.4μm的范围内。 纵向截面上的Ag 1-x Y x合金凸块（101）的平均晶粒尺寸在约0.5μm至约1.5μm的范围内。 合金凸块（101）通过电镀形成。

公开(公告)号：EP2801111A4

公开(公告)日：2015-09-23

申请号：EP12864481

申请日：2012-12-10

申请人： MICRON TECHNOLOGY INC

发明人： GANDHI JASPREET S ,  WIRZ BRANDON P ,  SUN YANGYANG ,  WOODLAND JOSH D

IPC分类号： H01L21/60 ,  H01L21/56 ,  H01L21/98 ,  H01L23/48 ,  H01L23/485 ,  H01L25/065

CPC分类号： H01L23/481 ,  H01L21/563 ,  H01L23/293 ,  H01L24/05 ,  H01L24/06 ,  H01L24/11 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/17 ,  H01L24/29 ,  H01L24/32 ,  H01L24/73 ,  H01L24/81 ,  H01L24/83 ,  H01L25/0657 ,  H01L2224/0401 ,  H01L2224/05009 ,  H01L2224/05568 ,  H01L2224/0557 ,  H01L2224/06181 ,  H01L2224/11822 ,  H01L2224/13009 ,  H01L2224/13023 ,  H01L2224/13025 ,  H01L2224/13082 ,  H01L2224/13083 ,  H01L2224/131 ,  H01L2224/13562 ,  H01L2224/13564 ,  H01L2224/13566 ,  H01L2224/1357 ,  H01L2224/1369 ,  H01L2224/14131 ,  H01L2224/16058 ,  H01L2224/16146 ,  H01L2224/17181 ,  H01L2224/2919 ,  H01L2224/32145 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/81011 ,  H01L2224/81191 ,  H01L2224/8123 ,  H01L2224/81801 ,  H01L2224/81862 ,  H01L2224/81905 ,  H01L2224/81907 ,  H01L2224/83104 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2924/00014 ,  H01L2924/0665 ,  H01L2924/014 ,  H01L2224/05552

公开(公告)号：EP2879173A3

公开(公告)日：2015-08-26

申请号：EP13194235.1

申请日：2013-11-25

申请人： Chipmos Technologies Inc.

发明人： Cheng, Shih Jye ,  Lu, Tung Bao

IPC分类号： H01L23/485 ,  H01L21/60 ,  C25D3/64 ,  C25D3/48

CPC分类号： H01L21/4825 ,  H01L23/15 ,  H01L23/49816 ,  H01L23/4985 ,  H01L23/49866 ,  H01L23/49894 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L2224/0345 ,  H01L2224/03452 ,  H01L2224/03462 ,  H01L2224/03464 ,  H01L2224/0361 ,  H01L2224/03912 ,  H01L2224/0401 ,  H01L2224/05005 ,  H01L2224/05027 ,  H01L2224/05139 ,  H01L2224/05144 ,  H01L2224/05155 ,  H01L2224/05164 ,  H01L2224/05166 ,  H01L2224/05541 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/11462 ,  H01L2224/11464 ,  H01L2224/1147 ,  H01L2224/11825 ,  H01L2224/11848 ,  H01L2224/11901 ,  H01L2224/13005 ,  H01L2224/13082 ,  H01L2224/13111 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13562 ,  H01L2224/13564 ,  H01L2224/1357 ,  H01L2224/13644 ,  H01L2224/13647 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16238 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/81191 ,  H01L2224/814 ,  H01L2224/8159 ,  H01L2224/8169 ,  H01L2224/81744 ,  H01L2224/81815 ,  H01L2224/8185 ,  H01L2224/81862 ,  H01L2224/83104 ,  H01L2924/01322 ,  H01L2924/15788 ,  H01L2924/351 ,  H01L2924/01079 ,  H01L2924/01046 ,  H01L2924/00014 ,  H01L2924/01074 ,  H01L2924/01082 ,  H01L2924/00012 ,  H01L2924/0665 ,  H01L2924/0655 ,  H01L2924/206 ,  H01L2924/014 ,  H01L2924/00 ,  H01L2224/1146

摘要： A semiconductor structure includes a semiconductor device (100), a conductive pad (102) on the semiconductor device (100), and a Ag 1-x Y x alloy bump (101) over the conductive pad (102). The Y of the Ag 1-x Y x bump (101) comprises metals forming complete solid solution with Ag at arbitrary weight percentage (Au and/or Pd), and the x of the Ag 1-x Y x alloy bump (101) is in a range of from about 0.005 to about 0.25. A difference between standard deviation and mean value of a grain size distribution of the Ag 1-x Y x alloy bump (101) is in a range of from about 0.2 µm to about 0.4 µm. An average grain size of the Ag 1-x Y x alloy bump (101) on a longitudinal cross sectional plane is in a range of from about 0.5 µm to about 1.5 µm. The alloy bump (101) is formed by electroplating.

公开(公告)号：EP2879169A3

公开(公告)日：2015-08-26

申请号：EP13194234.4

申请日：2013-11-25

申请人： Chipmos Technologies Inc.

发明人： Cheng, Shih Jye ,  Lu, Tung Bao

IPC分类号： H01L21/60 ,  C25D3/64 ,  C25D3/48 ,  H01L23/485

CPC分类号： H01L21/4853 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/742 ,  H01L24/81 ,  H01L2224/0345 ,  H01L2224/03452 ,  H01L2224/03462 ,  H01L2224/03464 ,  H01L2224/0361 ,  H01L2224/039 ,  H01L2224/03912 ,  H01L2224/0401 ,  H01L2224/05005 ,  H01L2224/05027 ,  H01L2224/05139 ,  H01L2224/05144 ,  H01L2224/05155 ,  H01L2224/05164 ,  H01L2224/05166 ,  H01L2224/05541 ,  H01L2224/05576 ,  H01L2224/05578 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/11462 ,  H01L2224/11464 ,  H01L2224/1147 ,  H01L2224/11825 ,  H01L2224/11848 ,  H01L2224/119 ,  H01L2224/11901 ,  H01L2224/11906 ,  H01L2224/13005 ,  H01L2224/13082 ,  H01L2224/13111 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13562 ,  H01L2224/13564 ,  H01L2224/1357 ,  H01L2224/13644 ,  H01L2224/13647 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16238 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/81191 ,  H01L2224/814 ,  H01L2224/8159 ,  H01L2224/8169 ,  H01L2224/81744 ,  H01L2224/81801 ,  H01L2224/81815 ,  H01L2224/8185 ,  H01L2224/81862 ,  H01L2224/83104 ,  H01L2924/01322 ,  H01L2924/15788 ,  H01L2924/351 ,  H01L2924/00014 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/01046 ,  H01L2924/01082 ,  H01L2924/00012 ,  H01L2224/1182 ,  H01L2924/0665 ,  H01L2924/206 ,  H01L2924/014 ,  H01L2924/00 ,  H01L2224/1146

摘要： The present disclosure provides a method for manufacturing a semiconductor structure. The method includes forming a conductive pad (102) on a semiconductor die (100); forming a seed layer (105) over the conductive pad (102); defining a first mask layer (109) over the seed layer (105); and forming a silver alloy bump body (101) in the first mask layer (109). The forming a silver alloy bump body (101) in the first mask layer (109) includes operations of preparing a first cyanide-based bath (113); controlling a pH value of the first cyanide-based bath (113) to be within a range of from about 6 to about 8; immersing the semiconductor die (100) into the first cyanide-based bath (113); and applying an electroplating current density of from about 0.1 ASD to about 0.5 ASD to the semiconductor die (100). The silver alloy of the silver alloy bump body (101) comprises gold and/or palladium. The first cyanide-based bath (113) comprises KAg(CN) 2 , KAu(CN) 2 and/or K 2 Pd(CN) 4 .

摘要翻译： 本公开提供了一种用于制造半导体结构的方法。 该方法包括在半导体管芯（100）上形成导电垫（102）; 在导电垫（102）上形成种子层（105）; 在所述种子层（105）上方界定第一掩模层（109）; 以及在第一掩模层（109）中形成银合金凸块体（101）。 在第一掩模层（109）中形成银合金凸块体（101）包括制备第一氰化物基浴（113）的操作; 将所述第一氰化物基浴（113）的pH值控制在约6至约8的范围内; 将半导体管芯（100）浸入第一氰化物基浴（113）中; 以及将约0.1ASD至约0.5ASD的电镀电流密度施加至半导体管芯（100）。 银合金凸块体（101）的银合金包含金和/或钯。 第一氰化物基浴（113）包含KAg（CN）2，KAu（CN）2和/或K 2 Pd（CN）4。

公开(公告)号：EP0152972B1

公开(公告)日：1990-11-28

申请号：EP85200051.2

申请日：1985-01-21

申请人： Philips Patentverwaltung GmbH ,  Philips Electronics N.V.

发明人： Zeile, Heinrich, Dr. rer. nat. ,  Sauermann, Heinz, Dipl.-Phys.

IPC分类号： H01L23/48

CPC分类号： H01L24/72 ,  H01L24/13 ,  H01L24/14 ,  H01L2224/05166 ,  H01L2224/05184 ,  H01L2224/05644 ,  H01L2224/13 ,  H01L2224/13018 ,  H01L2224/13139 ,  H01L2224/13564 ,  H01L2224/13611 ,  H01L2224/14181 ,  H01L2224/81191 ,  H01L2224/819 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/0102 ,  H01L2924/01022 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01047 ,  H01L2924/01068 ,  H01L2924/01074 ,  H01L2924/01076 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/12043 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2924/013

公开(公告)号：EP2801111A1

公开(公告)日：2014-11-12

申请号：EP12864481.2

申请日：2012-12-10

申请人： Micron Technology, Inc.

发明人： GANDHI, Jaspreet, S. ,  WIRZ, Brandon, P. ,  SUN, Yangyang ,  WOODLAND, Josh, D.

IPC分类号： H01L23/48 ,  H01L23/12

CPC分类号： H01L23/481 ,  H01L21/563 ,  H01L23/293 ,  H01L24/05 ,  H01L24/06 ,  H01L24/11 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/17 ,  H01L24/29 ,  H01L24/32 ,  H01L24/73 ,  H01L24/81 ,  H01L24/83 ,  H01L25/0657 ,  H01L2224/0401 ,  H01L2224/05009 ,  H01L2224/05568 ,  H01L2224/0557 ,  H01L2224/06181 ,  H01L2224/11822 ,  H01L2224/13009 ,  H01L2224/13023 ,  H01L2224/13025 ,  H01L2224/13082 ,  H01L2224/13083 ,  H01L2224/131 ,  H01L2224/13562 ,  H01L2224/13564 ,  H01L2224/13566 ,  H01L2224/1357 ,  H01L2224/1369 ,  H01L2224/14131 ,  H01L2224/16058 ,  H01L2224/16146 ,  H01L2224/17181 ,  H01L2224/2919 ,  H01L2224/32145 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/81011 ,  H01L2224/81191 ,  H01L2224/8123 ,  H01L2224/81801 ,  H01L2224/81862 ,  H01L2224/81905 ,  H01L2224/81907 ,  H01L2224/83104 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2924/00014 ,  H01L2924/0665 ,  H01L2924/014 ,  H01L2224/05552

摘要： An integrated circuit construction includes a stack of two or more integrated circuit substrates. At least one of the substrates includes through substrate vias (TSVs) individually comprising opposing ends. A conductive bond pad is adj acent one of the ends on one side of the one substrate. A conductive solder mass is adj acent the other end projecting elevationally on the other side of the one substrate. Individual of the solder masses are bonded to a respective bond pad on an immediately adjacent substrate of the stack. Epoxy flux surrounds the individual solder masses. An epoxy material different in composition from the epoxy flux surrounds the epoxy flux on the individual solder masses. Methods of forming integrated circuit constructions are also disclosed.

公开(公告)号：EP2555239A3

公开(公告)日：2013-06-05

申请号：EP12170009.0

申请日：2012-05-30

申请人： Sony Mobile Communications AB

发明人： Lundberg, Nils

IPC分类号： H01L25/065 ,  H01L23/367 ,  H01L23/373 ,  H01L23/48 ,  H05K1/02

CPC分类号： H01L25/0657 ,  H01L23/3128 ,  H01L23/36 ,  H01L23/3677 ,  H01L23/373 ,  H01L23/481 ,  H01L24/13 ,  H01L24/16 ,  H01L2224/13025 ,  H01L2224/13147 ,  H01L2224/13564 ,  H01L2224/13611 ,  H01L2224/16146 ,  H01L2224/16227 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06565 ,  H01L2225/06589 ,  H01L2924/10253 ,  H01L2924/10271 ,  H01L2924/10272 ,  H01L2924/10329 ,  H01L2924/10335 ,  H01L2924/12042 ,  H01L2924/1432 ,  H01L2924/1436 ,  H01L2924/15311 ,  H05K1/0206 ,  H05K1/0207 ,  H05K3/3436 ,  H01L2224/16225 ,  H01L2924/00

摘要： A semiconductor assembly (10) comprises a package (20), which in turn comprises at least one substrate (30), a first die (40) stacked onto the substrate, at least one further die (50) stacked onto the first die, at least one heat spreader (60) in the package, and TSV:s (70) extending through the stacked dies. The ends (71) of the TSV:s are exposed at the further die.

公开(公告)号：EP0875935A2

公开(公告)日：1998-11-04

申请号：EP98107645.8

申请日：1998-04-27

申请人： NEC Corporation

发明人： Shoji, Kazutaka

IPC分类号： H01L23/485

CPC分类号： H01L24/13 ,  H01L24/11 ,  H01L24/81 ,  H01L2224/05571 ,  H01L2224/10126 ,  H01L2224/11009 ,  H01L2224/11334 ,  H01L2224/13006 ,  H01L2224/131 ,  H01L2224/13144 ,  H01L2224/13564 ,  H01L2224/1357 ,  H01L2224/1369 ,  H01L2224/16 ,  H01L2224/16237 ,  H01L2224/81011 ,  H01L2224/81193 ,  H01L2224/8121 ,  H01L2224/81355 ,  H01L2224/814 ,  H01L2224/81815 ,  H01L2224/83102 ,  H01L2224/92125 ,  H01L2924/00013 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01015 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/15787 ,  H01L2924/19042 ,  H01L2924/351 ,  H01L2924/00014 ,  H01L2224/13099 ,  H01L2224/13599 ,  H01L2224/05599 ,  H01L2224/05099 ,  H01L2224/29099 ,  H01L2224/29599 ,  H01L2924/00 ,  H01L2924/00012

摘要： A semiconductor device comprises a plurality of solder bumps (14) each formed on a pad 13c of a semiconductor device (11). The top of each of the solder bumps (14) is covered with a masking film (16), and the bases of the solder bumps (14) are buried with a reinforcement film (15). The oxidation of the solder bumps (14) is prevented by the masking film (16) and the reinforcement film (16), the latter also undertaking the thermal stress generated between the semiconductor chip (12) and the circuit board (21). The mounting is conducted with the masking film (16) remaining on the top of the solder ball (14), which breaks the masking film (16) and connected to the pad (22) on the circuit board (21).

公开(公告)号：EP0152972A3

公开(公告)日：1987-01-21

申请号：EP85200051

申请日：1985-01-21

申请人： Philips Patentverwaltung GmbH ,  N.V. Philips' Gloeilampenfabrieken

发明人： Zeile, Heinrich, Dr. rer. nat. ,  Sauermann, Heinz, Dipl.-Phys.

IPC分类号： H01L23/48

CPC分类号： H01L24/72 ,  H01L24/13 ,  H01L24/14 ,  H01L2224/05166 ,  H01L2224/05184 ,  H01L2224/05644 ,  H01L2224/13 ,  H01L2224/13018 ,  H01L2224/13139 ,  H01L2224/13564 ,  H01L2224/13611 ,  H01L2224/14181 ,  H01L2224/81191 ,  H01L2224/819 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/0102 ,  H01L2924/01022 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01047 ,  H01L2924/01068 ,  H01L2924/01074 ,  H01L2924/01076 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/12043 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2924/013