TRANSISTOR A EFFET DE CHAMP ET DISPOSITIF DE DETECTION DE DEFAILLANCE ASSOCIE
    2.
    发明公开
    TRANSISTOR A EFFET DE CHAMP ET DISPOSITIF DE DETECTION DE DEFAILLANCE ASSOCIE 审中-公开
    联合王国福特福克斯

    公开(公告)号:EP3149853A1

    公开(公告)日:2017-04-05

    申请号:EP15727333.5

    申请日:2015-05-26

    Applicant: Renault S.A.S.

    Abstract: The invention concerns an electronic device (9), comprising: - a normally open power field effect transistor (11), comprising a control electrode (111) and first and second conduction electrodes (112, 113); - a control circuit (21) comprising a resistive component (211) connected to the control electrode, the control circuit being configured to apply a blocking potential of the transistor to the control electrode via the resistive component, said blocking potential being lower than the potentials of the first and second conduction electrodes; - a detection circuit (31) for detecting a short-circuit between the first and second conduction electrodes, configured to measure the potential of the control electrode during the blocking of the transistor, in order to compare the measured potential to a reference potential, and to generate a fault signal depending on the result of the comparison.

    Abstract translation: 本发明涉及一种电子设备(9),包括: - 常开功率场效应晶体管(11),包括控制电极(111)和第一和第二导电电极(112,113); - 控制电路(21),包括连接到所述控制电极的电阻部件(211),所述控制电路被配置为经由所述电阻部件将所述晶体管的阻断电位施加到所述控制电极,所述阻断电位低于所述电位 的第一和第二导电电极; - 用于检测第一和第二导电电极之间的短路的检测电路(31),被配置为在晶体管的阻塞期间测量控制电极的电位,以便将测量的电位与参考电位进行比较;以及 根据比较结果产生故障信号。

    SEMICONDUCTOR DEVICE
    8.
    发明公开
    SEMICONDUCTOR DEVICE 审中-公开
    半导体器件

    公开(公告)号:EP3312875A1

    公开(公告)日:2018-04-25

    申请号:EP15895668.0

    申请日:2015-06-19

    Abstract: A semiconductor device provided with: a first input/output circuit connected to a first pad; a second input/output circuit disposed in the direction along one side constituted by a chip edge in relation to the first input/output circuit, the second input/output circuit being connected to a second pad; and an ESD protective circuit disposed near the outer-side chip edge of the first and second input/output circuits. The ESD protection circuit is provided with a resistor, a capacitor, an inverter, and an N-channel-type transistor.

    Abstract translation: 一种半导体器件,具有:连接到第一焊盘的第一输入/输出电路; 第二输入/输出电路,所述第二输入/输出电路设置在沿着由所述第一输入/输出电路的芯片边缘构成的一侧的方向上,所述第二输入/输出电路连接到第二焊盘; 以及设置在第一和第二输入/输出电路的外侧芯片边缘附近的ESD保护电路。 ESD保护电路配备有电阻器,电容器,反相器和N沟道型晶体管。

    DISPLAY DEVICE HAVING IMPROVED ELECTROSTATIC DISCHARGE PROTECTION
    9.
    发明公开
    DISPLAY DEVICE HAVING IMPROVED ELECTROSTATIC DISCHARGE PROTECTION 审中-公开
    具有改进的静电放电保护的显示装置

    公开(公告)号:EP3029729A3

    公开(公告)日:2016-07-06

    申请号:EP15196679.3

    申请日:2015-11-27

    Abstract: A display device having an electrostatic discharge protection unit disposed between a display unit and a pad unit. The electrostatic discharge protection unit comprises a first signal line configured to deliver data and a control signal from a pad unit to the display unit, a second signal line, a plurality of first electrostatic discharge protection patterns which are electrically connected to the first signal line; and a plurality of second electrostatic discharge protection patterns which are electrically connected to the second signal line. Respective ones of the first electrostatic discharge protection patterns and the second electrostatic discharge protection patterns together form a plurality of electrostatic discharge protection pattern pairs, and the first and second electrostatic discharge protection patterns in each of the electrostatic discharge protection pattern pairs are separated from each other by differing distances.

    Abstract translation: 一种具有设置在显示单元和焊盘单元之间的静电放电保护单元的显示装置。 静电放电保护单元包括:第一信号线,配置为从焊盘单元向显示单元传送数据和控制信号;第二信号线;多个第一静电放电保护图案,电连接到第一信号线; 以及电连接到第二信号线的多个第二静电放电保护图案。 第一静电放电保护图案和第二静电放电保护图案中的每一个一起形成多个静电放电保护图案对,并且每个静电放电保护图案对中的第一和第二静电放电保护图案彼此分离 由不同的距离。

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