公开(公告)号：EP4498767A1

公开(公告)日：2025-01-29

申请号：EP24190960.5

申请日：2024-07-25

Applicant: Avago Technologies International Sales Pte. Limited

Inventor： Dauksher, Walter ,  Wang, Tao ,  Hinton, Mark Andrew

IPC: H05K1/11 ,  H05K3/40 ,  H05K3/42 ,  H05K3/44 ,  H05K3/46 ,  H05K1/14 ,  H05K1/02

Abstract: Novel tools and techniques are provided for implementing a semiconductor package or a chip package, and more particularly methods, systems, and apparatuses (100) are provided for implementing a semiconductor package or a chip package including a stiffener member (130) with a via (135). In various embodiments, an apparatus (100) includes a substrate (105) and a connector (110) electrically coupled to the substrate (105). A stiffener member (130) is disposed between the substrate (105) and the connector (110) and configured to restrain at least one of the substrate (105) or the connector (110). A via (135) extends through a body of the stiffener member (130) and electrically couples the connector (110) to the substrate (105).

公开(公告)号：EP4160667A1

公开(公告)日：2023-04-05

申请号：EP21818438.0

申请日：2021-05-31

Applicant: Mitsubishi Materials Corporation

Inventor： SAKANIWA, Yoshiaki ,  OHASHI, Toyo

IPC: H01L23/14 ,  H05K1/03 ,  H05K3/44

Abstract: There is provided a manufacturing method for an insulating resin circuit substrate, which is a manufacturing method for an insulating resin circuit substrate which includes an insulating resin layer composed of a polyimide resin and a circuit layer consisting of metal pieces disposed in a circuit pattern shape on one surface of the insulating resin layer. The manufacturing method includes a temporary fixing step of pressurizing the metal pieces toward the resin sheet material while heating the metal pieces to temporarily fix the metal pieces and a joining step of disposing a cushion material on a side of the metal pieces which are temporarily fixed and pressurizing the metal pieces and the resin sheet material in a laminating direction, while heating the metal pieces and the resin sheet material, to join the resin sheet material and the metal pieces. Regarding all the metal pieces, in a case where a ratio w/t of a minimum width w to a thickness t exceeds 0.5, a heating temperature in the temporary fixing step is 150°C or higher, and in a case where the metal pieces include a narrow-width metal piece having the ratio w/t of the minimum width w to the thickness t of 0.5 or less, the heating temperature in the temporary fixing step is 350°C or higher.

公开(公告)号：EP3090609B1

公开(公告)日：2017-06-28

申请号：EP14812556.0

申请日：2014-12-17

Applicant: Philips Lighting Holding B.V.

Inventor： DE VAAN, Adrianus Johannes Stephanus Maria ,  PEELS, Wilhelmus Gerardus Maria ,  DEEBEN, Josephus Paulus Augustinus

IPC: H05K3/44 ,  H05K1/02 ,  H05K1/09 ,  H05K3/00 ,  H05K3/12 ,  H05K1/05 ,  H05K3/32

CPC classification number: H05K3/32 ,  H05K1/0284 ,  H05K1/056 ,  H05K1/092 ,  H05K3/0014 ,  H05K3/0061 ,  H05K3/1216 ,  H05K3/125 ,  H05K3/321 ,  H05K3/44 ,  H05K2201/0129 ,  H05K2201/09727 ,  H05K2201/09736 ,  H05K2201/10106 ,  H05K2201/10113 ,  H05K2203/1461

公开(公告)号：EP3000288A4

公开(公告)日：2017-01-04

申请号：EP14801350

申请日：2014-05-21

Applicant: BYD CO LTD

Inventor： XU QIANG ,  LIN XINPING

IPC: C25D11/24 ,  C23C18/18 ,  H05K1/03 ,  H05K1/05 ,  H05K3/18 ,  H05K3/44

CPC classification number: H05K1/053 ,  C23C18/1608 ,  C23C18/1612 ,  C23C18/1868 ,  C23C18/1879 ,  C23C18/40 ,  C25D11/08 ,  C25D11/10 ,  C25D11/16 ,  C25D11/246 ,  H05K3/185 ,  H05K3/44 ,  H05K2201/0116 ,  H05K2203/0315 ,  H05K2203/107 ,  H05K2203/1147

Abstract: Embodiments of the present disclosure are directed to a circuit board. The circuit board comprises: an aluminum-based substrate; an alumina layer formed on at least one surface of the aluminum-based substrate; and a circuit layer formed on the alumina layer. The alumina layer comprises alumina and an element selected from a group consisting of chromium, nickel, a rare earth metal, and a combination thereof.

Abstract translation: 本公开的实施例涉及电路板。 电路板包括：铝基底板; 形成在铝基基板的至少一个表面上的氧化铝层; 以及形成在氧化铝层上的电路层。 氧化铝层包括氧化铝和选自铬，镍，稀土金属及其组合的元素。

公开(公告)号：EP3069583A1

公开(公告)日：2016-09-21

申请号：EP14784376.7

申请日：2014-10-13

Applicant: Cambridge Nanotherm Limited ,  Rogers Corporation

Inventor： SHASHKOV, Pavel ,  USOV, Sergey ,  CURTIS, Steven ,  KILHENNY, Brett W.

IPC: H05K3/44 ,  C25D11/02 ,  C25D11/06

CPC classification number: H05K1/028 ,  C25D11/02 ,  C25D11/024 ,  H05K1/0237 ,  H05K1/0306 ,  H05K1/05 ,  H05K1/053 ,  H05K3/0044 ,  H05K3/28 ,  H05K3/44 ,  H05K2201/0116 ,  H05K2201/0175 ,  H05K2203/0315 ,  H05K2203/1147

Abstract: A flexible electronic substrate (FES) includes a metallic layer, a dielectric nanoceramic layer formed by oxidation of a surface of the metallic layer, and an electrical circuit formed on a surface of the dielectric layer. The FES may be used for supporting a device, for example a flexible display, an OLED, an optoelectronic device, or a rf device. The dielectric nanoceramic layer has a crystalline structure consisting of substantially equiaxed grains having an average grain size of 100 nanometres or less, a thickness of between 1 micrometre and 50 micrometres, a dielectric strength of greater than 20 KV mm−1, and a thermal conductivity of greater than 3 W/mK. The FES has a minimum bend radius of lower than 25 cm.

公开(公告)号：EP2931010A4

公开(公告)日：2016-08-03

申请号：EP13860808

申请日：2013-12-06

Applicant: TYCO ELECTRONICS AMP KOREA LTD

Inventor： CHOI YANG YOON ,  BEAK OK KY

IPC: H05K1/11 ,  H05K1/18 ,  H05K3/24 ,  H05K3/32 ,  H05K3/42 ,  H05K3/44 ,  H05K3/46

CPC classification number: H05K1/0213 ,  H05K1/092 ,  H05K1/116 ,  H05K1/182 ,  H05K3/244 ,  H05K3/325 ,  H05K3/423 ,  H05K3/429 ,  H05K3/445 ,  H05K3/4608 ,  H05K2201/0979 ,  H05K2201/1059 ,  H05K2201/1081 ,  H05K2203/0723 ,  H05K2203/073

公开(公告)号：EP1536673B1

公开(公告)日：2015-07-08

申请号：EP03733093.3

申请日：2003-05-27

Applicant: TAIYO YUDEN CO., LTD.

Inventor： MIYAZAKI, Masashi ,  TAKAYAMA, Mitsuhiro ,  SAWATARI, Tatsuro

IPC: H01L23/498 ,  H01L23/00 ,  H05K1/02 ,  H05K3/44 ,  H01L23/538 ,  H05K1/18 ,  H05K3/46

CPC classification number: H05K1/185 ,  H01L23/49822 ,  H01L23/5389 ,  H01L24/19 ,  H01L24/82 ,  H01L2224/04105 ,  H01L2224/2518 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/73267 ,  H01L2224/92244 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01019 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01037 ,  H01L2924/01057 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/15159 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19105 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2924/3025 ,  H05K1/021 ,  H05K3/445 ,  H05K3/4641 ,  H05K2201/0969 ,  H05K2201/09745 ,  H01L2924/00

Abstract: A composite multi-layer substrate (20) comprising a flat plate-like core member (21) formed of a material having an excellent electric conductivity, an excellent heat conductivity, and a high rigidity, a front resin layer (22) and a rear resin layer (23) covering at least the front and rear surfaces of the core member (21), and a bottomless hole (24) formed in the core member (21) through the front and rear sides of the core member (21), wherein an electronic component (25) is installed in the bottomless hole (24), whereby since the strength of the composite multi-layer substrate (20) can be assured by the rigidity of the core member (21), conventional prior art glass cloth can be eliminated, deterioration in the electric characteristics caused by ion migration can be avoided and will result in reduced production cost.

Abstract translation: 一种复合多层基板（20），包括由具有优异导电性，优异导热性和高刚性的材料形成的平板状芯体（21），前树脂层（22）和后 至少覆盖所述芯构件（21）的前表面和后表面的树脂层（23）和通过所述芯构件（21）的前侧和后侧形成在所述芯构件（21）中的无底孔（24） 其中电子部件（25）安装在无底孔（24）中，由于可以通过芯部件（21）的刚度来确保复合多层基板（20）的强度，因此传统的现有技术的玻璃布 可以消除，可以避免由离子迁移引起的电特性的劣化，并且将导致生产成本降低。

公开(公告)号：EP2025210B1

公开(公告)日：2012-02-22

申请号：EP07718465.3

申请日：2007-05-25

Applicant: A.B. Mikroelektronik Gesellschaft mit beschränkter Haftung

Inventor： HAEGELE, Bernd

IPC: H05K1/05 ,  H05K3/28 ,  H05K3/44 ,  C03C3/064 ,  C23C4/18

CPC classification number: H05K1/053 ,  C03C3/064 ,  C23C4/18 ,  H05K1/092 ,  H05K2201/0116 ,  H05K2201/017 ,  H05K2201/0179 ,  H05K2203/1147 ,  H05K2203/1366 ,  Y10T29/49126 ,  Y10T29/49146

Abstract: Circuit carrier having a metal support layer, at least some portions of which are covered by a dielectric layer, the latter having a plurality of pores, with the pores being sealed by glass at least on the opposite side of the dielectric layer to the support layer.

公开(公告)号：EP1395100B1

公开(公告)日：2011-06-15

申请号：EP02405740.8

申请日：2002-08-29

Applicant: Asetronics AG

Inventor： Weber, Walter ,  Rappo, Paul

IPC: H05K3/44 ,  H05K1/02 ,  H05K3/00

CPC classification number: H05K3/4084 ,  H05K1/0204 ,  H05K3/0061 ,  H05K3/0097 ,  H05K3/44 ,  H05K3/4652 ,  H05K2201/0382 ,  H05K2201/09054 ,  H05K2201/09554 ,  H05K2203/0195 ,  H05K2203/063 ,  H05K2203/085 ,  H05K2203/1147 ,  H05K2203/1536

公开(公告)号：EP2001271A2

公开(公告)日：2008-12-10

申请号：EP08251545.3

申请日：2008-04-28

Applicant: Endicott Interconnect Technologies, Inc.

Inventor： Davis, Thomas J. ,  Lauffer, John M. ,  Desai, Subahu D. ,  McNamara, James J. Jnr. ,  Markovich, Voya R.

IPC: H05K1/00 ,  H05K3/46 ,  H05K3/44 ,  H05K3/40

CPC classification number: H05K3/429 ,  H05K3/0032 ,  H05K3/0038 ,  H05K3/427 ,  H05K3/445 ,  H05K3/4623 ,  H05K3/4641 ,  H05K2201/0355 ,  H05K2201/09536 ,  H05K2201/096 ,  H05K2203/0143 ,  H05K2203/0554 ,  H05K2203/1545 ,  H05K2203/1572 ,  Y10T29/49126 ,  Y10T29/49155 ,  Y10T29/49165

Abstract: A method of making a multilayered circuitized substrate (101) in which a continuous process is used to form electrically conductive layers (65) which each will form part of a sub-composite (75, 75', 75"). The sub-composites (75, 75', 75") are then aligned such that openings (57) within the conductive layers (65) are also aligned, the sub-composites (75, 75', 75") are then bonded together, and a plurality of holes (113) are then laser drilled through the entire thickness of the bonded structure. The dielectric layers (67, 69) used in the sub-composites (75, 75', 75") do not include continuous or semi-continuous fibers therein, thus expediting hole formation there-through.

Abstract translation: 一种制造多层电路化基板（101）的方法，其中使用连续工艺形成导电层（65），每个导电层将形成子复合材料（75,75'，75“）的一部分，该亚复合材料 （75,75'，75“）对准，使得导电层（65）内的开口（57）也对准，然后将子复合材料（75,75'，75”）结合在一起，并且多个 然后在接合结构的整个厚度上激光钻出孔（113），用于副复合材料（75,75'，75“）的介电层（67,69）不包括连续或半连续的纤维 从而加快了穿孔的形成。