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公开(公告)号：US10115476B2
公开(公告)日：2018-10-30
申请号：US15221947
申请日：2016-07-28
Applicant: Apple Inc.
Inventor： Eyal Gurgi , Yoav Kasorla , Barak Rotbard , Shai Ojalvo
IPC: G06F11/07 , G06F11/263 , G11C11/16 , G11C11/56 , G11C13/00 , G11C16/10 , G11C16/34 , G11C29/12 , G11C29/38 , G11C29/44 , G11C29/50
Abstract: A method for data storage includes receiving in a memory device data for storage in a group of memory cells. The data is stored in the group by performing a Program and Verify (P&V) process, which applies to the memory cells in the group a sequence of programming pulses and compares respective analog values of the memory cells in the group to respective verification thresholds. Immediately following successful completion of the P&V process, a mismatch between the stored data and the received data is detected in the memory device. An error in storage of the data is reported responsively to the mismatch.
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公开(公告)号：US09292391B2
公开(公告)日：2016-03-22
申请号：US14178668
申请日：2014-02-12
Applicant: Apple Inc.
Inventor： Shai Ojalvo , Eyal Gurgi , Yoav Kasorla
CPC classification number: G06F11/1604 , G06F13/00 , G06F13/4086 , H03K19/0005
Abstract: A method includes communicating over an interface between a controller and multiple memory dies, which comprise respective on-die terminations (ODTs) that are each connectable to the interface by the controller. A plurality of termination settings are evaluated, each termination setting specifies a respective subset of the ODTs to be connected to the interface, so as to identify a preferred termination setting in which the communication quality with a given memory die meets a predefined criterion. Subsequent communication with the given memory die is performed while applying the preferred termination setting.
Abstract translation: 一种方法包括通过控制器和多个存储器管芯之间的接口进行通信，所述存储器管芯包括各自的管芯端子（ODT），每个管芯端子可由控制器连接到接口。 评估多个终止设置，每个终止设置指定要连接到接口的ODT的相应子集，以便识别与给定存储器管芯的通信质量符合预定标准的优选终止设置。 在应用优选的终止设置的同时执行与给定存储器管芯的后续通信。
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公开(公告)号：US20150193155A1
公开(公告)日：2015-07-09
申请号：US14148910
申请日：2014-01-07
Applicant: Apple Inc.
Inventor： Christopher J. Sarcone , Shai Ojalvo
CPC classification number: G06F3/0619 , G06F3/0659 , G06F3/0688 , G06F11/1072 , G06F12/0215 , G06F12/0862 , G06F2212/6028 , G06F2212/654 , G11C29/52 , Y02D10/13
Abstract: A method for data storage, includes holding a definition of a speculative readout mode for readout in a storage device, in which the storage device is requested to read a data unit having a data unit size, and in response the storage device retrieves a storage page that contains the data unit and has a storage page size larger than the data unit size, and retains the storage page in preparation for subsequent requests. Activation of the speculative readout mode is coordinated. A readout command using the speculative readout mode is performed.
Abstract translation: 一种用于数据存储的方法，包括在存储设备中保存用于读出的推测读出模式的定义，其中存储设备被请求读取具有数据单元大小的数据单元，并且响应于存储设备检索存储页面 其包含数据单元并且具有大于数据单元大小的存储页面大小，并且保留存储页面以备以后的请求。 推测读出模式的激活是协调的。 执行使用推测读出模式的读出命令。
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公开(公告)号：US20150012686A1
公开(公告)日：2015-01-08
申请号：US13935746
申请日：2013-07-05
Applicant: Apple Inc.
Inventor： Avraham Poza Meir , Eyal Gurgi , Shai Ojalvo , Yoav Kasorla , Naftali Sommer
IPC: G06F12/02
CPC classification number: G06F12/0246 , G06F2212/7211
Abstract: A method for data storage in a memory that includes multiple analog memory cells, includes defining, based on a characteristic of the memory cells, an uneven wear leveling scheme that programs and erases at least first and second subsets of the memory cells with respective different first and second Programming and Erasure (P/E) rates. Data is stored in the memory in accordance with the uneven wear leveling scheme.
Abstract translation: 一种用于在包括多个模拟存储器单元的存储器中的数据存储的方法，包括基于所述存储器单元的特性定义不均匀磨损平衡方案，所述不均匀磨损均衡方案以相应不同的第一方式来编程和擦除所述存储器单元的至少第一和第二子集 和第二个编程和擦除（P / E）率。 根据不均匀的磨损均衡方案将数据存储在存储器中。
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公开(公告)号：US09672919B2
公开(公告)日：2017-06-06
申请号：US13867363
申请日：2013-04-22
Applicant: Apple Inc.
Inventor： Avraham Poza Meir , Eyal Gurgi , Shai Ojalvo
CPC classification number: G11C16/10 , G06F1/30 , G11C5/148 , G11C11/56 , G11C11/5621 , G11C11/5628 , G11C16/22 , G11C16/225 , G11C16/30 , G11C16/34 , G11C27/005 , G11C2211/5641
Abstract: A method includes, in a memory including analog memory cells, storing first data in a group of the memory cells using a first type of storage command that writes respective analog values to the memory cells in the group. Second data is stored in the memory cells in the group, in addition to the first data, using a second type of storage command that modifies the respective analog values of the memory cells in the group. Upon detecting imminent interruption of electrical power to the memory during storage of the second data, a switch is made to perform an alternative storage operation that is faster than the second type of storage command and protects at least the first data from the interruption.
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Patent Agency Ranking
公开(公告)号：US09454429B2
公开(公告)日：2016-09-27
申请号：US14595578
申请日：2015-01-13
Applicant: Apple Inc.
Inventor： Shai Ojalvo , Eyal Gurgi , Micha Anholt
CPC classification number: G06F11/1016 , G06F11/1004 , G06F11/1044 , G06F11/108 , G11C5/005 , G11C7/1006 , G11C2207/104
Abstract: A method for data storage includes providing a mapping of data pages to physical pages, in which each physical page holds a non-integer number of the data pages, for storage of data in at least one memory block, including a plurality of the physical pages, in a memory device. The data pages that are mapped to the memory block are partitioned into groups, such that failure of any memory unit, which consists of a predefined number of the physical pages in the memory device, will produce errors in no more than one data page in each group. The data pages is stored in the physical pages of the memory block in accordance with the mapping, while a redundant storage scheme is applied among the data pages of each group.
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公开(公告)号：US09412465B2
公开(公告)日：2016-08-09
申请号：US14821254
申请日：2015-08-07
Applicant: Apple Inc.
Inventor： Yoav Kasorla , Shai Ojalvo , Eyal Gurgi
CPC classification number: G11C17/18 , G06F11/1044 , G11C17/16 , G11C29/74 , G11C29/787
Abstract: An integrated circuit includes fuse readout logic and first and second sets of fuses. One of the sets includes one or more primary fuses whose burn states represent respective bit values, and the other of the sets includes one or more secondary fuses whose burn states are indicative of the bit values stored in the primary fuses. The fuse readout logic is configured to read the bit values by sensing the burn states of the primary fuses, and to conditionally correct the read bit values by sensing the burn states of one or more of the secondary fuses.
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公开(公告)号：US09136012B1
公开(公告)日：2015-09-15
申请号：US14269833
申请日：2014-05-05
Applicant: Apple Inc.
Inventor： Yoav Kasorla , Shai Ojalvo , Eyal Gurgi
CPC classification number: G11C17/18 , G06F11/1044 , G11C17/16 , G11C29/74 , G11C29/787
Abstract: An integrated circuit includes fuse readout logic and first and second sets of fuses. One of the sets includes one or more primary fuses whose burn states represent respective bit values, and the other of the sets includes one or more secondary fuses whose burn states are indicative of the bit values stored in the primary fuses. The fuse readout logic is configured to read the bit values by sensing the burn states of the primary fuses, and to conditionally correct the read bit values by sensing the burn states of one or more of the secondary fuses.
Abstract translation: 集成电路包括熔丝读出逻辑和第一和第二组保险丝。 其中一个集合包括一个或多个主熔丝，其燃烧状态表示相应的位值，并且这些组中的另一个包括一个或多个辅助熔丝，其燃烧状态指示存储在主熔丝中的位值。 熔丝读出逻辑被配置为通过感测主熔丝的燃烧状态来读取位值，并且通过感测一个或多个次熔丝的燃烧状态来有条件地校正读取位值。
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公开(公告)号：US20150100847A1
公开(公告)日：2015-04-09
申请号：US14048492
申请日：2013-10-08
Applicant: Apple Inc.
Inventor： Shai Ojalvo , Eyal Gurgi , Yoav Kasorla
IPC: G06F11/10
CPC classification number: G06F3/0619 , G06F3/064 , G06F3/0659 , G06F3/0683 , G06F11/008 , G06F11/1012 , G06F11/1044 , G06F11/1068 , G06F11/1076 , G11C29/52
Abstract: A method includes storing data encoded with an Error Correction Code (ECC) in analog memory cells, by buffering the data in a volatile buffer and then writing the buffered data to the analog memory cells while overwriting at least some of the data in the volatile buffer with success indications. Upon detecting a failure in writing the buffered data to the analog memory cells, recovered data is produced by reading both the volatile buffer and the analog memory cells, assigning reliability metrics to respective bits of the recovered data depending on whether the bits were read from the volatile buffer or from the analog memory cells, and applying ECC decoding to the recovered data using the reliability metrics. The recovered data is re-programmed.
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公开(公告)号：US20160336078A1
公开(公告)日：2016-11-17
申请号：US15221947
申请日：2016-07-28
Applicant: Apple Inc.
Inventor： Eyal Gurgi , Yoav Kasorla , Barak Rotbard , Shai Ojalvo
CPC classification number: G11C29/38 , G06F11/07 , G06F11/073 , G06F11/0772 , G06F11/263 , G11C11/1677 , G11C11/5628 , G11C11/5635 , G11C11/5678 , G11C13/0035 , G11C13/0064 , G11C13/0069 , G11C13/0097 , G11C16/10 , G11C16/3459 , G11C29/12015 , G11C29/44 , G11C29/50012
Abstract: A method for data storage includes receiving in a memory device data for storage in a group of memory cells. The data is stored in the group by performing a Program and Verify (P&V) process, which applies to the memory cells in the group a sequence of programming pulses and compares respective analog values of the memory cells in the group to respective verification thresholds. Immediately following successful completion of the P&V process, a mismatch between the stored data and the received data is detected in the memory device. An error in storage of the data is reported responsively to the mismatch.
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