中科微点-全球专利检索

  1. Login
  2. Sign Up

Search Results

12 records (took 0.02 seconds)

    Semiconductor device package and method of manufacturing the same
    1.
    发明授权
    Semiconductor device package and method of manufacturing the same 有权

    公开(公告)号：US11037868B2

    公开(公告)日：2021-06-15

    申请号：US16801061

    申请日：2020-02-25

    Applicant: Advanced Semiconductor Engineering, Inc.

    Inventor： Hui Hua Lee ,  Hui-Ying Hsieh ,  Cheng-Hung Ko ,  Chi-Tsung Chiu

    IPC: H01L23/00 ,  H01L23/31 ,  H01L21/48 ,  H01L21/56 ,  H01L23/495

    Abstract: A semiconductor device package includes a metal carrier, a passive device, a conductive adhesive material, a dielectric layer and a conductive via. The metal carrier has a first conductive pad and a second conductive pad spaced apart from the first conductive pad. The first conductive pad and the second conductive pad define a space therebetween. The passive device is disposed on top surfaces of first conductive pad and the second conductive pad. The conductive adhesive material electrically connects a first conductive contact and a second conductive contact of the passive device to the first conductive pad and the second conductive pad respectively. The dielectric layer covers the metal carrier and the passive device and exposes a bottom surface of the first conductive pad and the second conductive pad. The conductive via extends within the dielectric layer and is electrically connected to the first conductive pad and/or the second conductive pad.

    Semiconductor device package and method of making the same
    5.
    发明授权
    Semiconductor device package and method of making the same 有权
    半导体器件封装及其制造方法

    公开(公告)号：US09564393B1

    公开(公告)日：2017-02-07

    申请号：US14857931

    申请日：2015-09-18

    Applicant: Advanced Semiconductor Engineering, Inc.

    Inventor： Chih-Yi Huang ,  Kuo-Hua Chen ,  Chi-Tsung Chiu

    IPC: H01L23/00 ,  H01L23/498 ,  H01L21/52 ,  H01L21/768

    CPC classification number: H01L23/49844 ,  H01L21/486 ,  H01L21/52 ,  H01L21/76802 ,  H01L21/76877 ,  H01L23/49811 ,  H01L23/49827 ,  H01L23/5389 ,  H01L23/552 ,  H01L24/24 ,  H01L24/82 ,  H01L2224/04105 ,  H01L2224/06181 ,  H01L2224/24226 ,  H01L2224/32225 ,  H01L2224/73267 ,  H01L2224/8203 ,  H01L2224/92244 ,  H01L2924/3025 ,  H01L2924/3511

    Abstract: A semiconductor device package includes a substrate and a semiconductor device disposed on a surface of the substrate. The semiconductor device includes a first contact pad and a second contact pad disposed on an upper surface of the semiconductor device. The semiconductor device package further includes a conductive bar disposed on the first contact pad, and a conductive pillar disposed on the second contact pad. A method of making a semiconductor device package includes (a) providing a substrate; (b) mounting a semiconductor device on the substrate, wherein the semiconductor device comprises a first contact pad and a second contact pad on an upper surface of the semiconductor device; (c) forming a dielectric layer on the substrate to cover the semiconductor device; (d) exposing the second contact pad by forming a hole in the dielectric layer; and (e) applying a conductive material over the dielectric layer and filling the hole.

    Abstract translation: 半导体器件封装包括衬底和设置在衬底的表面上的半导体器件。 半导体器件包括设置在半导体器件的上表面上的第一接触焊盘和第二接触焊盘。 半导体器件封装还包括设置在第一接触焊盘上的导电棒和设置在第二接触焊盘上的导电柱。 制造半导体器件封装的方法包括（a）提供衬底; （b）将半导体器件安装在所述衬底上，其中所述半导体器件包括在所述半导体器件的上表面上的第一接触焊盘和第二接触焊盘; （c）在所述基板上形成电介质层以覆盖所述半导体器件; （d）通过在电介质层中形成一个孔来暴露第二接触垫; 和（e）将导电材料涂覆在电介质层上并填充该孔。

    Semiconductor device package
    6.
    发明授权
    Semiconductor device package 有权

    公开(公告)号：US10707157B2

    公开(公告)日：2020-07-07

    申请号：US15621970

    申请日：2017-06-13

    Applicant: Advanced Semiconductor Engineering, Inc.

    Inventor： Hui Hua Lee ,  Chun Hao Chiu ,  Hui-Ying Hsieh ,  Kuo-Hua Chen ,  Chi-Tsung Chiu

    IPC: H01L23/495 ,  H01L23/00 ,  H01L23/538 ,  H01L23/498 ,  H01L21/48 ,  H01L25/16 ,  H01L25/065

    Abstract: A semiconductor device package includes a first conductive base, a first insulation layer and a second insulation layer. The first conductive base has a first surface, a second surface opposite to the first surface and a lateral surface extended between the first surface and the second surface. The lateral surface includes a first portion adjacent to the first surface and a second portion adjacent to the second surface. The first insulation layer comprises a first insulation material. The first insulation layer has a first surface and a second surface opposite to the first surface. The first insulation layer covers the first portion of the lateral surface of the first conductive base. The second insulation layer comprises a second insulation material and covers the second portion of the lateral surface of the first conductive base. The first insulation material is different from the second insulation material.

Patent Agency Ranking