摘要:
Provided is a process and apparatus characterized by a gas distribution plate in which a gas supply manifold directs gas bubbles from the bottom of a process tank upward and between wafers contained in a cassette and supported therewithin. This improved method and apparatus is used for effectively stripping photoresist from the larger semiconductor wafers having dense top conductive patterns with protuberant sidewalls. The method provides a scrubbing action that is parallel to the device array being formed on the wafer's surface. Broadly stated, the method of a chemical action on large substrates supported adjacent respective edge portions thereof in a carrier includes submerging the carrier and substrates supported thereby in a process tank containing a liquid chemical, and a gas distribution plate disposed on the bottom of the tank for directing gas bubbles upward and parallel to the surfaces of each substrate contained in the carrier to ensure that a uniform chemical action occurs.
摘要:
A process for reducing the surface roughness of a silicon dioxide gate insulator layer, that has been subjected to a boron ion implantation procedure, has been developed. The process features the use of an ammonium hydroxide-hydrogen peroxide solution, applied to the gate insulator layer, to reduce the surface roughness of the gate insulator layer, created by the boron ion implantation procedure. The treatment of the gate insulator layer, in the ammonium hydroxide-hydrogen peroxide solution, results in a surface roughness equivalent to the surface roughness of the gate insulator layer, prior to the boron ion implantation procedure.
摘要:
A rinse tank for rinsing electronic substrates after a chemical process and a method for utilizing such rinse tank are provided. In the rinse tank, devices for performing a quick dump rinse; for performing a cascade overflow rinse and for feeding an inert gas bubbling are provided in the cavity of a single rinse tank. By utilizing the present invention novel rinse tank, the processing problems frequently observed in conventional rinse tanks where two rinse tanks are required for the quick dump rinse and for the cascade overflow rinse, such as particle re-deposition and a large floor space area requirement are eliminated. Furthermore, the wafer rinse process after a metal etching process can be accomplished in a total process time that is at least 2˜3 minutes shorter than that required by using conventional rinse tanks.
摘要:
A new method is provided of treating the wafer prior to the process of singulating the wafer into individual die. A first surface of the wafer over which CMOS image sensor devices have been created is coated with a layer of material that is non-soluble in water. The wafer is attached to a tape by bringing a second surface of the wafer in contact with the tape. The wafer is singulated by approaching the first surface of the wafer and by sawing first through the layer of material that has been coated over the first surface of the wafer and by then sawing through the wafer, stopping at the surface of the tape. A thorough water rinse is applied to the surface of the singulated wafer, followed by a wafer clean applying specific chemicals for this purpose. The singulated die is now removed from the tape and further processed by applying steps of die mount, wire bonding, surrounding the die in a mold compound and marking the package.
摘要:
A transmittance overcoat with effectively planar top surface and specified optical and materials properties is applied above a microlens layer to extend the focal length and enhance the performance of long focal length microlenses for semiconductor array color imaging devices. The geometrical optics design factors and microelectric fabrication sequence to achieve optimized long focal length microlens performance are disclosed. The principal advantages of the adaptive process taught in the present invention is shown to enable real-time compensation adjustments for process and material variations. The overcoat process enables simplified single-layer integrated microlens optics for low-cost, high volume manufacturing of CMOS and CCD color video cameras.
摘要:
A method and apparatus for measuring the vacuum gripping strength of a vacuum wand or robotic arm provides a pressure gauge and a conduit extending from the pressure gauge and terminating at an opening formed in a receiving surface. A vacuum wand head is positioned on the receiving surface such that the gripping surface of the vacuum wand forms a conterminous boundary with the receiving surface and the vacuum port of the vacuum wand is aligned over the opening formed in the receiving surface. The receiving surface replicates a wafer surface so that the same vacuum gripping strength as would be delivered to a wafer being gripped by the vacuum wand, is thereby sensed by the pressure gauge. Spring loaded positioning members act in conjunction with a clamp member and a mechanical stop position the vacuum wand head in the receiving area and over the opening and also to assure that the gripping surface of the vacuum wand head is flush against the surface of the receiving area. Diminution of vacuum gripping strength caused by scratches or other defects of the gripping surface that cause vacuum leaks between gripping surface and the wafer surface, are similarly reproduced and sensed by the pressure gauge.
摘要:
A method of forming a bump structure through the use of an electroplating solution, comprising the following steps. A substrate having an overlying conductive structure is provided. A patterned dry film resist is formed over the conductive structure. The patterned dry film resist having a trench exposing a portion of conductive structure. The patterned dry film resist adhering to the conductive structure at an interface. The structure is treated with a treatment that increases the adherence of the patterned dry film resist to the conductive structure at the interface. A conductive plug is over the exposed portion of the conductive structure within the trench through the use of the electroplating solution. The increased adhesion of the patterned dry film resist to the conductive structure at the interface preventing the electroplating solution from penetrating the interface of the patterned dry film resist and the conductive structure during the formation of the conductive plug. The patterned dry film resist is removed from the conductive structure. The conductive plug is reflowed to form the bump structure.
摘要:
A method of forming a bump on a substrate such as a semiconductor wafer or flip chip. The method includes the step of providing a semiconductor device having a contact pad and an upper passivation layer and an opening formed in the upper passivation layer exposing a portion of the contact pad. An under bump metallurgy is deposited over the upper passivation layer and the contact pad. A first photoresist layer is deposited in a liquid state so that the first photoresist layer covers the under bump metallurgy. A second photoresist layer is deposited and the second photoresist layer is a dry film photoresist. The unexposed portions of the first photoresist layer are removed. The remaining portions of the first photoresist layers are removed. The electrically conductive material is reflown to provide a bump on the semiconductor device.
摘要:
Disclosed is a method and a system for forming alignment marks on a transparent substrate. A light reflective layer is deposited over an optically transparent substrate of a wafer. A region is defined around an alignment mark on the optically transparent substrate. The light reflective layer is removed from a substantial portion of the transparent substrate excluding the region. In addition, a micro electro-mechanical systems device is disclosed. The device comprises an optically transparent substrate, at least one optically partially transparent alignment mark on the optically transparent substrate, and a plurality of reflective elements or imaging pixels attached to the optically transparent substrate.
摘要:
Disclosed is a method and a system for wafer backside alignment. A zero mark patterning on front side of a substrate. A plurality of layers are deposited on the front side of the substrate. The wafer is flipped over with backside of the substrate facing up, and a through wafer etching is performed from the backside to an etch stop layer deposited over the front side of the substrate.