公开(公告)号：US08673759B2

公开(公告)日：2014-03-18

申请号：US13398991

申请日：2012-02-17

申请人： Chris M. Prindle ,  Klaus Hempel ,  Andy C. Wei

发明人： Chris M. Prindle ,  Klaus Hempel ,  Andy C. Wei

IPC分类号： H01L21/28

CPC分类号： H01L21/28114 ,  H01L21/32131 ,  H01L21/32134 ,  H01L21/32135 ,  H01L29/42376 ,  H01L29/51 ,  H01L29/66545

摘要： Semiconductor devices are formed with a gate last, high-K/metal gate process with complete removal of the polysilicon dummy gate and with a gap having a low aspect ratio for the metal fill. Embodiments include forming a dummy gate electrode on a substrate, the dummy gate electrode having a nitride cap, forming spacers adjacent opposite sides of the dummy gate electrode forming a gate trench therebetween, dry etching the nitride cap, tapering the gate trench top corners; performing a selective dry etch on a portion of the dummy gate electrode, and wet etching the remainder of the dummy gate electrode.

摘要翻译： 半导体器件形成有最后的高K /金属栅极工艺，完全去除多晶硅虚拟栅极并且具有用于金属填充物的低纵横比的间隙。 实施例包括在基板上形成虚拟栅电极，虚拟栅电极具有氮化物盖，在虚拟栅电极的相对侧上形成隔板，在其间形成栅极沟槽，干蚀刻氮化物盖，使栅极沟槽顶角逐渐变细; 在虚拟栅电极的一部分上进行选择性干蚀刻，并湿法蚀刻伪栅电极的其余部分。

公开(公告)号：US20130217221A1

公开(公告)日：2013-08-22

申请号：US13398991

申请日：2012-02-17

申请人： Chris M. PRINDLE ,  Klaus Hempel ,  Andy C. Wei

发明人： Chris M. PRINDLE ,  Klaus Hempel ,  Andy C. Wei

IPC分类号： H01L21/28

CPC分类号： H01L21/28114 ,  H01L21/32131 ,  H01L21/32134 ,  H01L21/32135 ,  H01L29/42376 ,  H01L29/51 ,  H01L29/66545

摘要： Semiconductor devices are formed with a gate last, high-K/metal gate process with complete removal of the polysilicon dummy gate and with a gap having a low aspect ratio for the metal fill. Embodiments include forming a dummy gate electrode on a substrate, the dummy gate electrode having a nitride cap, forming spacers adjacent opposite sides of the dummy gate electrode forming a gate trench therebetween, dry etching the nitride cap, tapering the gate trench top corners; performing a selective dry etch on a portion of the dummy gate electrode, and wet etching the remainder of the dummy gate electrode.

摘要翻译： 半导体器件形成有最后的高K /金属栅极工艺，完全去除多晶硅虚拟栅极并且具有用于金属填充物的低纵横比的间隙。 实施例包括在基板上形成虚拟栅电极，虚拟栅电极具有氮化物盖，在虚拟栅电极的相对侧上形成隔板，在其间形成栅极沟槽，干蚀刻氮化物盖，使栅极沟槽顶角逐渐变细; 在虚拟栅电极的一部分上进行选择性干蚀刻，并湿法蚀刻伪栅电极的其余部分。

公开(公告)号：US20120315749A1

公开(公告)日：2012-12-13

申请号：US13154578

申请日：2011-06-07

申请人： Klaus Hempel ,  Andy C. Wei ,  Robert Binder ,  Joachim Metzger

发明人： Klaus Hempel ,  Andy C. Wei ,  Robert Binder ,  Joachim Metzger

IPC分类号： H01L21/336

CPC分类号： H01L29/66545 ,  H01L21/28176 ,  H01L21/28202 ,  H01L29/495 ,  H01L29/4966 ,  H01L29/513 ,  H01L29/518 ,  H01L29/665 ,  H01L29/6659 ,  H01L29/7833

摘要： Generally, the subject matter disclosed herein relates to modern sophisticated semiconductor devices and methods for forming the same, wherein a reduced threshold voltage (Vt) may be achieved in HK/MG transistor elements that are manufactured based on replacement gate electrode integrations. One illustrative method disclosed herein includes forming a first metal gate electrode material layer above a gate dielectric material layer having a dielectric constant of approximately 10 or greater. The method further includes exposing the first metal gate electrode material layer to an oxygen diffusion process, forming a second metal gate electrode material layer above the first metal gate electrode material layer, and adjusting an oxygen concentration gradient and a nitrogen concentration gradient in at least the first metal gate electrode material layer and the gate dielectric material layer.

摘要翻译： 通常，本文公开的主题涉及现代复杂的半导体器件及其形成方法，其中可以在基于替换栅极集成制造的HK / MG晶体管元件中实现降低的阈值电压（Vt）。 本文公开的一种说明性方法包括在介电常数约为10或更大的栅介质材料层上形成第一金属栅电极材料层。 该方法还包括将第一金属栅电极材料层暴露于氧扩散过程，在第一金属栅电极材料层上方形成第二金属栅电极材料层，并且至少在第一金属栅电极材料层上调整氧浓度梯度和氮浓度梯度 第一金属栅电极材料层和栅介质材料层。

公开(公告)号：US08716120B2

公开(公告)日：2014-05-06

申请号：US13489539

申请日：2012-06-06

申请人： Klaus Hempel ,  Andy Wei ,  Martin Mazur

发明人： Klaus Hempel ,  Andy Wei ,  Martin Mazur

IPC分类号： H01L21/3205 ,  H01L21/4763

CPC分类号： H01L21/823842

摘要： When forming sophisticated high-k metal gate electrode structures on the basis of a replacement gate approach, the fill conditions upon filling in the highly conductive electrode metal, such as aluminum, may be enhanced by removing an upper portion of the final work function metal, for instance a titanium nitride material in P-channel transistors. In some illustrative embodiments, the selective removal of the metal-containing electrode material in an upper portion of the gate opening may be accomplished without unduly increasing overall process complexity.

摘要翻译： 当在更换栅极方法的基础上形成复杂的高k金属栅电极结构时，填充高导电电极金属（例如铝）时的填充条件可以通过去除最终功函数金属的上部来增强， 例如P沟道晶体管中的氮化钛材料。 在一些说明性实施例中，可以在门开口的上部中选择性地去除含金属的电极材料，而不会过度增加整个工艺的复杂性。

公开(公告)号：US20130302974A1

公开(公告)日：2013-11-14

申请号：US13466247

申请日：2012-05-08

申请人： Jens Hahn ,  Torsten Huisinga ,  Klaus Hempel ,  Oisin Kenny

发明人： Jens Hahn ,  Torsten Huisinga ,  Klaus Hempel ,  Oisin Kenny

IPC分类号： H01L21/283

CPC分类号： H01L29/66545 ,  H01L21/28088 ,  H01L21/823842

摘要： Generally, the present disclosure is directed to forming conductive metal fill materials in replacement gate electrodes using reduced deposition temperatures. One illustrative method disclosed herein includes, among other things, forming a sacrificial gate structure above a semiconductor layer, the sacrificial gate structure including a dummy gate electrode, and forming a gate cavity by removing at least the dummy gate electrode from above the semiconductor layer. The disclosed method further includes forming a work-function material of a replacement metal gate electrode in the gate cavity, and forming a conductive metal fill material in the gate cavity and above the work-function material, wherein forming the conductive metal fill material includes performing a material deposition process at a temperature below approximately 450° C.

摘要翻译： 通常，本公开涉及使用降低的沉积温度在置换栅电极中形成导电金属填充材料。 本文公开的一种说明性方法包括在半导体层之上形成牺牲栅极结构，牺牲栅极结构包括伪栅电极，以及通过从半导体层上方去除至少虚拟栅极电极而形成栅极腔。 所公开的方法还包括在栅腔中形成替代金属栅电极的功函件材料，并且在栅腔中形成导电金属填充材料并在功函材料之上形成导电金属填充材料，其中形成导电金属填充材料包括执行 在低于约450℃的温度下的材料沉积工艺

公开(公告)号：US08247281B2

公开(公告)日：2012-08-21

申请号：US12822789

申请日：2010-06-24

申请人： Klaus Hempel ,  Patrick Press ,  Vivien Schroeder ,  Berthold Reimer ,  Johannes Groschopf

发明人： Klaus Hempel ,  Patrick Press ,  Vivien Schroeder ,  Berthold Reimer ,  Johannes Groschopf

IPC分类号： H01L21/8238

CPC分类号： H01L21/823425 ,  H01L21/31055 ,  H01L21/31111 ,  H01L21/76825 ,  H01L21/76829 ,  H01L21/7684 ,  H01L21/823412 ,  H01L21/823807 ,  H01L29/7843

摘要： In a replacement gate approach, the sacrificial gate material is exposed on the basis of enhanced process uniformity, for instance during a wet chemical etch step or a CMP process, by forming a modified portion in the interlayer dielectric material by ion implantation. Consequently, the damaged portion may be removed with an increased removal rate while avoiding the creation of polymer contaminants when applying an etch process or avoiding over-polish time when applying a CMP process.

摘要翻译： 在替代栅极方法中，通过例如在湿化学蚀刻步骤或CMP工艺期间，基于增强的工艺均匀性来暴露牺牲栅极材料，通过通过离子注入在层间绝缘材料中形成改性部分。 因此，当应用CMP工艺时，在施加蚀刻工艺或避免过度抛光时间的同时，可以以更高的去除速率去除损坏的部分，同时避免产生聚合物污染物。

公开(公告)号：US20110127590A1

公开(公告)日：2011-06-02

申请号：US12901631

申请日：2010-10-11

申请人： Robert Binder ,  Joachim Metzger ,  Klaus Hempel

发明人： Robert Binder ,  Joachim Metzger ,  Klaus Hempel

IPC分类号： H01L29/772 ,  H01L21/336

CPC分类号： H01L21/28088 ,  H01L21/28247 ,  H01L21/321 ,  H01L29/4966 ,  H01L29/517 ,  H01L29/66545 ,  H01L29/7848

摘要： In a replacement gate approach, the oxygen contents of a cap material may be increased, thereby providing more stable characteristics of the cap material itself and of the high-k dielectric material. Consequently, upon providing a work function adjusting metal species at a very advanced manufacturing stage, corresponding additional treatments may be reduced in number or may even be completely avoided, while at the same time threshold voltage variations may be reduced.

摘要翻译： 在替代栅极方法中，可以增加盖材料的氧含量，从而提供帽材料本身和高k电介质材料的更稳定的特性。 因此，在提供在非常先进的制造阶段调整金属种类的功函数时，相应的附加处理可能数量减少或甚至可以完全避免，同时阈值电压变化可能会降低。

公开(公告)号：US20100244141A1

公开(公告)日：2010-09-30

申请号：US12749112

申请日：2010-03-29

申请人： Sven Beyer ,  Markus Lenski ,  Richard Carter ,  Klaus Hempel

发明人： Sven Beyer ,  Markus Lenski ,  Richard Carter ,  Klaus Hempel

IPC分类号： H01L27/092 ,  H01L21/8234 ,  H01L21/28

CPC分类号： H01L21/823842 ,  H01L21/28088 ,  H01L21/84 ,  H01L29/4966 ,  H01L29/517 ,  H01L29/66545 ,  H01L29/7833

摘要： During the formation of sophisticated gate electrode structures, a replacement gate approach may be applied in which plasma assisted etch processes may be avoided. To this end, one of the gate electrode structures may receive an intermediate etch stop liner, which may allow the replacement of the placeholder material and the adjustment of the work function in a later manufacturing stage. The intermediate etch stop liner may not negatively affect the gate patterning sequence.

摘要翻译： 在复杂的栅电极结构的形成期间，可以应用替代栅极方法，其中可以避免等离子体辅助蚀刻工艺。 为此，栅极电极结构之一可以接收中间蚀刻停止衬垫，其可以允许在稍后的制造阶段更换占位符材料和调整功能。 中间蚀刻停止衬垫可能不会对栅极图案化顺序产生负面影响。

公开(公告)号：US20120282764A1

公开(公告)日：2012-11-08

申请号：US13550435

申请日：2012-07-16

申请人： Klaus Hempel ,  Patrick Press ,  Vivien Schroeder ,  Berthold Reimer ,  Johannes Groschopf

发明人： Klaus Hempel ,  Patrick Press ,  Vivien Schroeder ,  Berthold Reimer ,  Johannes Groschopf

IPC分类号： H01L21/283 ,  H01L21/302

CPC分类号： H01L21/823425 ,  H01L21/31055 ,  H01L21/31111 ,  H01L21/76825 ,  H01L21/76829 ,  H01L21/7684 ,  H01L21/823412 ,  H01L21/823807 ,  H01L29/7843

摘要： In a replacement gate approach, the sacrificial gate material is exposed on the basis of enhanced process uniformity, for instance during a wet chemical etch step or a CMP process, by forming a modified portion in the interlayer dielectric material by ion implantation. Consequently, the damaged portion may be removed with an increased removal rate while avoiding the creation of polymer contaminants when applying an etch process or avoiding over-polish time when applying a CMP process.

摘要翻译： 在替代栅极方法中，通过例如在湿化学蚀刻步骤或CMP工艺期间，基于增强的工艺均匀性来暴露牺牲栅极材料，通过通过离子注入在层间绝缘材料中形成改性部分。 因此，当应用CMP工艺时，在施加蚀刻工艺或避免过度抛光时间的同时，可以以更高的去除速率去除损坏的部分，同时避免产生聚合物污染物。

公开(公告)号：US20110266633A1

公开(公告)日：2011-11-03

申请号：US12963364

申请日：2010-12-08

申请人： Sven Beyer ,  Klaus Hempel ,  Roland Stejskal ,  Andy Wei ,  Thilo Scheiper ,  Andreas Kurz ,  Uwe Griebenow ,  Jan Hoentschel

发明人： Sven Beyer ,  Klaus Hempel ,  Roland Stejskal ,  Andy Wei ,  Thilo Scheiper ,  Andreas Kurz ,  Uwe Griebenow ,  Jan Hoentschel

IPC分类号： H01L27/06 ,  H01L21/02

CPC分类号： H01L23/5252 ,  H01L23/5256 ,  H01L27/0629 ,  H01L29/66545 ,  H01L29/7833 ,  H01L2924/0002 ,  H01L2924/00

摘要： In a replacement gate approach, the semiconductor material or at least a significant portion thereof in a non-transistor structure, such as a precision resistor, an electronic fuse and the like, may be preserved upon replacing the semiconductor material in the gate electrode structures. To this end, an appropriate dielectric material may be provided at least prior to the removal of the semiconductor material in the gate electrode structures, without requiring significant modifications of established replacement gate approaches.

摘要翻译： 在替代栅极方法中，可以在更换栅电极结构中的半导体材料时保留半导体材料或其非晶体管结构中的至少其重要部分，例如精密电阻器，电子熔丝等。 为此，可以至少在去除栅电极结构中的半导体材料之前提供适当的介电材料，而不需要对建立的替代栅极方法进行显着的修改。