Dry etch polysilicon removal for replacement gates
    1.
    发明授权
    Dry etch polysilicon removal for replacement gates 有权
    用于更换浇口的干蚀刻多晶硅去除

    公开(公告)号:US08673759B2

    公开(公告)日:2014-03-18

    申请号:US13398991

    申请日:2012-02-17

    IPC分类号: H01L21/28

    摘要: Semiconductor devices are formed with a gate last, high-K/metal gate process with complete removal of the polysilicon dummy gate and with a gap having a low aspect ratio for the metal fill. Embodiments include forming a dummy gate electrode on a substrate, the dummy gate electrode having a nitride cap, forming spacers adjacent opposite sides of the dummy gate electrode forming a gate trench therebetween, dry etching the nitride cap, tapering the gate trench top corners; performing a selective dry etch on a portion of the dummy gate electrode, and wet etching the remainder of the dummy gate electrode.

    摘要翻译: 半导体器件形成有最后的高K /金属栅极工艺,完全去除多晶硅虚拟栅极并且具有用于金属填充物的低纵横比的间隙。 实施例包括在基板上形成虚拟栅电极,虚拟栅电极具有氮化物盖,在虚拟栅电极的相对侧上形成隔板,在其间形成栅极沟槽,干蚀刻氮化物盖,使栅极沟槽顶角逐渐变细; 在虚拟栅电极的一部分上进行选择性干蚀刻,并湿法蚀刻伪栅电极的其余部分。

    DRY ETCH POLYSILICON REMOVAL FOR REPLACEMENT GATES
    2.
    发明申请
    DRY ETCH POLYSILICON REMOVAL FOR REPLACEMENT GATES 有权
    用于替换盖的干燥多晶硅去除

    公开(公告)号:US20130217221A1

    公开(公告)日:2013-08-22

    申请号:US13398991

    申请日:2012-02-17

    IPC分类号: H01L21/28

    摘要: Semiconductor devices are formed with a gate last, high-K/metal gate process with complete removal of the polysilicon dummy gate and with a gap having a low aspect ratio for the metal fill. Embodiments include forming a dummy gate electrode on a substrate, the dummy gate electrode having a nitride cap, forming spacers adjacent opposite sides of the dummy gate electrode forming a gate trench therebetween, dry etching the nitride cap, tapering the gate trench top corners; performing a selective dry etch on a portion of the dummy gate electrode, and wet etching the remainder of the dummy gate electrode.

    摘要翻译: 半导体器件形成有最后的高K /金属栅极工艺,完全去除多晶硅虚拟栅极并且具有用于金属填充物的低纵横比的间隙。 实施例包括在基板上形成虚拟栅电极,虚拟栅电极具有氮化物盖,在虚拟栅电极的相对侧上形成隔板,在其间形成栅极沟槽,干蚀刻氮化物盖,使栅极沟槽顶角逐渐变细; 在虚拟栅电极的一部分上进行选择性干蚀刻,并湿法蚀刻伪栅电极的其余部分。

    Metal Gate Stack Formation for Replacement Gate Technology
    3.
    发明申请
    Metal Gate Stack Formation for Replacement Gate Technology 有权
    用于替代门技术的金属门堆叠形成

    公开(公告)号:US20120315749A1

    公开(公告)日:2012-12-13

    申请号:US13154578

    申请日:2011-06-07

    IPC分类号: H01L21/336

    摘要: Generally, the subject matter disclosed herein relates to modern sophisticated semiconductor devices and methods for forming the same, wherein a reduced threshold voltage (Vt) may be achieved in HK/MG transistor elements that are manufactured based on replacement gate electrode integrations. One illustrative method disclosed herein includes forming a first metal gate electrode material layer above a gate dielectric material layer having a dielectric constant of approximately 10 or greater. The method further includes exposing the first metal gate electrode material layer to an oxygen diffusion process, forming a second metal gate electrode material layer above the first metal gate electrode material layer, and adjusting an oxygen concentration gradient and a nitrogen concentration gradient in at least the first metal gate electrode material layer and the gate dielectric material layer.

    摘要翻译: 通常,本文公开的主题涉及现代复杂的半导体器件及其形成方法,其中可以在基于替换栅极集成制造的HK / MG晶体管元件中实现降低的阈值电压(Vt)。 本文公开的一种说明性方法包括在介电常数约为10或更大的栅介质材料层上形成第一金属栅电极材料层。 该方法还包括将第一金属栅电极材料层暴露于氧扩散过程,在第一金属栅电极材料层上方形成第二金属栅电极材料层,并且至少在第一金属栅电极材料层上调整氧浓度梯度和氮浓度梯度 第一金属栅电极材料层和栅介质材料层。

    High-k metal gate electrode structures formed by reducing a gate fill aspect ratio in replacement gate technology
    4.
    发明授权
    High-k metal gate electrode structures formed by reducing a gate fill aspect ratio in replacement gate technology 有权
    通过减少替代栅极技术中的栅极填充长宽比形成的高k金属栅电极结构

    公开(公告)号:US08716120B2

    公开(公告)日:2014-05-06

    申请号:US13489539

    申请日:2012-06-06

    IPC分类号: H01L21/3205 H01L21/4763

    CPC分类号: H01L21/823842

    摘要: When forming sophisticated high-k metal gate electrode structures on the basis of a replacement gate approach, the fill conditions upon filling in the highly conductive electrode metal, such as aluminum, may be enhanced by removing an upper portion of the final work function metal, for instance a titanium nitride material in P-channel transistors. In some illustrative embodiments, the selective removal of the metal-containing electrode material in an upper portion of the gate opening may be accomplished without unduly increasing overall process complexity.

    摘要翻译: 当在更换栅极方法的基础上形成复杂的高k金属栅电极结构时,填充高导电电极金属(例如铝)时的填充条件可以通过去除最终功函数金属的上部来增强, 例如P沟道晶体管中的氮化钛材料。 在一些说明性实施例中,可以在门开口的上部中选择性地去除含金属的电极材料,而不会过度增加整个工艺的复杂性。

    REPLACEMENT GATE ELECTRODE FILL AT REDUCED TEMPERATURES
    5.
    发明申请
    REPLACEMENT GATE ELECTRODE FILL AT REDUCED TEMPERATURES 审中-公开
    在降低温度下更换电极电极

    公开(公告)号:US20130302974A1

    公开(公告)日:2013-11-14

    申请号:US13466247

    申请日:2012-05-08

    IPC分类号: H01L21/283

    摘要: Generally, the present disclosure is directed to forming conductive metal fill materials in replacement gate electrodes using reduced deposition temperatures. One illustrative method disclosed herein includes, among other things, forming a sacrificial gate structure above a semiconductor layer, the sacrificial gate structure including a dummy gate electrode, and forming a gate cavity by removing at least the dummy gate electrode from above the semiconductor layer. The disclosed method further includes forming a work-function material of a replacement metal gate electrode in the gate cavity, and forming a conductive metal fill material in the gate cavity and above the work-function material, wherein forming the conductive metal fill material includes performing a material deposition process at a temperature below approximately 450° C.

    摘要翻译: 通常,本公开涉及使用降低的沉积温度在置换栅电极中形成导电金属填充材料。 本文公开的一种说明性方法包括在半导体层之上形成牺牲栅极结构,牺牲栅极结构包括伪栅电极,以及通过从半导体层上方去除至少虚拟栅极电极而形成栅极腔。 所公开的方法还包括在栅腔中形成替代金属栅电极的功函件材料,并且在栅腔中形成导电金属填充材料并在功函材料之上形成导电金属填充材料,其中形成导电金属填充材料包括执行 在低于约450℃的温度下的材料沉积工艺