公开(公告)号：US20140377965A1

公开(公告)日：2014-12-25

申请号：US13921520

申请日：2013-06-19

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Gerard M. Schmid ,  Ji Xu ,  Richard A. Farrell

IPC: H01L21/02

CPC classification number: G03F7/0002 ,  H01L21/0271

Abstract: An illustrative DSA formulation disclosed herein includes a block copolymer material, a casting solvent and at least one plasticizer agent. An illustrative method disclosed herein includes depositing a liquid DSA formulation on a guide layer, performing a spin-coating process to form a DSA-based material layer comprised of the liquid DSA formulation above the guide layer, wherein the DSA-based material layer includes at least one plasticizing agent and, after performing the spin-coating process, performing at least one heating process on the DSA-based material layer while at least some of the plasticizing agent remains in the DSA-based material layer so as to enable phase separation of block copolymer materials.

Abstract translation: 本文公开的说明性DSA制剂包括嵌段共聚物材料，浇铸溶剂和至少一种增塑剂。 本文公开的说明性方法包括在引导层上沉积液体DSA制剂，进行旋涂工艺以形成由引导层上方的液体DSA制剂构成的基于DSA的材料层，其中基于DSA的材料层包括在 至少一种增塑剂，并且在进行旋涂工艺之后，在基于DSA的材料层上进行至少一个加热过程，而至少一些增塑剂保留在基于DSA的材料层中，以使得能够相位分离 嵌段共聚物材料。

公开(公告)号：US08889343B2

公开(公告)日：2014-11-18

申请号：US13726732

申请日：2012-12-26

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Moshe E Preil ,  Gerard M. Schmid ,  Richard A. Farrell ,  Ji Xu ,  Thomas I. Wallow

IPC: G03F7/26 ,  G03F7/20

CPC classification number: G03F7/0002

Abstract: Approaches for utilizing laser annealing to optimize lithographic processes such as directed self assembly (DSA) are provided. Under a typical approach, a substrate (e.g., a wafer) will be subjected to a lithographic process (e.g., having a set of stages/phases, aspects, etc.) such as DSA. Before or during such process, a set of laser annealing passes/scans will be made over the substrate to optimize one or more of the stages. In addition, the substrate could be subjected to additional processes such as hotplate annealing, etc. Still yet, in making a series of laser annealing passes, the techniques utilized and/or beam characteristics of each pass could be varied to further optimize the results.

Abstract translation: 提供了利用激光退火优化光刻工艺的方法，如定向自组装（DSA）。 在典型的方法下，衬底（例如，晶片）将经历诸如DSA的光刻工艺（例如，具有一组阶段/阶段，方面等）。 在此过程之前或期间，将在衬底上进行一组激光退火通过/扫描以优化一个或多个阶段。 此外，可以对基板进行额外的加工，例如热板退火等。然而，在进行一系列激光退火过程中，可以改变所使用的技术和/或每个通过的光束特性以进一步优化结果。

公开(公告)号：US09508562B2

公开(公告)日：2016-11-29

申请号：US14316988

申请日：2014-06-27

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Ji Xu ,  Richard A. Farrell ,  Gerard M. Schmid ,  Moshe E Preil

IPC: H01L21/3213 ,  H01L21/308 ,  H01L21/027 ,  H01L21/033 ,  H01L21/768 ,  H01L21/28 ,  G03F7/00 ,  H01L21/311 ,  C08L53/00 ,  G03F1/00

CPC classification number: H01L21/32139 ,  B81C2201/0198 ,  C08L53/00 ,  C08L53/005 ,  G03F1/00 ,  G03F7/0002 ,  H01L21/0271 ,  H01L21/0273 ,  H01L21/0274 ,  H01L21/0337 ,  H01L21/28123 ,  H01L21/308 ,  H01L21/3081 ,  H01L21/3086 ,  H01L21/31144 ,  H01L21/76816

Abstract: In one example, a method includes forming a template having a plurality of elements above a process layer and forming spacers on sidewalls of the plurality of elements. Portions of the process layer are exposed between adjacent spacers. At least one of the plurality of elements is removed. A mask structure is formed from a directed self-assembly material over the exposed portions. The process layer is patterned using at least the mask structure as an etch mask.

Abstract translation: 在一个示例中，一种方法包括在工艺层上形成具有多个元件的模板，并在多个元件的侧壁上形成间隔物。 处理层的一部分暴露在相邻间隔物之间​​。 去除多个元件中的至少一个。 掩模结构由暴露部分上的定向自组装材料形成。 使用至少掩模结构作为蚀刻掩模对工艺层进行图案化。

公开(公告)号：US09275896B2

公开(公告)日：2016-03-01

申请号：US14341985

申请日：2014-07-28

Applicant: GLOBALFOUNDRIES, Inc.

Inventor： Deniz Elizabeth Civay ,  Ji Xu ,  Gerard Schmid ,  Guillaume Bouche ,  Richard A. Farrell

IPC: H01L21/033 ,  H01L21/768 ,  H01L21/02 ,  H01L21/311 ,  H01L21/027

CPC classification number: H01L21/76802 ,  H01L21/02118 ,  H01L21/0271 ,  H01L21/31133 ,  H01L21/31144 ,  H01L21/76816 ,  H01L21/76879 ,  H01L21/76897

Abstract: Methods for fabricating integrated circuits are provided. In one example, a method for fabricating an integrated circuit includes forming a graphoepitaxy DSA directing confinement well using a sidewall of an etch layer that overlies a semiconductor substrate. The graphoepitaxy DSA directing confinement well is filled with a block copolymer. The block copolymer is phase separated into an etchable phase and an etch resistant phase. The etchable phase is etched while leaving the etch resistant phase substantially in place to define an etch mask with a nanopattern. The nanopattern is transferred to the etch layer.

Abstract translation: 提供了制造集成电路的方法。 在一个示例中，用于制造集成电路的方法包括使用覆盖在半导体衬底上的蚀刻层的侧壁来形成引导限制阱的图形外延生成DSA。 使用嵌段共聚物填充指向封闭的石墨电极DSA。 嵌段共聚物被相分离成可蚀刻相和耐蚀刻相。 蚀刻相位被蚀刻，同时使耐腐蚀相位基本上到位以限定具有纳米图案的蚀刻掩模。 将纳米图案转移到蚀刻层。

公开(公告)号：US20150380252A1

公开(公告)日：2015-12-31

申请号：US14316988

申请日：2014-06-27

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Ji Xu ,  Richard A. Farrell ,  Gerard M. Schmid ,  Moshe E. Preil

IPC: H01L21/28 ,  H01L21/3213

CPC classification number: H01L21/32139 ,  B81C2201/0198 ,  C08L53/00 ,  C08L53/005 ,  G03F1/00 ,  G03F7/0002 ,  H01L21/0271 ,  H01L21/0273 ,  H01L21/0274 ,  H01L21/0337 ,  H01L21/28123 ,  H01L21/308 ,  H01L21/3081 ,  H01L21/3086 ,  H01L21/31144 ,  H01L21/76816

Abstract: In one example, a method includes forming a template having a plurality of elements above a process layer and forming spacers on sidewalls of the plurality of elements. Portions of the process layer are exposed between adjacent spacers. At least one of the plurality of elements is removed. A mask structure is formed from a directed self-assembly material over the exposed portions. The process layer is patterned using at least the mask structure as an etch mask.

Abstract translation: 在一个示例中，一种方法包括在工艺层上形成具有多个元件的模板，并在多个元件的侧壁上形成间隔物。 处理层的一部分暴露在相邻间隔物之间​​。 去除多个元件中的至少一个。 掩模结构由暴露部分上的定向自组装材料形成。 使用至少掩模结构作为蚀刻掩模对工艺层进行图案化。

公开(公告)号：US08790522B1

公开(公告)日：2014-07-29

申请号：US13764051

申请日：2013-02-11

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Gerard M. Schmid ,  Richad A. Farrell ,  Ji Xu ,  Jason R. Cantone ,  Moshe E. Preil

IPC: H01B13/00

CPC classification number: B44C1/227 ,  H01L21/0337

Abstract: A method includes forming a chemical guide layer above a process layer. A template having a plurality of elements is formed above the process layer. The chemical guide layer is disposed on at least portions of the process layer disposed between adjacent elements of the template. A directed self-assembly layer is formed over the chemical guide layer. The directed self-assembly layer has alternating etchable components and etch-resistant components. The etchable components of the directed self-assembly layer are removed. The process layer is patterned using the template and the etch-resistant components of the directed self-assembly layer as an etch mask.

Abstract translation: 一种方法包括在处理层之上形成化学引导层。 具有多个元件的模板形成在处理层的上方。 化学引导层设置在设置在模板的相邻元件之间的处理层的至少一部分上。 导向的自组装层形成在化学引导层上。 定向自组装层具有交替的可蚀刻部件和耐蚀刻部件。 去除了定向自组装层的可蚀刻部件。 使用模板和定向自组装层的耐蚀刻部件作为蚀刻掩模对工艺层进行图案化。

公开(公告)号：US20140154630A1

公开(公告)日：2014-06-05

申请号：US13693627

申请日：2012-12-04

Applicant: GLOBALFOUNDRIES INC.

Inventor： Gerard M. Schmid ,  Richad A. Farrell ,  Ji Xu ,  Jason R. Cantone ,  Moshe E. Preil

IPC: G03F7/20

CPC classification number: G03F7/0002

Abstract: A method includes forming a template having a plurality of elements above a process layer, wherein portions of the process layer are exposed between adjacent elements of the template. A directed self-assembly layer is formed over the exposed portions. The directed self-assembly layer has alternating etchable components and etch-resistant components. The etchable components of the directed self-assembly layer are removed. The process layer is patterned using the template and the etch-resistant components of the directed self-assembly layer. Non-periodic elements are defined in the process later by the template and periodic elements are defined in the process layer by the etch-resistant components of the directed self-assembly layer.

Abstract translation: 一种方法包括在处理层之上形成具有多个元素的模板，其中处理层的部分在模板的相邻元素之间露出。 在暴露部分上形成定向的自组装层。 定向自组装层具有交替的可蚀刻部件和耐蚀刻部件。 去除了定向自组装层的可蚀刻部件。 使用模板和定向自组装层的耐蚀刻部件对工艺层进行图案化。 非周期元素在该过程中由模板定义，并且周期元素由定向自组装层的耐蚀刻部件在工艺层中定义。

公开(公告)号：US09613807B2

公开(公告)日：2017-04-04

申请号：US14692359

申请日：2015-04-21

Applicant: GLOBALFOUNDRIES, Inc.

Inventor： Ji Xu ,  Gerard Schmid ,  Richard A. Farrell

IPC: H01L21/02 ,  H01L21/033 ,  H01L21/027

CPC classification number: H01L21/0337 ,  H01L21/02118 ,  H01L21/0271 ,  H01L21/0274

Abstract: Methods for directed self-assembly (DSA) using chemoepitaxy in the design and fabrication of integrated circuits are disclosed herein. An exemplary method includes forming an A or B-block attracting layer over a base semiconductor layer, forming a trench in the A or B-block attracting layer to expose a portion of the base semiconductor layer, and forming a neutral brush or mat or SAMs layer coating within the trench and over the base semiconductor layer. The method further includes forming a block copolymer layer over the neutral layer coating and over the A or B-block attracting layer and annealing the block copolymer layer to form a plurality of vertically-oriented, cylindrical structures within the block copolymer layer.

公开(公告)号：US08956808B2

公开(公告)日：2015-02-17

申请号：US13693627

申请日：2012-12-04

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Gerard M. Schmid ,  Richad A. Farrell ,  Ji Xu ,  Jason R. Cantone ,  Moshe E. Preil

IPC: G03F7/26 ,  G03F7/20

CPC classification number: G03F7/0002

Abstract: A method includes forming a template having a plurality of elements above a process layer, wherein portions of the process layer are exposed between adjacent elements of the template. A directed self-assembly layer is formed over the exposed portions. The directed self-assembly layer has alternating etchable components and etch-resistant components. The etchable components of the directed self-assembly layer are removed. The process layer is patterned using the template and the etch-resistant components of the directed self-assembly layer. Non-periodic elements are defined in the process later by the template and periodic elements are defined in the process layer by the etch-resistant components of the directed self-assembly layer.

Abstract translation: 一种方法包括在处理层之上形成具有多个元素的模板，其中处理层的部分在模板的相邻元素之间露出。 在暴露部分上形成定向的自组装层。 定向自组装层具有交替的可蚀刻部件和耐蚀刻部件。 去除了定向自组装层的可蚀刻部件。 使用模板和定向自组装层的耐蚀刻部件对工艺层进行图案化。 非周期元素在该过程中由模板定义，并且周期元素由定向自组装层的耐蚀刻部件在工艺层中定义。

公开(公告)号：US20140224764A1

公开(公告)日：2014-08-14

申请号：US13764051

申请日：2013-02-11

Applicant: GLOBALFOUNDRIES INC.

Inventor： Gerard M. Schmid ,  Richad A. Farrell ,  Ji Xu ,  Jason R. Cantone ,  Moshe E. Preil

IPC: B44C1/22

CPC classification number: B44C1/227 ,  H01L21/0337

Abstract: A method includes forming a chemical guide layer above a process layer. A template having a plurality of elements is formed above the process layer. The chemical guide layer is disposed on at least portions of the process layer disposed between adjacent elements of the template. A directed self-assembly layer is formed over the chemical guide layer. The directed self-assembly layer has alternating etchable components and etch-resistant components. The etchable components of the directed self-assembly layer are removed. The process layer is patterned using the template and the etch-resistant components of the directed self-assembly layer as an etch mask.

Abstract translation: 一种方法包括在处理层之上形成化学引导层。 具有多个元件的模板形成在处理层的上方。 化学引导层设置在设置在模板的相邻元件之间的处理层的至少一部分上。 导向的自组装层形成在化学引导层上。 定向自组装层具有交替的可蚀刻部件和耐蚀刻部件。 去除了定向自组装层的可蚀刻部件。 使用模板和定向自组装层的耐蚀刻部件作为蚀刻掩模对工艺层进行图案化。