公开(公告)号：US20230395539A1

公开(公告)日：2023-12-07

申请号：US18235585

申请日：2023-08-18

Applicant: Infineon Technologies AG

Inventor： Evelyn Napetschnig ,  Jens Brandenburg ,  Christoffer Erbert ,  Joachim Hirschler ,  Oliver Humbel ,  Thomas Rupp ,  Carsten Schaeffer ,  Julia Zischang

IPC: H01L23/00 ,  H01L23/485 ,  H01L23/532

CPC classification number: H01L24/05 ,  H01L23/485 ,  H01L23/53219 ,  H01L23/53233

Abstract: A method of manufacturing a semiconductor device includes forming a wiring metal layer structure; forming a dielectric layer structure arranged directly on the wiring metal layer structure; and forming a bonding pad metal layer structure arranged, at least partially, directly on the dielectric layer structure, wherein a layer thickness of the dielectric layer structure ranges from 1% to 30% of a layer thickness of the wiring metal layer structure, wherein the wiring metal layer structure and the bonding pad metal structure are electrically connected through openings in the dielectric layer structure.

公开(公告)号：US20220059477A1

公开(公告)日：2022-02-24

申请号：US17400303

申请日：2021-08-12

Applicant: Infineon Technologies AG

Inventor： Evelyn Napetschnig ,  Jens Brandenburg ,  Christoffer Erbert ,  Joachim Hirschler ,  Oliver Humbel ,  Thomas Rupp ,  Carsten Schaeffer ,  Julia Zischang

IPC: H01L23/00 ,  H01L23/532 ,  H01L23/485

Abstract: A semiconductor device is proposed. The semiconductor device includes a wiring metal layer structure. The semiconductor device further includes a dielectric layer structure arranged directly on the wiring metal layer structure. The semiconductor device further includes a bonding pad metal layer structure arranged, at least partly, directly on the dielectric layer structure. A layer thickness of the dielectric layer structure ranges from 1% to 30% of a layer thickness of the wiring metal layer structure. The wiring metal layer structure and the bonding pad metal structure are electrically connected through openings in the dielectric layer structure.

公开(公告)号：US20190385842A1

公开(公告)日：2019-12-19

申请号：US16426051

申请日：2019-05-30

Applicant: Infineon Technologies AG

Inventor： Joachim Hirschler ,  Georg Ehrentraut ,  Christoffer Erbert ,  Klaus Goeschl ,  Markus Heinrici ,  Michael Hutzler ,  Wolfgang Koell ,  Stefan Krivec ,  Ingmar Neumann ,  Mathias Plappert ,  Michael Roesner ,  Olaf Storbeck

IPC: H01L21/02 ,  H01L21/28 ,  H01L21/18 ,  H01L29/49 ,  H01L29/51

Abstract: In one aspect, a method of forming a silicon-insulator layer is provided. The method includes arranging a silicon structure in a plasma etch process chamber and applying a plasma to the silicon structure in the plasma etch process chamber at a temperature of the silicon structure equal to or below 100° C. The plasma includes a component and a halogen derivate, thereby forming the silicon-insulator layer. The silicon-insulator layer includes silicon and the component. In another aspect, a semiconductor device is provided having a silicon-insulator layer formed by the method.

公开(公告)号：US11195713B2

公开(公告)日：2021-12-07

申请号：US16426051

申请日：2019-05-30

Applicant: Infineon Technologies AG

Inventor： Joachim Hirschler ,  Georg Ehrentraut ,  Christoffer Erbert ,  Klaus Goeschl ,  Markus Heinrici ,  Michael Hutzler ,  Wolfgang Koell ,  Stefan Krivec ,  Ingmar Neumann ,  Mathias Plappert ,  Michael Roesner ,  Olaf Storbeck

IPC: H01L21/02 ,  H01L29/51 ,  H01L21/28 ,  H01L21/18 ,  H01L29/49

Abstract: In one aspect, a method of forming a silicon-insulator layer is provided. The method includes arranging a silicon structure in a plasma etch process chamber and applying a plasma to the silicon structure in the plasma etch process chamber at a temperature of the silicon structure equal to or below 100° C. The plasma includes a component and a halogen derivate, thereby forming the silicon-insulator layer. The silicon-insulator layer includes silicon and the component. In another aspect, a semiconductor device is provided having a silicon-insulator layer formed by the method.

公开(公告)号：US09905147B2

公开(公告)日：2018-02-27

申请号：US14832506

申请日：2015-08-21

Applicant: Infineon Technologies AG

Inventor： Joachim Hirschler ,  Johann Schmid

IPC: G09G3/20 ,  G06F3/01 ,  G09G5/391 ,  G09G3/00 ,  G02B27/02

CPC classification number: G09G3/2007 ,  G02B27/026 ,  G06F3/013 ,  G09G3/003 ,  G09G5/391 ,  G09G2354/00

Abstract: A display device is provided. The display device comprises a display comprising a plurality of pixels arranged in a display plane. The display device is configured to determine a virtual plane at which a long-sighted user of the display device who is looking at the display sees sharp. Further, the display device is configured to determine a first contiguous group of pixels of the display which are located within a first optical path from a first virtual pixel of the virtual plane to an eye of the long-sighted user, and to determine a second contiguous group of pixels of the display which are located within a second optical path from a second virtual pixel of the virtual plane to the eye of the long-sighted user.

公开(公告)号：US20150279740A1

公开(公告)日：2015-10-01

申请号：US14226666

申请日：2014-03-26

Applicant: Infineon Technologies AG

Inventor： Michael Roesner ,  Manfred Engelhardt ,  Johann Schmid ,  Gudrun Stranzl ,  Joachim Hirschler

IPC: H01L21/78 ,  H01L21/768

CPC classification number: H01L21/7806 ,  H01L21/02057 ,  H01L21/31133 ,  H01L21/31138 ,  H01L21/76879 ,  H01L21/76898 ,  H01L21/78 ,  H01L24/32 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2924/10157 ,  H01L2924/12042 ,  H01L2924/12044 ,  H01L2924/00014 ,  H01L2924/00

Abstract: In accordance with an embodiment of the present invention, a method of forming a semiconductor device includes attaching a substrate to a carrier using an adhesive component and forming a through trench through the substrate to expose the adhesive component. At least a portion of the adhesive component is etched and a metal layer is formed over sidewalls of the through trench.

Abstract translation: 根据本发明的实施例，一种形成半导体器件的方法包括：使用粘合剂组件将衬底附着到载体上，并通过衬底形成通孔以暴露粘合剂组分。 蚀刻粘合剂组分的至少一部分，并且在通孔的侧壁上形成金属层。

公开(公告)号：US09673096B2

公开(公告)日：2017-06-06

申请号：US14541239

申请日：2014-11-14

Applicant: INFINEON TECHNOLOGIES AG

Inventor： Joachim Hirschler ,  Michael Roesner ,  Markus Juch Heinrici ,  Gudrun Stranzl ,  Martin Mischitz ,  Martin Zgaga

IPC: H01L21/78 ,  H01L21/288 ,  H01L21/3213 ,  H01L21/683 ,  H01L23/00

CPC classification number: H01L21/78 ,  H01L21/288 ,  H01L21/3213 ,  H01L21/6835 ,  H01L23/562 ,  H01L24/03 ,  H01L24/05 ,  H01L24/06 ,  H01L24/94 ,  H01L24/95 ,  H01L2221/68327 ,  H01L2221/68363 ,  H01L2221/68368 ,  H01L2224/03002 ,  H01L2224/03005 ,  H01L2224/03009 ,  H01L2224/0332 ,  H01L2224/0345 ,  H01L2224/03452 ,  H01L2224/03464 ,  H01L2224/03505 ,  H01L2224/03848 ,  H01L2224/039 ,  H01L2224/05794 ,  H01L2224/05847 ,  H01L2224/06181 ,  H01L2224/94 ,  H01L2224/95 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2224/03 ,  H01L2221/68381

Abstract: According to various embodiments, a method for processing a semiconductor substrate may include: covering a plurality of die regions of the semiconductor substrate with a metal; forming a plurality of dies from the semiconductor substrate, wherein each die of the plurality of dies is covered with the metal; and, subsequently, annealing the metal covering at least one die of the plurality of dies.

公开(公告)号：US20150356907A1

公开(公告)日：2015-12-10

申请号：US14832506

申请日：2015-08-21

Applicant: Infineon Technologies AG

Inventor： Joachim Hirschler ,  Johann Schmid

IPC: G09G3/20 ,  G06F3/01

CPC classification number: G09G3/2007 ,  G02B27/026 ,  G06F3/013 ,  G09G3/003 ,  G09G5/391 ,  G09G2354/00

Abstract: A display device is provided. The display device comprises a display comprising a plurality of pixels arranged in a display plane. The display device is configured to determine a virtual plane at which a long-sighted user of the display device who is looking at the display sees sharp. Further, the display device is configured to determine a first contiguous group of pixels of the display which are located within a first optical path from a first virtual pixel of the virtual plane to an eye of the long-sighted user, and to determine a second contiguous group of pixels of the display which are located within a second optical path from a second virtual pixel of the virtual plane to the eye of the long-sighted user.

Abstract translation: 提供显示装置。 显示装置包括显示器，其包括布置在显示平面中的多个像素。 显示装置被配置为确定正在看待显示器的显示装置的长视用户看起来很明显的虚拟平面。 此外，显示设备被配置为确定显示器的位于从虚拟平面的第一虚拟像素到远视用户的眼睛的第一光路内的第一连续的像素组，并且确定第二 显示器的连续的像素组位于从虚拟平面的第二虚拟像素到远视用户的眼睛的第二光路内。

公开(公告)号：US20140335700A1

公开(公告)日：2014-11-13

申请号：US13892003

申请日：2013-05-10

Applicant: Infineon Technologies AG

Inventor： Guenter Denifl ,  Markus Kahn ,  Helmut Schoenherr ,  Daniel Maurer ,  Thomas Grille ,  Joachim Hirschler ,  Ursula Hedenig ,  Roland Moennich ,  Matthias Kuenle

IPC: H01L21/02 ,  C23C16/26

CPC classification number: H01L21/02115 ,  C23C16/26 ,  C23C16/56 ,  H01L21/02164 ,  H01L21/0217 ,  H01L21/022 ,  H01L21/02263 ,  H01L21/02274 ,  H01L21/02304 ,  H01L21/02362

Abstract: Carbon layers with reduced hydrogen content may be deposited by plasma-enhanced chemical vapor deposition by selecting processing parameters accordingly. Such carbon layers may be subjected to high temperature processing without showing excessive shrinking.

Abstract translation: 通过选择相应的处理参数，可以通过等离子体增强化学气相沉积来沉积具有降低的氢含量的碳层。 这样的碳层可以经受高温处理而不会显着过度收缩。

公开(公告)号：US20140265098A1

公开(公告)日：2014-09-18

申请号：US13833616

申请日：2013-03-15

Applicant: INFINEON TECHNOLOGIES AG

Inventor： Christian Himmelsbach ,  Joachim Hirschler ,  Helmut Brunner

IPC: B23Q7/00

CPC classification number: B23Q7/005 ,  H01L21/68742

Abstract: Lift pins and devices having lift pins are provided. According to an aspect, a lift pin may have a tapered distal portion. According to another aspect, a lift pin may have two portions threadedly engaged with each other. According to yet another aspect, a lift pin may be mounted to a lifting plate with slackness.

Abstract translation: 提供具有升降销的提升销和装置。 根据一方面，提升销可以具有锥形远端部分。 根据另一方面，提升销可以具有彼此螺纹接合的两个部分。 根据另一方面，提升销可以以松弛的方式安装到提升板上。