公开(公告)号：US11588454B2

公开(公告)日：2023-02-21

申请号：US16925948

申请日：2020-07-10

Applicant: Intel Corporation

Inventor： Nicholas P. Cowley ,  Isaac Ali ,  William L. Barber

IPC: H03F3/24 ,  H03G3/30 ,  H03F1/02 ,  H03G3/20

Abstract: Various embodiments are directed to apparatuses and methods to generate a first signal representing modulation data and a second signal representing an amplitude of the modulation data, the first signal and the second signal to depend on an output signal and vary a power supply voltage to a gain stage in proportion to the amplitude of the modulation data.

公开(公告)号：US11037896B2

公开(公告)日：2021-06-15

申请号：US16216881

申请日：2018-12-11

Applicant: Intel Corporation

Inventor： Kevin J. Lee ,  Ruchir Saraswat ,  Uwe Zillmann ,  Nicholas P. Cowley ,  Richard J. Goldman

IPC: H01L23/00 ,  H01L23/48 ,  H01L23/522 ,  H01L23/66 ,  G06F1/16 ,  H01F27/28 ,  H01L23/64 ,  H03H7/42 ,  H03H9/64 ,  H01L23/525

Abstract: Described is an apparatus which comprises: a backside of a first die having a redistribution layer (RDL); and one or more passive planar devices disposed on the backside, the one or more passive planar devices formed in the RDL.

公开(公告)号：US10683189B2

公开(公告)日：2020-06-16

申请号：US15190848

申请日：2016-06-23

Applicant: Intel Corporation

Inventor： Ruchir Saraswat ,  Nicholas P. Cowley ,  Richard J. Goldman

IPC: B66B1/18 ,  B66B1/28 ,  B66B1/34

Abstract: Processes, apparatuses, and systems associated with usage and contextual-based elevator operations management that have the capability to learn and to constantly adapt to usage patterns on a temporal basis through continuous monitoring of elevator journeys. An elevator journey may include a start and termination floor for an individual. Elevator journey data may be used to predict patterns of usage and maybe used, for example, to optimize the number of elevators operational at any time, determine the optimal parking position of each elevator, and/or determine an efficient allocation of elevators to groups or related floors.

公开(公告)号：US10568530B2

公开(公告)日：2020-02-25

申请号：US14752881

申请日：2015-06-27

Applicant: Intel Corporation

Inventor： Craig P. Finlinson ,  Mohammad U. Abbasi ,  Nicholas P. Cowley ,  Mark S. Mudd

IPC: A61B5/00 ,  A61B5/024 ,  G01J1/44 ,  G11C27/02

Abstract: Described is an apparatus which comprises: a source to generate a first current having AC and DC components; a current-to-voltage converter to convert the first current or a copy of the first current to a first voltage proportional to a resistance, the first voltage having AC and DC components that correspond to the AC and DC components of the first current; a sample-and-hold circuit to filter the AC component from the first voltage and for providing an output voltage with the DC component; and an amplifier to receive the output voltage.

公开(公告)号：US10455308B2

公开(公告)日：2019-10-22

申请号：US15502495

申请日：2014-09-17

Applicant: Intel Corporation

Inventor： Kevin J. Lee ,  Ruchir Saraswat ,  Uwe Zillmann ,  Valluri Bob Rao ,  Tor Lund-Larsen ,  Nicholas P. Cowley

IPC: H04R19/04 ,  H04R1/04 ,  B81B7/02 ,  H01L23/00 ,  H01L21/683 ,  H01L23/48 ,  B81C1/00 ,  H01L21/768 ,  H04R1/40 ,  H04R19/00

Abstract: Embodiments of the present disclosure describe a die with integrated microphone device using through-silicon vias (TSVs) and associated techniques and configurations. In one embodiment, an apparatus includes an apparatus comprising a semiconductor substrate having a first side and a second side disposed opposite to the first side, an interconnect layer formed on the first side of the semiconductor substrate, a through-silicon via (TSV) formed through the semiconductor substrate and configured to route electrical signals between the first side of the semiconductor substrate and the second side of the semiconductor substrate, and a microphone device formed on the second side of the semiconductor substrate and electrically coupled with the TSV. Other embodiments may be described and/or claimed.

公开(公告)号：US10070816B2

公开(公告)日：2018-09-11

申请号：US14481375

申请日：2014-09-09

Applicant: Intel Corporation

Inventor： Nicholas P. Cowley ,  Ruchir Saraswat ,  Richard J. Goldman

IPC: A61B5/00 ,  A61B5/103 ,  A43B3/00 ,  A61B5/11

CPC classification number: A61B5/6807 ,  A43B3/0005 ,  A43B17/00 ,  A61B5/1038 ,  A61B5/112 ,  A61B2560/0214 ,  A61B2562/0247 ,  A61B2562/028 ,  A61B2562/12 ,  A61B2562/164 ,  A61B2562/166 ,  A61B2562/187

Abstract: Embodiments of the present disclosure provide techniques and configurations for an orthotic device. In one instance, the device may include an orthotic device body and at least two sensors spatially disposed inside the orthotic device body. A first sensor may provide a first output responsive to pressure resulting from application of mechanical force to the orthotic device body. A second sensor may provide a second output responsive to flexing resulting from the application of mechanical force to the orthotic device body. The device may also include a control unit communicatively coupled with the sensors to receive and process the outputs provided by the sensors in response to pressure and flexing. Other embodiments may be described and/or claimed.

公开(公告)号：US09911689B2

公开(公告)日：2018-03-06

申请号：US15038623

申请日：2013-12-23

Applicant: INTEL CORPORATION

Inventor： Kevin J. Lee ,  Ruchir Saraswat ,  Uwe Zillmann ,  Nicholas P. Cowley ,  Andre Schaefer ,  Rinkle Jain ,  Guido Droege

IPC: H01L21/48 ,  H01L23/522 ,  H01L21/768 ,  H01L49/02 ,  H01L25/065 ,  H01L23/48 ,  H01L21/822 ,  H01L23/492 ,  H01L23/498 ,  H01L27/06

CPC classification number: H01L23/5223 ,  H01L21/4846 ,  H01L21/486 ,  H01L21/4875 ,  H01L21/76898 ,  H01L21/8221 ,  H01L23/481 ,  H01L23/492 ,  H01L23/498 ,  H01L23/49827 ,  H01L23/49838 ,  H01L23/49894 ,  H01L25/0657 ,  H01L27/0629 ,  H01L28/90 ,  H01L2225/06544 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Techniques are disclosed for forming a through-body-via (TBV) isolated coaxial capacitor in a semiconductor die. In some embodiments, a cylindrical capacitor provided using the disclosed techniques may include, for example, a conductive TBV surrounded by a dielectric material and an outer conductor plate. The TBV and outer plate can be formed, for example, so as to be self-aligned with one another in a coaxial arrangement, in accordance with some embodiments. The disclosed capacitor may extend through the body of a host die such that its terminals are accessible on the upper and/or lower surfaces thereof. Thus, in some cases, the host die can be electrically connected with another die to provide a die stack or other three-dimensional integrated circuit (3D IC), in accordance with some embodiments. In some instances, the disclosed capacitor can be utilized, for example, to provide integrated capacitance in a switched-capacitor voltage regulator (SCVR).

公开(公告)号：US20160241223A1

公开(公告)日：2016-08-18

申请号：US15019764

申请日：2016-02-09

Applicant: Intel Corporation

Inventor： Nicholas P. Cowley ,  Chi Man Kan ,  Ruchir Saraswat

IPC: H03K5/13 ,  H03L7/097

CPC classification number: H03K5/13 ,  H03D13/003 ,  H03K2005/00019 ,  H03L7/097 ,  H04B3/146 ,  H04L1/205

Abstract: Embodiments include apparatuses, methods, and systems for jitter equalization and phase error detection. In embodiments, a communication circuit may include a data path to pass a data signal and a clock path to pass a clock signal. A jitter equalizer may be coupled with the data path and/or clock path to provide a programmable delay to the data signal and/or clock signal, respectively. The delay may be determined by a training process in which a supply voltage may be modulated by a modulation frequency. The delay may be dependent on a value of the supply voltage, such as a voltage level and/or jitter frequency component of the supply voltage. A phase error detector is also described that may be used with the communication circuit and/or other embodiments.

Abstract translation: 实施例包括用于抖动均衡和相位误差检测的装置，方法和系统。 在实施例中，通信电路可以包括用于传递数据信号和时钟路径以传递时钟信号的数据路径。 抖动均衡器可以与数据路径和/或时钟路径耦合以分别向数据信号和/或时钟信号提供可编程延迟。 可以通过训练处理来确定延迟，其中可以通过调制频率来调制电源电压。 延迟可以取决于电源电压的值，例如电源电压的电压电平和/或抖动频率分量。 还描述了可以与通信电路和/或其他实施例一起使用的相位误差检测器。

公开(公告)号：US10715092B2

公开(公告)日：2020-07-14

申请号：US16251476

申请日：2019-01-18

Applicant: INTEL CORPORATION

Inventor： Nicholas P. Cowley ,  Isaac Ali ,  William L. Barber

IPC: H03F3/24 ,  H03G3/30 ,  H03F1/02 ,  H03G3/20

Abstract: Various embodiments are directed to apparatuses and methods to generate a first signal representing modulation data and a second signal representing an amplitude of the modulation data, the first signal and the second signal to depend on an output signal and vary a power supply voltage to a gain stage in proportion to the amplitude of the modulation data.

公开(公告)号：US10290598B2

公开(公告)日：2019-05-14

申请号：US15323521

申请日：2014-08-07

Applicant: Intel Corporation

Inventor： Kevin J. Lee ,  Ruchir Saraswat ,  Uwe Zillmann ,  Nicholas P. Cowley ,  Richard J. Goldman

IPC: H01L23/00 ,  H01F27/28 ,  G06F1/16 ,  H01L23/64 ,  H01L23/522 ,  H03H9/64 ,  H03H7/42 ,  H01L23/48 ,  H01L23/66 ,  H01L23/525

Abstract: Described is an apparatus which comprises: a backside of a first die having a redistribution layer (RDL); and one or more passive planar devices disposed on the backside, the one or more passive planar devices formed in the RDL.