公开(公告)号：US20160139038A1

公开(公告)日：2016-05-19

申请号：US14547908

申请日：2014-11-19

Applicant: NXP B.V.

Inventor： Marten Oldsen ,  Erik Jan Lous ,  Agata Sakic

IPC: G01N21/3504 ,  G01J3/45 ,  G01J3/26

CPC classification number: G01N21/3504 ,  G01J3/26 ,  G01J3/42 ,  G01N21/0303 ,  G01N21/031 ,  G01N21/3577 ,  G01N21/45 ,  G01N21/61 ,  G01N2021/0389 ,  G01N2021/056 ,  G01N2021/451 ,  G02B5/284 ,  G02B5/286

Abstract: One example discloses an interferometer device, including: a first side, having a first reflectivity; a second side, having a second reflectivity; a cavity disposed between the first and second sides, and having an opening configured to receive a substance; an electromagnetic source input region configured to receive an electromagnetic signal; and an electromagnetic detector output region configured to output the electromagnetic signal modulated in response to the substance in the cavity. Another example discloses a method including: fabricating a first side, having a first reflectivity; fabricating a second side, having a second reflectivity and positioned with respect to the first side so as to form a cavity; fabricating an opening configured to receive a substance; fabricating an electromagnetic source input region configured to receive an electromagnetic signal; and fabricating an electromagnetic detector output region configured to output the electromagnetic signal modulated in response to the substance in the cavity.

Abstract translation: 一个实例公开了一种干涉仪装置，包括：第一侧，具有第一反射率; 第二侧，具有第二反射率; 设置在所述第一和第二侧之间的腔，并且具有构造成接收物质的开口; 被配置为接收电磁信号的电磁源输入区域; 以及电磁检测器输出区域，被配置为输出响应于所述空腔中的物质调制的电磁信号。 另一个实例公开了一种方法，包括：制造具有第一反射率的第一侧; 制造第二侧，具有第二反射率并相对于第一侧定位以形成空腔; 制造构造成接收物质的开口; 制造被配置为接收电磁信号的电磁源输入区域; 以及制造电磁检测器输出区域，所述电磁检测器输出区域被配置为输出响应于所述空腔中的物质调制的电磁信号。

公开(公告)号：US20150279803A1

公开(公告)日：2015-10-01

申请号：US14229717

申请日：2014-03-28

Applicant: NXP B.V.

Inventor： Leonardus Antonius Elisabeth van Gemert ,  Coenraad Cornelis Tak ,  Marten Oldsen ,  Hendrik Bouman

IPC: H01L23/00

CPC classification number: H01L24/17 ,  B81B7/0048 ,  B81B7/007 ,  H01L24/11 ,  H01L24/14 ,  H01L24/73 ,  H01L2224/10135 ,  H01L2224/10165 ,  H01L2224/131 ,  H01L2224/1329 ,  H01L2224/13339 ,  H01L2224/1401 ,  H01L2224/14134 ,  H01L2224/16238 ,  H01L2224/1701 ,  H01L2224/26165 ,  H01L2224/26175 ,  H01L2224/29013 ,  H01L2224/29035 ,  H01L2224/32225 ,  H01L2224/73103 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/81201 ,  H01L2224/81801 ,  H01L2224/81855 ,  H01L2224/83855 ,  H01L2224/92125 ,  H01L2924/35 ,  H01L2924/351 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2924/014

Abstract: One example embodiment discloses a chip having a chip area, wherein the chip area includes: an overhang area; a rigid coupling area, having a set of rigid coupling points, located on one side of the overhang area; and a flexible coupling area, having a set of flexible coupling points, located on a side of the overhang area opposite to the a rigid coupling area. Another example embodiment discloses a method for fabricating a die interconnect, comprising: fabricating a rigid coupler area, having a set of rigid coupler points, within a chip having a chip area; defining an overhang area within the chip area and abutted to the rigid coupler area; and fabricating a flexible coupler area, having a set of flexible coupler points, within the chip area abutted to a side of the overhang area opposite to the rigid coupler area.

Abstract translation: 一个示例性实施例公开了一种具有芯片面积的芯片，其中芯片区域包括：突出区域; 刚性联接区域，具有位于所述伸出区域的一侧上的一组刚性联接点; 以及柔性联接区域，其具有一组柔性联接点，位于与刚性联接区域相对的伸出区域的一侧。 另一示例性实施例公开了一种用于制造管芯互连的方法，包括：在具有芯片面积的芯片内制造具有一组刚性耦合点的刚性耦合器区域; 限定所述芯片区域内的伸出区域并与所述刚性耦合器区域邻接; 以及在与所述刚性耦合器区域相对的所述伸出区域的一侧的所述芯片区域内制造具有一组柔性耦合点的柔性耦合器区域。

公开(公告)号：US09385099B2

公开(公告)日：2016-07-05

申请号：US14229717

申请日：2014-03-28

Applicant: NXP B.V.

Inventor： Leonardus Antonius Elisabeth van Gemert ,  Coenraad Cornelis Tak ,  Marten Oldsen ,  Hendrik Bouman

IPC: H01L21/44 ,  H01L23/66 ,  H01L23/58 ,  H01L23/00 ,  B81B7/00

CPC classification number: H01L24/17 ,  B81B7/0048 ,  B81B7/007 ,  H01L24/11 ,  H01L24/14 ,  H01L24/73 ,  H01L2224/10135 ,  H01L2224/10165 ,  H01L2224/131 ,  H01L2224/1329 ,  H01L2224/13339 ,  H01L2224/1401 ,  H01L2224/14134 ,  H01L2224/16238 ,  H01L2224/1701 ,  H01L2224/26165 ,  H01L2224/26175 ,  H01L2224/29013 ,  H01L2224/29035 ,  H01L2224/32225 ,  H01L2224/73103 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/81201 ,  H01L2224/81801 ,  H01L2224/81855 ,  H01L2224/83855 ,  H01L2224/92125 ,  H01L2924/35 ,  H01L2924/351 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2924/014

Abstract: One example embodiment discloses a chip having a chip area, wherein the chip area includes: an overhang area; a rigid coupling area, having a set of rigid coupling points, located on one side of the overhang area; and a flexible coupling area, having a set of flexible coupling points, located on a side of the overhang area opposite to the a rigid coupling area. Another example embodiment discloses a method for fabricating a die interconnect, comprising: fabricating a rigid coupler area, having a set of rigid coupler points, within a chip having a chip area; defining an overhang area within the chip area and abutted to the rigid coupler area; and fabricating a flexible coupler area, having a set of flexible coupler points, within the chip area abutted to a side of the overhang area opposite to the rigid coupler area.

Abstract translation: 一个示例性实施例公开了一种具有芯片面积的芯片，其中芯片区域包括：突出区域; 刚性联接区域，具有位于所述伸出区域的一侧上的一组刚性联接点; 以及柔性联接区域，其具有一组柔性联接点，位于与刚性联接区域相对的伸出区域的一侧。 另一示例性实施例公开了一种用于制造管芯互连的方法，包括：在具有芯片面积的芯片内制造具有一组刚性耦合点的刚性耦合器区域; 限定所述芯片区域内的伸出区域并与所述刚性耦合器区域邻接; 以及在与所述刚性耦合器区域相对的所述伸出区域的一侧的所述芯片区域内制造具有一组柔性耦合点的柔性耦合器区域。

公开(公告)号：US09557238B2

公开(公告)日：2017-01-31

申请号：US14340765

申请日：2014-07-25

Applicant: NXP B.V.

Inventor： Willem Besling ,  Martijn Goossens ,  Peter Steeneken ,  Remco Pijnenburg ,  Marten Oldsen ,  Casper van der Avoort

IPC: G01L19/04 ,  G01L9/12 ,  B81C1/00 ,  G01L9/00 ,  B81B7/00

CPC classification number: G01L9/12 ,  B81B7/0038 ,  B81C1/00158 ,  B81C1/00285 ,  G01L9/0073 ,  G01L19/04

Abstract: Various exemplary embodiments relate to a pressure sensor including a pressure sensitive membrane suspended over a cavity, wherein the membrane is secured by a set of anchors to a substrate; and a getter material embedded in the membrane, wherein the surface of the getter is in contact with any gas within the cavity, and wherein two end points of the getter material are attached through the substrate by anchors capable of conducting through the substrate an electrical current through the getter material.

Abstract translation: 各种示例性实施例涉及包括悬浮在空腔上的压敏膜的压力传感器，其中膜通过一组锚固件固定到基底; 以及嵌入膜中的吸气剂材料，其中吸气剂的表面与空腔内的任何气体接触，并且其中吸气剂材料的两个端点通过能够通过衬底导通电流的锚固件附着在衬底上， 通过吸气材料。

公开(公告)号：US20140338459A1

公开(公告)日：2014-11-20

申请号：US14266281

申请日：2014-04-30

Applicant: NXP B.V.

Inventor： Willem Frederik Adrianus Besling ,  Iris Bominaar-Silkens ,  Remco Henricus Wilhelmus Pijnenburg ,  Marten Oldsen

IPC: G01L9/12

CPC classification number: G01L9/005 ,  G01L9/0073 ,  G01L9/125 ,  G01L13/025 ,  G01L19/147 ,  G01L19/148

Abstract: A differential pressure sensor comprises a cavity having a base including a base electrode and a membrane suspended above the base which includes a membrane electrode, wherein the first membrane is sealed with the cavity defined beneath the first membrane. A first pressure input port is coupled to the space above the sealed first membrane. A capacitive read out system is used to measure the capacitance between the base electrode and membrane electrode. An interconnecting channel is between the cavity and a second pressure input port, so that the sensor is responsive to the differential pressure applied to opposite sides of the membrane by the two input ports.

Abstract translation: 差压传感器包括具有底座的空腔，底座包括基底电极和悬挂在基座上方的膜，该膜片包括膜电极，其中第一隔膜用限定在第一隔膜下方的空腔密封。 第一压力输入端口连接到密封的第一膜上方的空间。 电容读出系统用于测量基极和膜电极之间的电容。 互连通道在腔和第二压力输入端口之间，使得传感器响应于通过两个输入端口施加到膜的相对侧的差压。