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公开(公告)号:US11637024B2
公开(公告)日:2023-04-25
申请号:US17072569
申请日:2020-10-16
Applicant: NXP B.V.
Inventor: Wiwat Tanwongwan , Amornthep Saiyajitara , Nathapop Lappanitpullpol
IPC: H01L21/56 , H01L23/31 , H01L23/495 , G06K19/077 , H01L23/498 , H01L21/48
Abstract: A lead frame used to assemble a semiconductor device, such as a smart card, has a first major surface including exposed leads and a second major surface including a die receiving area and one or more connection pads surrounding the die receiving area. The connection pads enable electrical connection of an Integrated Circuit (IC) die to the exposed leads. A molding tape sized and shaped like the lead frame is adhered to and covers the second major surface of the lead frame. The molding tape has a die receiving area cut-out that exposes the die receiving area and the connection pads on the second major surface of the lead frame and forms a cavity for receiving an encapsulant. The cut-out has an elevated sidewall for retaining the encapsulant within the cavity.
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公开(公告)号:US10763203B1
公开(公告)日:2020-09-01
申请号:US16270607
申请日:2019-02-08
Applicant: NXP B.V.
Inventor: Amornthep Saiyajitara , Wiwat Tanwongwan , Nathapop Lappanitpullpol
IPC: H01L23/498 , H01L23/00
Abstract: A lead frame for assembling a smart card is formed with a substrate having first and second opposing major surfaces. A die receiving area is formed in the first major surface of the substrate and surrounded by conductive vias. A conductive coating is formed on the second major surface of the substrate and patterned to form electrical contact pads over the conductive vias. A conductive trace is formed on the first major surface of the substrate. The conductive trace extends between at least two adjacent vias and partially surrounds the at least two adjacent conductive vias, thereby forming a gap in the portion of the trace that surrounds the vias. An electrical connection between an integrated circuit chip and the conductive via extends over the gap. The gap prevents the electrical connection from inadvertently contacting the conductive trace.
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公开(公告)号:US20190229044A1
公开(公告)日:2019-07-25
申请号:US15878292
申请日:2018-01-23
Applicant: NXP B.V.
IPC: H01L23/495 , H01L21/48
Abstract: A lead frame is formed with exposed lead tips. The leads are not attached at their tips to any of a tie bar, a dam bar or an end bar, so when the lead frame is plated, the lead tips are plated. During packaging, after die attach and molding, when the lead frame is cut from the frame assembly, the lead tips are not cut, so the plating remains on the tips. This improves solder joint reliability when the package is mounted on a PCB. The lead frame has connection bars that run parallel to the leads from the tie bar to the end bar. The connection bars provide stability to the leads during wire bonding, but are cut from the lead frame after wire bonding.
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公开(公告)号:US20170047275A1
公开(公告)日:2017-02-16
申请号:US14823486
申请日:2015-08-11
Applicant: NXP B.V.
Inventor: Wiwat Tanwongwan
IPC: H01L23/495 , H01L21/56 , H01L21/52
CPC classification number: H01L21/563 , H01L23/16 , H01L23/3107 , H01L23/4951 , H01L23/49513 , H01L23/49558 , H01L2224/32145
Abstract: Consistent with an example embodiment, there is a semiconductor device that comprises a lead frame assembly having a non-conductive material (NCM) sheet placed on a location of the lead frame assembly. A device die having a length, width, and thickness, is attached to the NCM sheet, the device die being attached to the NCM with an adhesive. The NCM sheet has a length and width greater than the length and width of the device die and the NCM sheet has a thickness less than the thickness of the device die. The NCM sheet mitigates wire bond lifting at device die bond pads by reducing bouncing of the wire bond leads owing to stress and movement of the lead frame assembly underneath the device die.
Abstract translation: 与示例性实施例一致,存在一种半导体器件,其包括具有放置在引线框组件的位置上的非导电材料(NCM)片的引线框架组件。 具有长度,宽度和厚度的器件模具连接到NCM片材上,器件裸片用粘合剂附着到NCM上。 NCM片材的长度和宽度大于器件裸片的长度和宽度,NCM片材的厚度小于器件裸片的厚度。 NCM板材通过减少引线框架组件在器件裸片下方的应力和运动来减少引线接合引线的跳动,从而减少器件管芯接合焊盘处的引线接合提升。
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公开(公告)号:US11114239B2
公开(公告)日:2021-09-07
申请号:US16689347
申请日:2019-11-20
Applicant: NXP B.V.
Inventor: Chayathorn Saklang , Wiwat Tanwongwan , Amornthep Saiyajitara , Chanon Suwankasab
Abstract: A device includes a leadframe and an electronic component. The leadframe includes a first leadframe element having a first surface and a second leadframe element adjacent to the first leadframe element, the first and second leadframe elements being separate from one another, the second leadframe element having a second surface. A first flange extends from a first outer edge of the first leadframe element and extends away from the first surface of the first leadframe element. A second flange extends from a second outer edge of the second leadframe element and extends away from the second surface of the second leadframe element. The electronic component is coupled to the first and second surfaces of the first and second leadframe elements such that the first and second flanges are located at opposing first and second sidewalls of the electronic component.
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公开(公告)号:US20170133342A1
公开(公告)日:2017-05-11
申请号:US15339594
申请日:2016-10-31
Applicant: NXP B.V.
Inventor: Wiwat Tanwongwan , Piyarat Suwannakha , Chanon Suwankasab
IPC: H01L23/00 , H01L21/56 , H01L21/48 , H01L23/495 , H01L23/31
CPC classification number: H01L24/48 , H01L21/4825 , H01L21/565 , H01L23/3114 , H01L23/49503 , H01L23/4952 , H01L23/49541 , H01L24/85 , H01L2224/32245 , H01L2224/48095 , H01L2224/48245 , H01L2224/48247 , H01L2224/48465 , H01L2224/48472 , H01L2224/73265 , H01L2224/85047 , H01L2224/85181 , H01L2224/85205 , H01L2924/00014 , H01L2924/181 , H01L2924/3512 , H01L2924/386 , H01L2924/00012 , H01L2224/45099 , H01L2224/05599 , H01L2224/85399 , H01L2924/00
Abstract: An integrated circuit package is provided. The integrated circuit package comprises: a die; a lead; and a bond wire comprising a first end coupled to the die and a second end coupled to the lead via bond. The bond wire further comprises: a first portion between a first bend in the bond wire and the bond and forming a first angle with respect to the lead; and a second portion forming a second angle with respect to the lead. The first bend is immediately between the first and second portions and is configured to reduce the angle of the bond wire with respect to the lead from the second angle to the first angle.
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公开(公告)号:US20180226353A1
公开(公告)日:2018-08-09
申请号:US15427010
申请日:2017-02-07
Applicant: NXP B.V.
Inventor: Ekapong Tangpattanasaeree , Wiwat Tanwongwan , Amornthep Saiyajitara
IPC: H01L23/544 , H01L21/48 , H01L23/495
CPC classification number: H01L23/544 , H01L23/495 , H01L2223/54413 , H01L2223/54433 , H01L2223/54486
Abstract: A lead frame used in semiconductor device assembly includes first and second opposing planar surfaces. A marking area is defined on the first planar surface. The marking area has a uniform background color that is different from a color of the first planar surface. A mark is formed in the marking area. The background color of the marking area contrasts with a color of the mark such that a clear image of the mark is easily captured with an image sensor. The mark preferably is a two-dimensional (2D) mark made of bumps and represents encoded information. The contrast between the background color and the mark is especially helpful when the lead frame has a roughened surface.
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公开(公告)号:US09824980B2
公开(公告)日:2017-11-21
申请号:US14317224
申请日:2014-06-27
Applicant: NXP B.V.
Inventor: Chayathorn Saklang , Wiwat Tanwongwan
IPC: H01L23/00 , H01L23/495 , H01L23/498
CPC classification number: H01L23/562 , H01L23/49503 , H01L23/49548 , H01L23/49861 , H01L24/16 , H01L24/46 , H01L24/48 , H01L24/49 , H01L2224/16245 , H01L2224/48247 , H01L2224/49171 , H01L2924/00014 , H01L2924/1432 , H01L2924/3512 , H01L2224/45099 , H01L2224/45015 , H01L2924/207 , H01L2224/05599
Abstract: Various aspects are directed to apparatuses, systems and related methods involving the mitigation of issues relating to thermal expansion and contraction of lead fingers of an integrated circuit package. Consistent with one or more embodiments, lead fingers on a leadframe substrate each have a locking structure that secures the lead finger in place relative to the substrate. The lead fingers provide a location to attach a bond wire to an integrated circuit, and connect the bond wire to terminals at a perimeter of the leadframe. The locking structure and arrangement of the lead fingers mitigate issues such as cracking or breaking of a solder connection of the bond wire to the leadframe, which can occur due to thermal expansion and contraction.
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公开(公告)号:US20170033034A1
公开(公告)日:2017-02-02
申请号:US15208827
申请日:2016-07-13
Applicant: NXP B.V.
Inventor: Chayathorn Saklang , Wiwat Tanwongwan
IPC: H01L23/495 , H01L23/31 , G01P3/44 , H01L23/29
CPC classification number: H01L23/49537 , G01P3/44 , G01R33/0047 , G01R33/0052 , H01L23/293 , H01L23/3114 , H01L23/3121 , H01L23/4951 , H01L23/49513 , H01L23/4952 , H01L23/49562 , H01L24/29 , H01L24/32 , H01L24/48 , H01L24/49 , H01L24/73 , H01L2224/2919 , H01L2224/32012 , H01L2224/32245 , H01L2224/48247 , H01L2224/48257 , H01L2224/48472 , H01L2224/49171 , H01L2224/73265 , H01L2224/85455 , H01L2224/85464 , H01L2924/00014 , H01L2924/15747 , H01L2924/35121 , H01L2924/00012 , H01L2924/078 , H01L2224/45099 , H01L2224/05599 , H01L2924/00
Abstract: A packaged electronic device is disclosed, comprising: a package, a die and a first bondwire. The package comprises a leadframe. The leadframe comprises a first conducting leadframe element and a second conducting leadframe element that are separate from each other. The die comprises a first bondpad. The first bondwire electrically connects the first bondpad to the first conducting leadframe element. The die mechanically couples the first and second leadframe elements together.
Abstract translation: 公开了一种封装的电子设备,包括:封装,管芯和第一接合线。 包装包括引线框架。 引线框架包括彼此分离的第一导电引线框架元件和第二导电引线框架元件。 模具包括第一接合垫。 第一接合线将第一接合焊盘电连接到第一导电引线框架元件。 模具将第一和第二引线框架元件机械耦合在一起。
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公开(公告)号:US20210151251A1
公开(公告)日:2021-05-20
申请号:US16689347
申请日:2019-11-20
Applicant: NXP B.V.
Inventor: Chayathorn Saklang , Wiwat Tanwongwan , Amornthep Saiyajitara , Chanon Suwankasab
Abstract: A device includes a leadframe and an electronic component. The leadframe includes a first leadframe element having a first surface and a second leadframe element adjacent to the first leadframe element, the first and second leadframe elements being separate from one another, the second leadframe element having a second surface. A first flange extends from a first outer edge of the first leadframe element and extends away from the first surface of the first leadframe element. A second flange extends from a second outer edge of the second leadframe element and extends away from the second surface of the second leadframe element. The electronic component is coupled to the first and second surfaces of the first and second leadframe elements such that the first and second flanges are located at opposing first and second sidewalls of the electronic component.
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