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公开(公告)号：US09844133B2
公开(公告)日：2017-12-12
申请号：US15363579
申请日：2016-11-29
Inventor： Yoshihiro Tomita , Koichi Hirano , Susumu Sawada , Koji Kawakita , Takashi Ichiryu , Masanori Nomura
CPC classification number: H05K1/038 , H05K1/0283 , H05K1/0366 , H05K1/18 , H05K1/189 , H05K3/202 , H05K2201/0133 , H05K2201/029 , H05K2201/05 , H05K2201/09227 , H05K2201/09263 , H05K2201/09945
Abstract: A flexible substrate is provided with: a stretchable sheet; a member located on the sheet; and a stretchable strip connected to the member, and located on the sheet. When the amount of extension of the sheet is equal to or less than a predetermined value, the sheet has a first elastic modulus, and when the amount of extension of the sheet exceeds the predetermined value, the sheet has a second elastic modulus that is greater than the first elastic modulus and greater than the elastic modulus of the strip.
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公开(公告)号：US09860979B2
公开(公告)日：2018-01-02
申请号：US15158591
申请日：2016-05-19
Inventor： Takashi Ichiryu , Koji Kawakita , Masanori Nomura , Yoshihiro Tomita
CPC classification number: H05K1/0283 , H05K1/185 , H05K2201/10151
Abstract: A stretchable flexible substrate according to one aspect of the present disclosure includes: an electronic component; a first insulating layer located around the electronic component and having first and second main surfaces facing each other; a first metal layer that is in contact with the first main surface; a second metal layer that is in contact with the second main surface and electrically connected to the electronic component; and a second insulating layer that seals the electronic component, first insulating layer, and second metal layer, in plan view, a curved wiring portion extending from a central portion made up of at least the electronic component, portions of the first insulating layer and first and second metal layers, the curved wiring portion being made up of at least other portions of the first insulating layer, first and second metal layers, and the curved wiring portion being curved at least partially.
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公开(公告)号：US10228806B2
公开(公告)日：2019-03-12
申请号：US15481974
申请日：2017-04-07
Inventor： Yoshihiro Tomita , Koji Kawakita , Koichi Hirano , Masanori Nomura , Susumu Sawada , Takashi Ichiryu
Abstract: A flexible touch sensor comprises: a first sheet material that has a first major surface, and that has a cushioning property; a second sheet material that includes a conductive material, and that is disposed on the first major surface of the first sheet material; and a conductive wire that is disposed on the first major surface of the first sheet material, and that is sunk into the first sheet material.
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公开(公告)号：US09330811B2
公开(公告)日：2016-05-03
申请号：US14232070
申请日：2013-05-17
Inventor： Takashi Ichiryu , Yoshihisa Yamashita , Seiichi Nakatani
CPC classification number: H01B5/14 , G06F3/041 , G06F2203/04103 , H01B13/003 , H01B13/0036 , H01L31/022466 , H01L31/022483 , H01L31/1884 , H01L31/1888 , H01L51/5209 , Y02E10/50
Abstract: There is provided a transparent electrode comprising a supporting substrate, a first transparent electrically-conductive film provided on the supporting substrate, a transparent insulating film provided on the first transparent electrically-conductive film, and a second transparent electrically-conductive film provided on the transparent insulating film. In the transparent electrode of the present invention, all of the first transparent electrically-conductive film, the second transparent electrically-conductive film and the transparent insulating film provided therebetween comprise a metal compound, and the first transparent electrically-conductive film and the second transparent electrically-conductive film have a crystalline structure, whereas the transparent insulating film has an amorphous structure.
Abstract translation: 提供了一种透明电极，其包括支撑基板，设置在支撑基板上的第一透明导电膜，设置在第一透明导电膜上的透明绝缘膜，以及设置在透明导电膜上的第二透明导电膜 绝缘膜。 在本发明的透明电极中，所有第一透明导电膜，第二透明导电膜和设置在其间的透明绝缘膜均包含金属化合物，第一透明导电膜和第二透明导电膜 导电膜具有晶体结构，而透明绝缘膜具有非晶结构。
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公开(公告)号：US11791803B2
公开(公告)日：2023-10-17
申请号：US17626296
申请日：2020-07-10
Inventor： Yusuke Kinoshita , Takashi Ichiryu , Hidetoshi Ishida
Abstract: A gate drive circuit includes: an input terminal; a first circuit path inserted into a line connecting the input terminal and a gate of a power transistor; a second circuit path connected in parallel to the first circuit path; and a third circuit path connected in parallel to the second circuit path. The first circuit path includes a gate resistor (Rgon). The second circuit path includes a first capacitor and a first resistor connected in series. The third circuit path includes a second capacitor and a second resistor connected in series. The second capacitor has a capacitance value greater than a capacitance value of the first capacitor. The second resistor has a resistance value greater than a resistance value of the first resistor. The gate resistor (Rgon) has a resistance value greater than the resistance value of the second resistor.
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Patent Agency Ranking
公开(公告)号：US11637552B2
公开(公告)日：2023-04-25
申请号：US17614716
申请日：2020-04-28
Inventor： Yusuke Kinoshita , Takashi Ichiryu , Ryusuke Kanomata , Hidetoshi Ishida
Abstract: A speed-up circuit is configured to be provided between a power supply terminal and a gate of a semiconductor switching element. An impedance element is configured to be provided between a signal input terminal and a node, the node being between the speed-up circuit and the gate of the semiconductor switching element. In the speed-up circuit, a second field effect transistor is connected in series to a first field effect transistor and is configured to be connected to the gate of the semiconductor switching element. The impedance element has an impedance higher than an impedance of the speed-up circuit when both the first field effect transistor and the second field effect transistor are in an ON state.
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公开(公告)号：US11257733B2
公开(公告)日：2022-02-22
申请号：US16497744
申请日：2018-03-27
Inventor： Takashi Ichiryu , Masanori Nomura , Yusuke Kinoshita , Hidetoshi Ishida , Yasuhiro Yamada
IPC: H01L23/367 , H01L23/29 , H01L23/31 , H01L23/373 , H01L23/532 , H01L23/00
Abstract: A semiconductor device includes a supporting substrate, a semiconductor chip, a resin member, and a heat-dissipating metal layer. The supporting substrate has a first surface and a second surface located opposite from each other in a thickness direction defined for the supporting substrate. The semiconductor chip includes a plurality of electrodes. The semiconductor chip is bonded to the supporting substrate on one side thereof with the first surface. The resin member has a first surface and a second surface located opposite from each other in a thickness direction defined for the resin member. The resin member covers at least a side surface of the supporting substrate and a side surface of the semiconductor chip. The heat-dissipating metal layer is arranged in contact with the supporting substrate and the resin member to cover the second surface of the supporting substrate and the second surface of the resin member at least partially.
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8.发明授权公开(公告)号：US09812385B2
公开(公告)日：2017-11-07
申请号：US15157466
申请日：2016-05-18
Inventor： Koji Kawakita , Takashi Ichiryu , Masanori Nomura
IPC: H01L23/49 , H01L23/31 , H01L23/495 , H01L23/433 , H01L23/00 , H01L21/48 , H01L21/56
CPC classification number: H01L23/49582 , H01L21/4821 , H01L21/568 , H01L23/3128 , H01L23/4334 , H01L23/49558 , H01L24/19 , H01L24/20 , H01L24/96 , H01L24/97 , H01L2224/04105 , H01L2224/12105 , H01L2924/12041 , H01L2924/13091 , H01L2924/14 , H01L2924/181 , H01L2924/19041 , H01L2924/19043 , H01L2924/19105 , H01L2924/00012 , H01L2224/48091 , H01L2924/00014
Abstract: An electronic component package according to one aspect of the present disclosure includes a metal pattern layer having a first principal surface and a second principal surface, an electronic component disposed on the first principal surface and electrically connected to the metal pattern layer, at least one metal member disposed on the first principal surface and electrically connected to the metal pattern layer, a sealing resin layer disposed on the first principal surface, the electronic component and the at least one metal member, and an insulating layer disposed on the second principal surface. The at least one metal member is thicker than the electronic component. In plan view, the at least one metal member is disposed on an area of the first principal surface, the area including an end of the first principal surface. The at least a part of the metal pattern layer is exposed from the insulating layer.
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公开(公告)号：US12126274B2
公开(公告)日：2024-10-22
申请号：US17290489
申请日：2019-08-23
Inventor： Yusuke Kinoshita , Yasuhiro Yamada , Takashi Ichiryu , Masanori Nomura , Hidetoshi Ishida
IPC: H02M7/483 , H01L29/778 , H02M1/08
CPC classification number: H02M7/483 , H01L29/7786 , H02M1/08
Abstract: A GaN layer is formed over the substrate. An AlGaN layer is formed on the GaN layer. A first source electrode, a first gate electrode, a second gate electrode, and a second source electrode are formed on or over the AlGaN layer. A first p-type Alx1Ga1-x1N layer where 0≤x1
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公开(公告)号：US12125904B2
公开(公告)日：2024-10-22
申请号：US17612542
申请日：2020-05-14
Inventor： Takashi Ichiryu , Yusuke Kinoshita , Ryusuke Kanomata , Masanori Nomura , Hidetoshi Ishida
IPC: H01L29/778 , H01L23/00 , H01L25/07 , H01L27/06 , H01L27/07 , H01L29/10 , H01L29/20 , H01L29/205 , H01L29/417 , H01L29/423 , H03K17/12 , H03K17/687
CPC classification number: H01L29/7787 , H01L29/1066 , H01L29/2003 , H01L29/205
Abstract: A bidirectional switch module includes a plurality of bidirectional switches and a mount board. Each of the plurality of bidirectional switches includes a first source electrode, a first gate electrode, a second gate electrode, and a second source electrode. On the mount board, the plurality of bidirectional switches are mounted. In the bidirectional switch module, the plurality of bidirectional switches are connected in parallel.
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