公开(公告)号：US20170005099A1

公开(公告)日：2017-01-05

申请号：US15160264

申请日：2016-05-20

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seung-Heon LEE ,  Munjun KIM ,  ByeongJu BAE

IPC: H01L27/108 ,  H01L21/687 ,  H01L21/033 ,  H01L21/8234 ,  H01L21/3213

Abstract: A method of fabricating a semiconductor device includes forming a device isolation layer in a substrate to define active regions, forming a conductive layer on the active regions, forming first mask patterns intersecting the active regions on the conductive layer, etching the conductive layer using the first mask patterns as etch masks to form bit lines, growing second mask patterns from top surfaces of the first mask patterns, and performing a patterning process using the second mask patterns as etch masks to form contact holes exposing the active regions between the bit lines.

Abstract translation: 制造半导体器件的方法包括在衬底中形成器件隔离层以限定有源区，在有源区上形成导电层，形成与导电层上的有源区相交的第一掩模图案，使用第一 掩模图案作为蚀刻掩模以形成位线，从第一掩模图案的顶表面生长第二掩模图案，以及使用第二掩模图案作为蚀刻掩模来执行图案化处理，以形成暴露位线之间的有源区域的接触孔。

公开(公告)号：US20190279988A1

公开(公告)日：2019-09-12

申请号：US16426075

申请日：2019-05-30

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seung-Heon LEE ,  Munjun Kim ,  ByeongJu Bae

IPC: H01L27/108 ,  H01L21/033 ,  H01L21/3213 ,  H01L21/8234

Abstract: A method of fabricating a semiconductor device includes forming a device isolation layer in a substrate to define active regions, forming a conductive layer on the active regions, forming first mask patterns intersecting the active regions on the conductive layer, etching the conductive layer using the first mask patterns as etch masks to form bit lines, growing second mask patterns from top surfaces of the first mask patterns, and performing a patterning process using the second mask patterns as etch masks to form contact holes exposing the active regions between the bit lines.

公开(公告)号：US20210057518A1

公开(公告)日：2021-02-25

申请号：US17094104

申请日：2020-11-10

Applicant: Samsung Electronics Co., Ltd.

Inventor： Ha-young YI ,  Youn-seok CHOI ,  Young-min KO ,  Mun-jun KIM ,  Hong-gun KIM ,  Seung-Heon LEE

IPC: H01L49/02 ,  H01L27/108

Abstract: A semiconductor device includes a plurality of electrode structures formed on a substrate; and an upper supporter group and a lower supporter between upper ends and lower ends of the plurality of electrode structures The upper supporter group includes a plurality of supporters, and at least some of the plurality of supporters each have an upper surface and a lower surface. One of the upper surface and the lower surface has a curved profile, and the other surface has a flat profile.

公开(公告)号：US20240172423A1

公开(公告)日：2024-05-23

申请号：US18419066

申请日：2024-01-22

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seung-Heon LEE ,  Munjun KIM ,  ByeongJu BAE

IPC: H10B12/00 ,  H01L21/033 ,  H01L21/3213 ,  H01L21/8234

CPC classification number: H10B12/482 ,  H01L21/0332 ,  H01L21/32139 ,  H01L21/823475 ,  H01L21/823481 ,  H10B12/0335 ,  H10B12/315 ,  H10B12/485

Abstract: A method of fabricating a semiconductor device includes forming a device isolation layer in a substrate to define active regions, forming a conductive layer on the active regions, forming first mask patterns intersecting the active regions on the conductive layer, etching the conductive layer using the first mask patterns as etch masks to form bit lines, growing second mask patterns from top surfaces of the first mask patterns, and performing a patterning process using the second mask patterns as etch masks to form contact holes exposing the active regions between the bit lines.

公开(公告)号：US20230268276A1

公开(公告)日：2023-08-24

申请号：US18061642

申请日：2022-12-05

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sang Hoon AHN ,  Kyung Seok OH ,  Seung-Heon LEE ,  Jun Hyuk LIM

IPC: H01L23/532 ,  H01L21/768 ,  H01L23/522

CPC classification number: H01L23/53295 ,  H01L21/76877 ,  H01L23/53223 ,  H01L23/5226 ,  H01L21/76826 ,  H01L21/7682 ,  H01L2221/1047

Abstract: There is provided a semiconductor device capable of improving the performance and reliability of a device. The semiconductor device may include a first interlayer insulating film containing therein a plurality of pores, a first line structure in the first interlayer insulating film, an inserted insulating film extending along and on a upper surface of the first interlayer insulating film and in contact with the first interlayer insulating film, a barrier insulating film in contact with the inserted insulating film and extending along an upper surface of the inserted insulating film and an upper surface of the first line structure, a second interlayer insulating film on the barrier insulating film and a second line structure disposed in the second interlayer insulating film and connected to the first line structure.

公开(公告)号：US20230043714A1

公开(公告)日：2023-02-09

申请号：US17971807

申请日：2022-10-24

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seung-Heon LEE ,  Munjun KIM ,  Jaekang KOH ,  Tae-Jong HAN

IPC: H01L21/768 ,  H01L21/033 ,  H01L21/3213

Abstract: Provided are a method of manufacturing a semiconductor device using a thermally decomposable layer, a semiconductor manufacturing apparatus, and the semiconductor device. The method includes forming an etch target layer on a substrate, forming thermally decomposable patterns spaced apart from each other on the etch target layer, forming a first mask pattern covering at least sidewalls of the thermally decomposable patterns, and removing the thermally decomposable patterns by a heating method to expose a sidewall of the first mask pattern.

公开(公告)号：US20170103892A1

公开(公告)日：2017-04-13

申请号：US15291377

申请日：2016-10-12

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Young-Sik SEO ,  Seung-Heon LEE ,  Hyun-Woo LEE

IPC: H01L21/033 ,  H01L21/308 ,  H01L21/311

CPC classification number: H01L21/0337 ,  H01L21/30655 ,  H01L21/3086 ,  H01L21/31111 ,  H01L21/31144

Abstract: A method for fabricating a semiconductor device includes forming a first mask pattern on a first film to extend in a first direction, forming a first spacer on either side wall of the first mask pattern, forming a second film to cover the first spacer and the first film, and forming a second mask pattern on the second film. The second mask pattern extends in a second direction different from the first direction. The method further includes forming a second spacer on either side wall of the second mask pattern, etching the first film using the first spacer and the second spacer as etch masks to form a contact pattern, and removing the first and second spacers to expose the contact pattern.

公开(公告)号：US20220336468A1

公开(公告)日：2022-10-20

申请号：US17858361

申请日：2022-07-06

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seung-Heon LEE ,  Munjun KIM ,  ByeongJu BAE

IPC: H01L27/108 ,  H01L21/8234 ,  H01L21/3213 ,  H01L21/033

Abstract: A method of fabricating a semiconductor device includes forming a device isolation layer in a substrate to define active regions, forming a conductive layer on the active regions, forming first mask patterns intersecting the active regions on the conductive layer, etching the conductive layer using the first mask patterns as etch masks to form bit lines, growing second mask patterns from top surfaces of the first mask patterns, and performing a patterning process using the second mask patterns as etch masks to form contact holes exposing the active regions between the bit lines.

公开(公告)号：US20220115442A1

公开(公告)日：2022-04-14

申请号：US17348912

申请日：2021-06-16

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Byeong Ju BAE ,  Seung-Heon LEE ,  Ik Soo KIM ,  Byoung Deog CHOI

IPC: H01L27/24 ,  H01L45/00

Abstract: A semiconductor memory device and associated methods, the device including first and second lower conductive lines extending in a first direction; a first middle conductive line on the first and second lower conductive lines and extending in a second direction; first and second memory cells between the first and second lower conductive lines and the first middle conductive line; an air gap support layer between the first and second memory cells; and a first air gap between the first and second memory cells and under the air gap support layer, wherein an upper surface of the air gap support layer lies in a same plane as the first and second memory cells, the first and second memory cells include first and second OTS layers and first and second phase-change layers, and the first air gap overlaps the first and second phase-change layers.

公开(公告)号：US20170011771A1

公开(公告)日：2017-01-12

申请号：US15273173

申请日：2016-09-22

Applicant: Samsung Electronics Co., Ltd.

Inventor： Ji-Eun KIM ,  Chang-Gun UM ,  Seung-Heon LEE ,  Kyung-Ho CHAE ,  Kyung-Il LEE

IPC: G11B27/031 ,  G11B27/36 ,  H04N9/802 ,  H04N5/765

CPC classification number: G11B27/031 ,  G11B27/36 ,  H04N5/765 ,  H04N9/802

Abstract: A method for creating a content in an electronic device is provided. The method includes acquiring first media data acquired by at least one external electronic device, acquiring second media data on a basis of at least a part of the first media data, recognizing a feature of the second media data acquired by the at least one external electronic device, and creating the content on a basis of at least a part of the feature of the second media data.

Abstract translation: 提供了一种用于在电子设备中创建内容的方法。 该方法包括获取由至少一个外部电子设备获取的第一媒体数据，基于第一媒体数据的至少一部分获取第二媒体数据，识别由至少一个外部电子获取的第二媒体数据的特征 设备，以及基于第二媒体数据的特征的至少一部分来创建内容。