公开(公告)号：US20130277722A1

公开(公告)日：2013-10-24

申请号：US13915272

申请日：2013-06-11

Applicant: Samsung Electronics Co., Ltd

Inventor： Ki-ha HONG ,  Jong-seob KIM ,  Jai-kwang SHIN

IPC: H01L29/66

CPC classification number: H01L29/66984 ,  B82Y25/00 ,  H01F1/401 ,  H01F10/1936 ,  H01F10/3254

Abstract: Provided are spin field effect logic devices, the logic devices including: a gate electrode; a channel formed of a magnetic material above the gate electrode to selectively transmit spin-polarized electrons; a source on the channel; and a drain and an output electrode on the channel outputting electrons transmitted from the source. The gate electrode may control a magnetization state of the channel in order to selectively transmit the electrons injected from the source to the channel.

Abstract translation: 提供的是自旋场效应逻辑器件，逻辑器件包括：栅电极; 由栅电极上方的磁性材料形成的沟道，以选择性地透射自旋极化电子; 频道上的来源; 以及沟道上的漏极和输出电极，输出从源极发射的电子。 栅电极可以控制通道的磁化状态，以选择性地将从源引入的电子传输到通道。

公开(公告)号：US20150123139A1

公开(公告)日：2015-05-07

申请号：US14258374

申请日：2014-04-22

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jong-seob KIM ,  In-jun HWANG ,  Jai-kwang SHIN ,  Jae-joon OH ,  Soo-gine CHONG ,  Sunk-yu HWANG

IPC: H01L29/778 ,  H01L29/66

CPC classification number: H01L29/66462 ,  H01L29/2003 ,  H01L29/42316 ,  H01L29/432 ,  H01L29/7787

Abstract: Provided are a high electron mobility transistor and/or a method of manufacturing the same. The high electron mobility transistor includes a channel layer, a channel supply layer formed on the channel layer to generate a two-dimensional electron gas (2DEG), a depletion forming layer formed on the channel supply layer, a gate electrode formed on the depletion forming layer, and a barrier layer formed between the depletion forming layer and the gate electrode. Holes may be prevented from being injected into the depletion forming layer from the gate electrode, thereby reducing a gate forward current.

Abstract translation: 提供高电子迁移率晶体管和/或其制造方法。 高电子迁移率晶体管包括沟道层，形成在沟道层上的沟道供应层，以产生二维电子气（2DEG），在沟道供应层上形成的耗尽形成层，形成于耗尽层上的栅电极 层，以及形成在耗尽形成层和栅电极之间的阻挡层。 可以防止孔从栅电极注入耗尽形成层，从而减小栅极正向电流。

公开(公告)号：US20140147973A1

公开(公告)日：2014-05-29

申请号：US13938580

申请日：2013-07-10

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hyuk-soon CHOI ,  Hong-Pyo HEO ,  Jong-seob KIM ,  Jai-kwang SHIN ,  Jae-joon OH ,  In-jun HWANG

IPC: H01L23/00

CPC classification number: H01L24/81 ,  H01L24/02 ,  H01L24/06 ,  H01L24/11 ,  H01L24/13 ,  H01L24/14 ,  H01L24/73 ,  H01L24/94 ,  H01L29/4175 ,  H01L29/7786 ,  H01L2224/02372 ,  H01L2224/0239 ,  H01L2224/0401 ,  H01L2224/05008 ,  H01L2224/05009 ,  H01L2224/05567 ,  H01L2224/0603 ,  H01L2224/06102 ,  H01L2224/11002 ,  H01L2224/11334 ,  H01L2224/1184 ,  H01L2224/11845 ,  H01L2224/131 ,  H01L2224/1403 ,  H01L2224/16235 ,  H01L2224/73251 ,  H01L2224/81005 ,  H01L2224/94 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/1306 ,  H01L2924/13064 ,  H01L2924/13091 ,  H01L2924/00 ,  H01L2224/11 ,  H01L2224/81 ,  H01L2924/014 ,  H01L2924/01079 ,  H01L2924/00014 ,  H01L2924/0105 ,  H01L2224/023 ,  H01L2224/13

Abstract: A method of packaging power devices at a wafer level is disclosed. The method includes preparing a wafer having a plurality of nitride power devices thereon, each of the plurality of nitride power devices having a plurality of electrodes thereon; forming a polymer layer on the plurality of nitride power devices; exposing each of the electrodes from the polymer layer; forming a solder bump on the exposed electrodes; forming a molding layer covering the solder bump on the polymer layer; and removing the wafer and exposing the solder bump.

Abstract translation: 公开了一种在晶片级封装功率器件的方法。 该方法包括制备其上具有多个氮化物功率器件的晶片，所述多个氮化物功率器件中的每一个在其上具有多个电极; 在所述多个氮化物功率器件上形成聚合物层; 使聚合物层中的每一个电极露出; 在暴露的电极上形成焊料凸块; 形成覆盖聚合物层上的焊料凸点的成型层; 并移除晶片并暴露焊料凸块。

公开(公告)号：US20130307026A1

公开(公告)日：2013-11-21

申请号：US13752766

申请日：2013-01-29

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sun-kyu HWANG ,  Jai-kwang SHIN ,  Hyuk-soon CHOI ,  Jong-seob KIM ,  Jae-joon OH ,  Jong-bong HA ,  In-jun HWANG ,  Kyoung-yeon KIM

IPC: H01L29/778 ,  H01L29/66

CPC classification number: H01L29/778 ,  H01L29/1029 ,  H01L29/2003 ,  H01L29/42316 ,  H01L29/66431 ,  H01L29/66462 ,  H01L29/7787

Abstract: According to example embodiments, High electron mobility transistors (HEMTs) may include a discontinuation region in a channel region. The discontinuation region may include a plurality of 2DEG unit regions that are spaced apart from one another. The discontinuation region may be formed at an interface between two semiconductor layers or adjacent to the interface. The discontinuation region may be formed by an uneven structure or a plurality of recess regions or a plurality of ion implantation regions. The plurality of 2DEG unit regions may have a nanoscale structure. The plurality of 2DEG unit regions may be formed in a dot pattern, a stripe pattern, or a staggered pattern.

Abstract translation: 根据示例实施例，高电子迁移率晶体管（HEMT）可以包括沟道区域中的不连续区域。 不连续区域可以包括彼此间隔开的多个2DEG单元区域。 不连续区域可以形成在两个半导体层之间或与界面相邻的界面处。 不连续区域可以由不平坦结构或多个凹陷区域或多个离子注入区域形成。 多个2DEG单元区域可以具有纳米尺度结构。 多个2DEG单元区域可以形成为点图案，条纹图案或交错图案。

公开(公告)号：US20140291728A1

公开(公告)日：2014-10-02

申请号：US14224769

申请日：2014-03-25

Applicant: Samsung Electronics Co., Ltd.

Inventor： In-jun HWANG ,  Jong-seob KIM ,  Jae-joon OH

IPC: H01L29/06 ,  H01L29/778

CPC classification number: H01L29/778 ,  H01L29/1608 ,  H01L29/402 ,  H01L29/7787

Abstract: According to example embodiments, a power device chip includes a plurality of unit power devices classified into a plurality of sectors, a first pad and a second pad. At least one of the first and second pads is divided into a number of pad parts equal to a number of the plurality of sectors. The first pad is connected to first electrodes of the plurality of unit power devices, and the second pad is connected to second electrodes of the plurality of unit power devices. The unit power devices may be diodes. The power device chip may further include third electrodes in the plurality of unit power devices, and a third pad may be connected to the third electrodes. In this case, the unit power devices may be high electron mobility transistors (HEMTs). Pad parts connected to defective sectors may be excluded from bonding.

Abstract translation: 根据示例性实施例，功率器件芯片包括分为多个扇区的多个单位功率器件，第一焊盘和第二焊盘。 第一和第二焊盘中的至少一个被分成等于多个扇区的数量的多个焊盘部分。 第一焊盘连接到多个单元功率器件的第一电极，第二焊盘连接到多个单元功率器件的第二电极。 单元功率器件可以是二极管。 功率器件芯片还可以包括多个单位功率器件中的第三电极，并且第三焊盘可以连接到第三电极。 在这种情况下，单位功率器件可以是高电子迁移率晶体管（HEMT）。 连接到缺陷扇区的焊盘部件可能被排除在接合之外。

公开(公告)号：US20140103969A1

公开(公告)日：2014-04-17

申请号：US13868579

申请日：2013-04-23

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Woo-chul JEON ,  Jong-seob KIM ,  Ki-yeol PARK ,  Young-hwan PARK ,  Jae-joon OH ,  Jong-bong HA ,  Jai-kwang SHIN

IPC: H01L29/778 ,  H03K3/012

CPC classification number: H01L29/7781 ,  H01L29/0619 ,  H01L29/1066 ,  H01L29/2003 ,  H01L29/42316 ,  H01L29/66431 ,  H01L29/66462 ,  H01L29/778 ,  H01L29/7782 ,  H01L29/7786 ,  H03K3/012

Abstract: According to example embodiments, a HEMT includes a channel layer, a channel supply layer on the channel layer, a source electrode and a drain electrode spaced apart on the channel layer, a depletion-forming layer on the channel supply layer, and a plurality of gate electrodes on the depletion-forming layer between the source electrode and the drain electrode. The channel supply layer is configured to induce a two-dimensional electron gas (2DEG) in the channel layer. The depletion-forming layer is configured to form a depletion region in the 2DEG. The plurality of gate electrodes include a first gate electrode and a second gate electrode spaced apart from each other.

Abstract translation: 根据示例性实施例，HEMT包括沟道层，沟道层上的沟道供应层，在沟道层上隔开的源电极和漏电极，沟道供应层上的耗尽形成层，以及多个 在源电极和漏电极之间的耗尽形成层上的栅电极。 通道供给层被配置为在通道层中诱导二维电子气（2DEG）。 耗尽形成层被配置为在2DEG中形成耗尽区。 多个栅电极包括彼此间隔开的第一栅电极和第二栅电极。

公开(公告)号：US20140027779A1

公开(公告)日：2014-01-30

申请号：US13953165

申请日：2013-07-29

Applicant: Samsung Electronics Co., Ltd.

Inventor： In-jun HWANG ,  Hyo-ji CHOI ,  Jong-seob KIM ,  Jae-joon OH

IPC: H01L29/778

CPC classification number: H01L29/778 ,  H01L29/06 ,  H01L29/2003 ,  H01L29/36 ,  H01L29/42364 ,  H01L29/7787

Abstract: According to example embodiments, a high electron mobility transistor includes: a channel layer including a 2-dimensional electron gas (2DEG); a contact layer on the channel layer; a channel supply layer on the contact layer; a gate electrode on a portion of the channel layer; and source and drain electrodes on at least one of the channel layer, the contact layer, and the channel supply layer. The contact layer is configured to form an ohmic contact on the channel layer. The contact layer is n-type doped and contains a Group III-V compound semiconductor. The source electrode and the drain electrode are spaced apart from opposite sides of the gate electrode.

Abstract translation: 根据示例性实施例，高电子迁移率晶体管包括：包括二维电子气（2DEG）的沟道层; 沟道层上的接触层; 接触层上的沟道供应层; 沟道层的一部分上的栅电极; 以及在沟道层，接触层和沟道供应层中的至少一个上的源极和漏极。 接触层被配置为在沟道层上形成欧姆接触。 接触层为n型掺杂并含有III-V族化合物半导体。 源电极和漏电极与栅电极的相对侧间隔开。

公开(公告)号：US20130234207A1

公开(公告)日：2013-09-12

申请号：US13714957

申请日：2012-12-14

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Hyuk-soon CHOI ,  Jong-seob KIM ,  Jai-kwang SHIN ,  Jae-joon OH ,  Jong-bong HA ,  In-jun HWANG

IPC: H01L29/778 ,  H01L29/66

CPC classification number: H01L29/778 ,  H01L29/2003 ,  H01L29/4175 ,  H01L29/66431 ,  H01L29/66462 ,  H01L29/7786

Abstract: According to example embodiments, a high electron mobility transistor (HEMT) includes: stack including a buffer layer, a channel layer containing a two dimensional electron gas (2DEG) channel, and a channel supply layer sequentially stacked on each other, the stack defining a first hole and a second hole that are spaced apart from each other. A first electrode, a second electrode, and third electrode are spaced apart from each other along a first surface of the channel supply layer. A first pad is on the buffer layer and extends through the first hole of the stack to the first electrode. A second pad is on the buffer layer and extends through the second hole of the stack to the second electrode. A third pad is under the stack and electrically connected to the third electrode.

Abstract translation: 根据示例性实施例，高电子迁移率晶体管（HEMT）包括：包括缓冲层的堆叠，包含二维电子气体（2DEG）通道的沟道层和相互堆叠的沟道供应层，所述堆叠限定 第一孔和彼此间隔开的第二孔。 第一电极，第二电极和第三电极沿着沟道供应层的第一表面彼此间隔开。 第一焊盘在缓冲层上并且延伸穿过堆叠的第一孔至第一电极。 第二焊盘位于缓冲层上并且延伸穿过堆叠的第二孔至第二电极。 第三焊盘在堆叠下方并电连接到第三电极。

公开(公告)号：US20140327043A1

公开(公告)日：2014-11-06

申请号：US14085121

申请日：2013-11-20

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jong-seob KIM ,  In-jun HWANG ,  Jai-kwang SHIN ,  Jae-joon OH ,  Woo-chul JEON ,  Hyuk-soon CHOI ,  Sun-kyu HWANG

IPC: H01L29/778 ,  H01L29/66

CPC classification number: H01L29/7787 ,  H01L29/0619 ,  H01L29/1066 ,  H01L29/2003 ,  H01L29/41725 ,  H01L29/41766 ,  H01L29/66462

Abstract: Provided are a high electron mobility transistor (HEMT) and a method of manufacturing the HEMT. The HEMT includes: a channel layer comprising a first semiconductor material; a channel supply layer comprising a second semiconductor material and generating two-dimensional electron gas (2DEG) in the channel layer; a source electrode and a drain electrode separated from each other in the channel supply layer; at least one depletion forming unit that is formed on the channel supply layer and forms a depletion region in the 2DEG; at least one gate electrode that is formed on the at least one depletion forming unit; at least one bridge that connects the at least one depletion forming unit and the source electrode; and a contact portion that extends from the at least one bridge under the source electrode.

Abstract translation: 提供高电子迁移率晶体管（HEMT）和制造HEMT的方法。 HEMT包括：包含第一半导体材料的沟道层; 沟道供应层，包括第二半导体材料并在沟道层中产生二维电子气（2DEG）; 在所述沟道供给层中彼此分离的源电极和漏电极; 至少一个耗尽形成单元，其形成在所述沟道供应层上并在所述2DEG中形成耗尽区; 形成在所述至少一个耗尽形成单元上的至少一个栅电极; 连接所述至少一个耗尽形成单元和所述源电极的至少一个桥; 以及从所述源电极下方的所述至少一个桥延伸的接触部。

公开(公告)号：US20140151749A1

公开(公告)日：2014-06-05

申请号：US14091822

申请日：2013-11-27

Applicant: Samsung Electronics Co., Ltd.

Inventor： Woo-chul JEON ,  Jong-seob KIM ,  Ki-yeol PARK ,  Young-hwan PARK ,  Jai-kwang SHIN ,  Jae-joon OH ,  Hyuk-soon CHOI ,  In-jun HWANG

IPC: H01L29/778 ,  H01L21/02 ,  H01L29/66

CPC classification number: H01L21/02109 ,  H01L29/0619 ,  H01L29/1066 ,  H01L29/2003 ,  H01L29/66462 ,  H01L29/7786 ,  H01L29/8613

Abstract: According to example embodiments, a high electron mobility transistor (HEMT) includes a channel layer; a channel supply layer on the channel layer; a source electrode and a drain electrode spaced apart from each other on one of the channel layer and the channel supply layer; a gate electrode on a part of the channel supply layer between the source electrode and the drain electrode; a first depletion-forming layer between the gate electrode and the channel supply layer; and a at least one second depletion-forming layer on the channel supply layer between the gate electrode and the drain electrode. The at least one second depletion-forming layer is electrically connected to the source electrode.

Abstract translation: 根据示例性实施例，高电子迁移率晶体管（HEMT）包括沟道层; 通道层上的通道供应层; 在所述沟道层和所述沟道供给层之一上彼此隔开的源电极和漏电极; 源电极和漏电极之间的沟道供给层的一部分上的栅电极; 在栅电极和沟道供应层之间的第一耗尽层; 以及在栅电极和漏电极之间的沟道供应层上的至少一个第二耗尽层。 所述至少一个第二耗尽形成层电连接到所述源电极。