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公开(公告)号：US12087650B2
公开(公告)日：2024-09-10
申请号：US18315558
申请日：2023-05-11
发明人： Junyoung Oh , Hyunggil Baek , Seunghwan Kim , Jungjoo Kim , Jongho Park , Yongkwan Lee
IPC分类号： H01L23/16 , H01L23/31 , H01L23/498 , H01L23/538 , H01L25/065
CPC分类号： H01L23/16 , H01L23/3128 , H01L23/49811 , H01L23/5389 , H01L25/0657
摘要： A semiconductor package is provided. The semiconductor package includes: a first package substrate; a first semiconductor chip on the first package substrate; an interposer substrate including a lower surface facing the first package substrate, an upper surface opposite to the lower surface, and an upper conductive pad in the upper surface of the interposer substrate; a first dam structure on the upper surface of the interposer substrate and extending along an edge of the upper conductive pad; a first molding layer in contact with the lower and upper surfaces of the interposer substrate and with an outer wall of the first dam structure; and a conductive connector in contact with an inner wall of the at least one first dam structure and with the upper conductive pad.
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公开(公告)号：US11996608B2
公开(公告)日：2024-05-28
申请号：US18137125
申请日：2023-04-20
发明人： Jae-Ho Lim , Kyung-Jong Lee , Hosaeng Kim , Seunghwan Kim
CPC分类号： H01Q1/243 , H01Q5/335 , H01Q5/342 , H04M1/0216 , H04M1/0268 , H01Q5/385
摘要： Provided is an electronic device that includes a first housing including a first side facing a first direction, a second side facing a second direction opposite to the first direction, and a first lateral side surrounding at least part of a space between the first side and the second side, wherein the first lateral side includes a first conductive portion and a first non-conductive portion; a second housing including a third side facing a third direction, a fourth side facing a fourth direction opposite to the third direction, a second lateral side surrounding at least part of a space between the third side and the fourth side and a ground member, wherein the second lateral side includes a second conductive portion and a second non-conductive portion; a flexible display disposed in the first housing and the second housing; a connecting member which connects the first housing and the second housing such that the first housing and the second housing are folded to face each other, wherein when the first housing and the second housing are folded, the first non-conductive portion and the second non-conductive portion abut against each other; at least one wireless communication circuit electrically connected to the first conductive portion; and at least one switching circuit disposed in the second housing, wherein the at least one switching circuit is electrically connected between the second conductive portion and the ground member such that the second conductive portion can be selectively connected to the ground member, and wherein the first lateral side forms at least a part of an exterior of the electronic device.
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公开(公告)号：US11742294B2
公开(公告)日：2023-08-29
申请号：US17306290
申请日：2021-05-03
发明人： Jongho Park , Seunghwan Kim , Junyoung Oh , Yonghyun Kim , Yongkwan Lee , Junga Lee
IPC分类号： H01L23/13 , H01L23/538 , H01L23/00 , H01L23/498 , H01L25/10 , H01L23/31
CPC分类号： H01L23/5385 , H01L23/3128 , H01L23/49816 , H01L23/49822 , H01L23/49833 , H01L23/49838 , H01L23/5386 , H01L24/16 , H01L24/73 , H01L25/105 , H01L2224/16227 , H01L2224/16237 , H01L2224/73204 , H01L2225/1023 , H01L2225/1041 , H01L2225/1058
摘要： A semiconductor package includes a first package substrate; a first semiconductor chip on the first package substrate; a first conductive connector on the first package substrate; and an interposer including a central portion on the first semiconductor chip and an outer portion having the first conductive connector attached thereto. The central portion of the interposer includes a bottom surface defining a recess from a bottom surface of the outer portion of the interposer in a vertical direction that is perpendicular to a top surface of the first package substrate. A thickness in the vertical direction of the outer portion of the interposer is greater than a thickness in the vertical direction of the central portion of the interposer.
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公开(公告)号：US20230082412A1
公开(公告)日：2023-03-16
申请号：US17747131
申请日：2022-05-18
发明人： Yongkwan Lee , Seunghwan Kim , Jungjoo Kim , Jongwan Kim , Junwoo Park
IPC分类号： H01L23/367 , H01L25/065 , H01L25/16 , H01L23/498 , H01L23/48
摘要： A semiconductor package is provided. The semiconductor package includes a package substrate, an interposer including a lower protective layer, conductive connectors connecting the package substrate to the interposer, a semiconductor chip arranged between the package substrate and the interposer, and cooling patches arranged between the semiconductor chip and the interposer and having cylindrical shapes, wherein each of the cooling patches includes the same material as each of the conductive connectors, a height of each of the cooling patches is less than or equal to a diameter of each of the cooling patches, and thermal conductivity of each of the cooling patches is greater than thermal conductivity of the lower protective layer.
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公开(公告)号：US11508713B2
公开(公告)日：2022-11-22
申请号：US17168706
申请日：2021-02-05
发明人： Junyoung Oh , Kyonghwan Koh , Sangsoo Kim , Seunghwan Kim , Jongho Park , Yongkwan Lee
IPC分类号： H01L21/56 , H01L25/00 , H01L25/10 , H01L23/00 , H01L23/31 , H01L23/538 , H01L21/48 , H01L21/78 , H01L25/065
摘要： A method of manufacturing a semiconductor package includes forming a laser reactive polymer layer on a substrate; mounting a semiconductor device on the substrate; irradiating at least a portion of the laser reactive polymer layer below the semiconductor device with a laser having a wavelength capable of penetrating through the semiconductor device on the substrate to modify the laser reactive polymer layer to have a hydrophilic functional group; and forming a first encapsulation material layer between the semiconductor device and the substrate.
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6.发明授权公开(公告)号：US10664578B2
公开(公告)日：2020-05-26
申请号：US14615953
申请日：2015-02-06
发明人： Heejun You , Taeho Kim , Hyungjoon Kim , Seulhan Park , Jonghoon Park , Teain An , Yangsoo Lee , Moonsu Chang , Jinho Hyeon , Seunghwan Kim
摘要： A method is provided that inputs/outputs security information to/from an electronic device. The security information inputting method includes sensing a motion for inputting security information by a sensor module; creating an interrupt according to the security information inputting motion; and reading the security information by a security information inputting module, in response to the interrupt.
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公开(公告)号：US20210320042A1
公开(公告)日：2021-10-14
申请号：US17098748
申请日：2020-11-16
发明人： Junyoung Oh , Hyunggil Baek , Seunghwan Kim , Jungjoo Kim , Jongho Park , Yongkwan Lee
IPC分类号： H01L23/16 , H01L25/065 , H01L23/538 , H01L23/31 , H01L23/498
摘要： A semiconductor package is provided. The semiconductor package includes: a first package substrate; a first semiconductor chip on the first package substrate; an interposer substrate including a lower surface facing the first package substrate, an upper surface opposite to the lower surface, and an upper conductive pad in the upper surface of the interposer substrate; a first dam structure on the upper surface of the interposer substrate and extending along an edge of the upper conductive pad; a first molding layer in contact with the lower and upper surfaces of the interposer substrate and with an outer wall of the first dam structure; and a conductive connector in contact with an inner wall of the at least one first dam structure and with the upper conductive pad.
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公开(公告)号：US10224608B2
公开(公告)日：2019-03-05
申请号：US15217516
申请日：2016-07-22
发明人： Kyung-Jae Lee , Kyung-Jong Lee , Sewoong Kim , Soo-Young Jang , Seunghwan Kim , Hosaeng Kim , Jinwoo Jung
摘要： An electronic device is provided. The electronic device includes a housing including a first face, a second face, and a side face that at least partially encloses a space between the first face and the second face, a conductive member configured to form at least a portion of the side face, a ground member, at least one communication circuit, and a conductive pattern positioned within the housing, the conductive pattern electrically connected to the communication circuit and the ground member, a first electric path positioned within the housing, and configured to electrically interconnect another end of the conductive member and the communication circuit, a second electric path configured to electrically interconnect the first electric path or the conductive member and the ground member, and a third electric path configured to electrically interconnect the first electric path or the conductive member and the ground member, and including a switching circuit.
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公开(公告)号：US10185724B2
公开(公告)日：2019-01-22
申请号：US14673177
申请日：2015-03-30
发明人： Seunghwan Kim
IPC分类号： G06F17/30
摘要： A method of sorting a media content is provided. The method includes receiving at least one search word, extracting at least one media content based on the received search word, identifying a user's selection for the extracted media content, generating a group, and including the at least one media content in the group based on the identified user's selection.
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公开(公告)号：US20240128190A1
公开(公告)日：2024-04-18
申请号：US18486546
申请日：2023-10-13
发明人： Seunghwan Kim , Yongkwan Lee , Gyuhyeong Kim , Jungjoo Kim , Jongwan Kim , Junwoo Park , Taejun Jeon , Junhyeung Jo
IPC分类号： H01L23/528 , H01L21/48 , H01L21/56 , H01L23/00 , H01L23/31
CPC分类号： H01L23/5283 , H01L21/485 , H01L21/56 , H01L23/3157 , H01L24/05 , H01L24/13 , H01L2224/05008 , H01L2224/13026
摘要： A semiconductor package includes a lower substrate including a lower interconnection layer; an upper substrate on the lower substrate, a recessed surface having a step difference, and an upper interconnection layer having a through-hole extending from the recessed surface to the first surface of the upper substrate and electrically connected to the lower interconnection layer; semiconductor chip between the recessed surface of the upper substrate and the lower substrate and including connection pads electrically connected to the lower interconnection layer; interconnect structure between the second surface of the upper substrate and the lower substrate and electrically connecting the lower interconnection layer to the upper interconnection layer; and an insulating member including a first portion covering at least a portion of the semiconductor chip and interconnect structure, a second portion extending from the first portion into the through-hole, and a third portion covering at least a portion of the first surface.
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